CN111316452A - 一种磊晶结构及其制备方法、led - Google Patents

一种磊晶结构及其制备方法、led Download PDF

Info

Publication number
CN111316452A
CN111316452A CN201980002001.0A CN201980002001A CN111316452A CN 111316452 A CN111316452 A CN 111316452A CN 201980002001 A CN201980002001 A CN 201980002001A CN 111316452 A CN111316452 A CN 111316452A
Authority
CN
China
Prior art keywords
layer
gan
defect
growing
epitaxial structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201980002001.0A
Other languages
English (en)
Other versions
CN111316452B (zh
Inventor
杨顺贵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chongqing Kangjia Optoelectronic Technology Co ltd
Original Assignee
Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd filed Critical Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
Publication of CN111316452A publication Critical patent/CN111316452A/zh
Application granted granted Critical
Publication of CN111316452B publication Critical patent/CN111316452B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0095Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025Physical imperfections, e.g. particular concentration or distribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

本发明公开了一种磊晶结构及其制备方法、LED,所述磊晶结构包括:依次设置的蓝宝石衬底、GaN层、缺陷暴露层、缺陷终止层。在蓝宝石衬底上制备缓冲层(GaN层)之后,本发明通过缺陷暴露层,将缓冲层中的缺陷扩大,并暴露出来,然后通过缺陷终止层改变缺陷的方向,终止缺陷继续扩大。因此,在缺陷终止层上继续制备后续层时,后续层不会在缓冲层的缺陷的基础上形成更大的缺陷。

Description

一种磊晶结构及其制备方法、LED
技术领域
本发明涉及磊晶结构技术领域,尤其涉及的是一种磊晶结构及其制备方法、LED。
背景技术
发光二极管(Light-emitting diode,LED)是一种能发光的半导体电子组件,透过三价与五价元素所组成的复合光源,可应用在照明,广告广告牌,手机背光等,目前所使用的材料为InGaN,但目前是在蓝宝石基板(sapphire)透过MOCVD机台成长InGaN为主的蓝绿光LED,但因是不同材料所堆栈(异质磊晶)进而造成许多缺陷(10-9~10-10cm-2)进而影响电子及空穴复合效率而降低整体组件发光效率。即是说,在磊晶制程中大致分为同质磊晶(A材料长在A材料基板上)以及异质磊晶(A材料长在B材料基板上),目前在GaN基LED制程上目前是GaN材料长在蓝宝石基板上,因为GaN和蓝宝石基板的晶格常数不匹配达14%,因此,GaN长在蓝宝石基板上会产生应力,进而产生材料缺陷,这些缺陷将会存在悬浮键,这将会导致影响捕捉电子或空穴,使得电子电洞符合效率变差,而使整体组件发光效率变差。
因此,现有技术还有待于改进和发展。
发明内容
本发明要解决的技术问题在于,针对现有技术的上述缺陷,提供一种磊晶结构及其制备方法、LED,旨在解决现有技术中GaN长在蓝宝石基板上时产生缺陷的问题。
本发明解决技术问题所采用的技术方案如下:
一种磊晶结构,其中,包括:依次设置的蓝宝石衬底、GaN层、缺陷暴露层、缺陷终止层。
所述的磊晶结构,其中,所述GaN层为高温无掺杂GaN层,所述缺陷暴露层为低温无掺杂GaN层或低温无掺杂InGaN层,所述缺陷终止层为岛状掺杂GaN层。
所述的磊晶结构,其中,所述岛状掺杂GaN层为岛状硅掺杂GaN层或岛状镁掺杂GaN层,所述岛状掺杂GaN层的掺杂浓度大于1019cm-3
所述的磊晶结构,其中,所述磊晶结构还包括:依次设置在所述缺陷终止层上的n型GaN层、发光层、EBL层、p型GaN层。
一种LED,其中,包括:如上述任意一项所述的磊晶结构。
一种如上述任意一项所述的磊晶结构的制备方法,其中,所述方法包括以下步骤:
提供一蓝宝石衬底,并在所述蓝宝石衬底上生长GaN层;
在所述GaN层上生长缺陷暴露层;
在所述缺陷暴露层上生长缺陷终止层。
所述的磊晶结构的制备方法,其中,所述在所述蓝宝石衬底上生长GaN层,包括:
在所述蓝宝石衬底上生长非晶GaN;
对所述非晶GaN进行加热处理得到单晶GaN;其中,所述加热处理的温度为950-1050℃;
以所述单晶GaN为晶种生长得到GaN层。
所述的磊晶结构的制备方法,其中,所述在所述GaN层上生长缺陷暴露层,包括:
在所述GaN层上生长GaN或InGaN得到缺陷暴露层;其中,所述生长GaN或InGaN的温度为600-800℃,V-III比为1000-2500;
所述在所述缺陷暴露层上生长缺陷终止层,包括:
在所述缺陷暴露层上生长掺杂GaN得到缺陷终止层;其中,所述生长掺杂GaN的温度为1000-1100℃,V-III比为4500-7500。
所述的磊晶结构的制备方法,其中,所述生长掺杂GaN中采用硅或镁掺杂,掺杂浓度大于1019cm-3
所述的磊晶结构的制备方法,其中,所述方法还包括:
在所述缺陷终止层上依次生长n型GaN层、发光层、EBL层、p型GaN层。
有益效果:在蓝宝石衬底上制备缓冲层(GaN层)之后,本发明通过缺陷暴露层,将缓冲层中的缺陷扩大,并暴露出来,然后通过缺陷终止层改变缺陷的方向,终止缺陷继续扩大。因此,在缺陷终止层上继续制备后续层时,后续层不会在缓冲层的缺陷的基础上形成更大的缺陷。
附图说明
图1是现有技术中缺陷的结构示意图。
图2是现有技术中磊晶结构的示意图。
图3是本发明中磊晶结构的示意图。
图4是现有技术中磊晶结构的AFM(原子力显微镜)图。
图5是本发明中磊晶结构的AFM图。
图6是本发明中GaN的晶胞的结构示意图。
图7是本发明中磊晶结构的制备方法的流程图。
具体实施方式
为使本发明的目的、技术方案及优点更加清楚、明确,以下参照附图并举实施例对本发明进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
请同时参阅图3-图6,本发明提供了一种磊晶结构的一些实施例。
需要说明的是,如图1和图2所示,磊晶结构通常包括:依次设置的蓝宝石衬底1、无掺杂GaN层(即缓冲层2)、N型GaN层3、应力释放层4、发光层5(可以采用多量子阱层,MQWs)、EBL层6(即电子阻挡层,如p型AlGaN层)以及p型GaN层7。由于缓冲层2的GaN与蓝宝石衬底1晶格常数不匹配达,在蓝宝石衬底1上生长GaN时,存在应力,因而产生许多缺陷(即V-pits坑),缺陷密度通常为109-1010cm-2(一平方公分的面积内有910~1010个缺陷),在后续层的生长过程中,后续层会照着有V-pits坑的晶格继续成长,因此该V-pits坑将会一直延伸到最外层P-GaN层,且V-pits坑会越变越大。一旦磊晶结构中有缺陷存在,电子及空穴将会走最短路径,即缺陷路径(或者说漏电路径),将不会经过发光层5,而使得磊晶结构不会发光,也会使得起始电压异常偏低,造成组件无法正常操作。
如图3所示,本发明的一种磊晶结构,包括:依次设置的蓝宝石衬底1、GaN层、缺陷暴露层21、缺陷终止层22。
值得说明的是,在蓝宝石衬底1上制备缓冲层2(GaN层)之后,本发明通过缺陷暴露层21,将缓冲层2中的缺陷扩大,并暴露出来,然后通过缺陷终止层22改变缺陷的方向,终止缺陷继续扩大。因此,在缺陷终止层22上继续制备后续层(例如,N型GaN层3、应力释放层4、多量子阱层、电子阻挡层、p型AlGaN层、p型GaN层7)时,后续层不会在缓冲层2的V-pits坑的基础上形成更大的V-pits坑。
如图4所示,现有技术中磊晶结构(包括后续层)的AFM图中有多个V-pits坑,而如图5所示,本发明中磊晶结构(包括后续层)的AFM图中没有V-pits坑。
在本发明的一个较佳实施例中,所述GaN层为高温无掺杂GaN层,所述缺陷暴露层21为低温无掺杂GaN层或低温无掺杂InGaN层,所述缺陷终止层22为岛状掺杂GaN层。
具体地,这里的“高温”和“低温”是相对而言的,也就是说,相对于缺陷暴露层21中的GaN或InGaN来说,缓冲层2中的GaN采用高温制备,具体温度为950-1050℃。相对于缓冲层2中的GaN来说,缺陷暴露层21中的GaN或InGaN采用低温制备,具体温度为600-800℃。采用低温制备GaN或InGaN时,有利于将缓冲层2中的V-pits坑放大,也就是说,可以使V-pits坑的开口更大,将V-pits坑提前暴露出来,便于通过缺陷终止层22将暴露出来的V-pits坑终止。
如图6所示,GaN为六方晶系(晶胞呈六棱柱状),GaN在c轴和a轴上的生长速率是既定的,缺陷终止层22采用掺杂GaN形成岛状结构,也即岛状掺杂GaN层,由于这里的GaN进行了掺杂,GaN在c轴和a轴上的生长速率不相同,随着掺杂浓度的提高,a轴的生长速率逐渐升高,c轴的生长速率逐渐降低。在磊晶结构中,c轴垂直与蓝宝石衬底1,a轴平行于蓝宝石衬底1,由于掺杂的GaN的a轴的生长速率提高,c轴的生长速率降低,掺杂的GaN倾向侧长,向水平方向扩展,V-pits坑随着掺杂的GaN倾向侧长而转弯,因此不会延伸到后续层中,不会形成更大的V-pits坑。
在本发明的一个较佳实施例中,所述岛状掺杂GaN层为岛状硅掺杂GaN层或岛状镁掺杂GaN层,所述岛状掺杂GaN层的掺杂浓度大于1019cm-3
具体地,硅源可以采用硅烷(SiH4),镁源采用二茂镁(Cp2Mg),硅或镁的掺杂浓度大于1019cm-3,也就是说,在一立方公分体积内,Si原子取代Ga原子数目大于1020个,因Si外围电子数目比Ga原子数目多一个电子,因此,掺杂GaN为主要电子提供材料。
在本发明的一个较佳实施例中,如图3所示,所述磊晶结构还包括:依次设置在所述缺陷终止层22上的N型GaN层3、发光层5、EBL层6、p型GaN层7。当然在N型GaN层3和发光层5之间还可以设置应力释放层4。
基于上述磊晶结构,本发明还提供了一种LED的较佳实施例:
本发明实施例所述一种LED,包括如上述任意一实施例所述的磊晶结构。
基于上述磊晶结构,本发明还提供了一种磊晶结构的制备方法的较佳实施例:
如图7所示,本发明实施例所述一种磊晶结构的制备方法,包括以下步骤:
步骤S100、提供一蓝宝石衬底1,并在所述蓝宝石衬底1上生长GaN层。
具体地,步骤S100包括:
步骤S110、提供一蓝宝石衬底1。
步骤S120、在所述蓝宝石衬底1上生长非晶GaN。
步骤S130、对所述非晶GaN进行加热处理得到单晶GaN;其中,所述加热处理的温度为950-1050℃。
步骤S140、以所述单晶GaN为晶种生长得到GaN层。
步骤S200、在所述GaN层上生长缺陷暴露层21。
具体地,步骤S200包括:
步骤S210、在所述GaN层上生长GaN或InGaN得到缺陷暴露层21;其中,所述生长GaN或InGaN的温度为600-800℃,V-III比(N源和Ga+In源的摩尔比)为1000-2500,生长压力为300-400torr。这里的N源采用氨气,Ga源采用三甲基镓或三乙基镓,In源采用三甲基铟。
具体地,缺陷暴露层21为低温无掺杂GaN层或低温无掺杂InGaN层,低温无掺杂InGaN层具体成分为InxGa1-xN(0.2≤x≤0.35)。缺陷暴露层21的厚度为0.5-1μm。
步骤S300、在所述缺陷暴露层21上生长缺陷终止层22。
具体地,步骤S300包括:
步骤S310、在所述缺陷暴露层21上生长掺杂GaN得到缺陷终止层22;其中,所述生长掺杂GaN的温度为1000-1100℃,V-III比为4500-7500。
具体地,缺陷暴露层21的厚度为1-1.5μm。所述生长掺杂GaN中采用硅或镁掺杂,掺杂浓度大于1019cm-3。掺杂浓度可以根据时间的延长增大,也就是说,随着缺陷暴露层21的生长,提高掺杂源的浓度。
步骤S400、在所述缺陷终止层22上依次生长N型GaN层3、发光层5、EBL层6、p型GaN层7。
具体地,也可以在N型GaN层3与发光层5之间生长应力释放层4。
综上所述,本发明所提供的一种磊晶结构及其制备方法、LED,所述磊晶结构包括:依次设置的蓝宝石衬底、GaN层、缺陷暴露层、缺陷终止层。在蓝宝石衬底上制备缓冲层(GaN层)之后,本发明通过缺陷暴露层,将缓冲层中的缺陷扩大,并暴露出来,然后通过缺陷终止层改变缺陷的方向,终止缺陷继续扩大。因此,在缺陷终止层上继续制备后续层时,后续层不会在缓冲层的缺陷的基础上形成更大的缺陷。
应当理解的是,本发明的应用不限于上述的举例,对本领域普通技术人员来说,可以根据上述说明加以改进或变换,所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (10)

1.一种磊晶结构,其特征在于,包括:依次设置的蓝宝石衬底、GaN层、缺陷暴露层、缺陷终止层。
2.根据权利要求1所述的磊晶结构,其特征在于,所述GaN层为高温无掺杂GaN层,所述缺陷暴露层为低温无掺杂GaN层或低温无掺杂InGaN层,所述缺陷终止层为岛状掺杂GaN层。
3.根据权利要求2所述的磊晶结构,其特征在于,所述岛状掺杂GaN层为岛状硅掺杂GaN层或岛状镁掺杂GaN层,所述岛状掺杂GaN层的掺杂浓度大于1019cm-3
4.根据权利要求1所述的磊晶结构,其特征在于,所述磊晶结构还包括:依次设置在所述缺陷终止层上的n型GaN层、发光层、EBL层、p型GaN层。
5.一种LED,其特征在于,包括:如权利要求1-4任意一项所述的磊晶结构。
6.一种如权利要求1-4任意一项所述的磊晶结构的制备方法,其特征在于,所述方法包括以下步骤:
提供一蓝宝石衬底,并在所述蓝宝石衬底上生长GaN层;
在所述GaN层上生长缺陷暴露层;
在所述缺陷暴露层上生长缺陷终止层。
7.根据权利要求6所述的磊晶结构的制备方法,其特征在于,所述在所述蓝宝石衬底上生长GaN层,包括:
在所述蓝宝石衬底上生长非晶GaN;
对所述非晶GaN进行加热处理得到单晶GaN;其中,所述加热处理的温度为950-1050℃;
以所述单晶GaN为晶种生长得到GaN层。
8.根据权利要求6所述的磊晶结构的制备方法,其特征在于,所述在所述GaN层上生长缺陷暴露层,包括:
在所述GaN层上生长GaN或InGaN得到缺陷暴露层;其中,所述生长GaN或InGaN的温度为600-800℃,V-III比为1000-2500;
所述在所述缺陷暴露层上生长缺陷终止层,包括:
在所述缺陷暴露层上生长掺杂GaN得到缺陷终止层;其中,所述生长掺杂GaN的温度为1000-1100℃,V-III比为4500-7500。
9.根据权利要求8所述的磊晶结构的制备方法,其特征在于,所述生长掺杂GaN中采用硅或镁掺杂,掺杂浓度大于1019cm-3
10.根据权利要求6所述的磊晶结构的制备方法,其特征在于,所述方法还包括:
在所述缺陷终止层上依次生长n型GaN层、发光层、EBL层、p型GaN层。
CN201980002001.0A 2019-09-30 2019-09-30 一种磊晶结构及其制备方法、led Active CN111316452B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/109724 WO2021062799A1 (zh) 2019-09-30 2019-09-30 一种磊晶结构及其制备方法、led

Publications (2)

Publication Number Publication Date
CN111316452A true CN111316452A (zh) 2020-06-19
CN111316452B CN111316452B (zh) 2021-11-23

Family

ID=71159509

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980002001.0A Active CN111316452B (zh) 2019-09-30 2019-09-30 一种磊晶结构及其制备方法、led

Country Status (3)

Country Link
US (1) US11621371B2 (zh)
CN (1) CN111316452B (zh)
WO (1) WO2021062799A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117153974A (zh) * 2023-10-26 2023-12-01 江西兆驰半导体有限公司 发光二极管外延片及其制备方法、led

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11557695B2 (en) * 2020-02-04 2023-01-17 Seoul Viosys Co., Ltd. Single chip multi band LED
CN114420801A (zh) * 2021-12-20 2022-04-29 江西兆驰半导体有限公司 一种发光二极管外延片制备方法及外延片
CN114300590B (zh) * 2021-12-28 2024-02-23 淮安澳洋顺昌光电技术有限公司 一种发光二极管及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6442184B1 (en) * 1998-12-14 2002-08-27 Pioneer Corporation Nitride-based semiconductor light emitting device and manufacturing method therefor
US6555846B1 (en) * 1999-06-10 2003-04-29 Pioneer Corporation Method for manufacturing a nitride semiconductor device and device manufactured by the method
CN101241851A (zh) * 2002-04-30 2008-08-13 住友电气工业株式会社 用于生长氮化镓的基片、其制法和制备氮化镓基片的方法
CN102456777A (zh) * 2010-10-21 2012-05-16 展晶科技(深圳)有限公司 固态半导体制作方法
US20150064881A1 (en) * 2013-08-30 2015-03-05 Stmicroelectronics (Tours) Sas Method for treating a gallium nitride layer comprising dislocations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3580169B2 (ja) * 1999-03-24 2004-10-20 日亜化学工業株式会社 窒化物半導体素子
US6534332B2 (en) * 2000-04-21 2003-03-18 The Regents Of The University Of California Method of growing GaN films with a low density of structural defects using an interlayer
JP4396649B2 (ja) * 2006-02-17 2010-01-13 住友電気工業株式会社 GaN結晶基板およびその製造方法
JP4371202B2 (ja) * 2003-06-27 2009-11-25 日立電線株式会社 窒化物半導体の製造方法及び半導体ウエハ並びに半導体デバイス
US7534638B2 (en) * 2006-12-22 2009-05-19 Philips Lumiled Lighting Co., Llc III-nitride light emitting devices grown on templates to reduce strain
WO2013141561A1 (ko) * 2012-03-19 2013-09-26 서울옵토디바이스주식회사 에피층과 성장 기판 분리 방법 및 이를 이용한 반도체 소자
CN104900774B (zh) * 2015-05-07 2017-05-17 西北工业大学明德学院 一种提高led亮度的双缓冲层横向外延生长方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6442184B1 (en) * 1998-12-14 2002-08-27 Pioneer Corporation Nitride-based semiconductor light emitting device and manufacturing method therefor
US6555846B1 (en) * 1999-06-10 2003-04-29 Pioneer Corporation Method for manufacturing a nitride semiconductor device and device manufactured by the method
CN101241851A (zh) * 2002-04-30 2008-08-13 住友电气工业株式会社 用于生长氮化镓的基片、其制法和制备氮化镓基片的方法
CN102456777A (zh) * 2010-10-21 2012-05-16 展晶科技(深圳)有限公司 固态半导体制作方法
US20150064881A1 (en) * 2013-08-30 2015-03-05 Stmicroelectronics (Tours) Sas Method for treating a gallium nitride layer comprising dislocations

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117153974A (zh) * 2023-10-26 2023-12-01 江西兆驰半导体有限公司 发光二极管外延片及其制备方法、led
CN117153974B (zh) * 2023-10-26 2024-02-20 江西兆驰半导体有限公司 发光二极管外延片及其制备方法、led

Also Published As

Publication number Publication date
CN111316452B (zh) 2021-11-23
US20210305455A1 (en) 2021-09-30
US11621371B2 (en) 2023-04-04
WO2021062799A1 (zh) 2021-04-08

Similar Documents

Publication Publication Date Title
CN111316452B (zh) 一种磊晶结构及其制备方法、led
CN109980056B (zh) 氮化镓基发光二极管外延片及其制造方法
JP3778344B2 (ja) 発光半導体デバイスの製造方法
US7547910B2 (en) Semiconductor light-emitting device and method of manufacturing semiconductor light-emitting device
JP3550070B2 (ja) GaN系化合物半導体結晶、その成長方法及び半導体基材
US7153713B2 (en) Method for manufacturing high efficiency light-emitting diodes
CN107195736B (zh) 一种氮化镓基发光二极管外延片及其生长方法
WO2019015217A1 (zh) 一种深紫外led
CN114649454B (zh) 一种发光二极管的外延片结构及其制备方法
CN112397621B (zh) 紫外发光二极管的外延片及其制备方法
CN116190511B (zh) 一种高光效led外延片、制备方法及led芯片
CN113451458A (zh) 一种超晶格层、led外延结构、显示装置及其制造方法
US9755111B2 (en) Active region containing nanodots (also referred to as “quantum dots”) in mother crystal formed of zinc blende-type (also referred to as “cubic crystal-type”) AlyInxGal-y-xN Crystal (y[[□]][≧] 0, x > 0) grown on Si substrate, and light emitting device using the same (LED and LD)
WO2004017432A1 (en) Nitride semiconductor and fabrication method thereof
CN109920883B (zh) 氮化镓基发光二极管外延片及其制造方法
CN116722083A (zh) 高辐射发光二极管制备方法及发光二极管
CN113571615B (zh) 改善欧姆接触的发光二极管外延片及其制造方法
US9620675B2 (en) Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing
JP3753369B2 (ja) 窒化物系半導体発光素子
CN110061104B (zh) 氮化镓基发光二极管外延片的制造方法
CN116420238A (zh) Led器件、led结构及其制备方法
KR100881053B1 (ko) 질화물계 발광소자
CN113193087B (zh) 发光二极管外延片制备方法
JP4609334B2 (ja) 窒化物系半導体基板の製造方法、窒化物系半導体基板、及び窒化物系半導体発光素子
CN108447956B (zh) 一种发光二极管的外延片及其制备方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: 402760 No.69, Wushan Road, Biquan street, Bishan District, Chongqing

Applicant after: Chongqing Kangjia Photoelectric Technology Research Institute Co.,Ltd.

Address before: 402760 No.69, Wushan Road, Biquan street, Bishan District, Chongqing

Applicant before: Chongqing Kangjia Photoelectric Technology Research Institute Co.,Ltd.

GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: 402760 No.69, Wushan Road, Biquan street, Bishan District, Chongqing

Patentee after: Chongqing Kangjia Optoelectronic Technology Co.,Ltd.

Country or region after: China

Address before: 402760 No.69, Wushan Road, Biquan street, Bishan District, Chongqing

Patentee before: Chongqing Kangjia Photoelectric Technology Research Institute Co.,Ltd.

Country or region before: China