CN111129038A - Tft阵列基板及其制作方法 - Google Patents

Tft阵列基板及其制作方法 Download PDF

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CN111129038A
CN111129038A CN201911362574.2A CN201911362574A CN111129038A CN 111129038 A CN111129038 A CN 111129038A CN 201911362574 A CN201911362574 A CN 201911362574A CN 111129038 A CN111129038 A CN 111129038A
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amorphous silicon
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龙芬
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TCL China Star Optoelectronics Technology Co Ltd
TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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Priority to US16/757,400 priority patent/US20210408062A1/en
Priority to PCT/CN2020/070570 priority patent/WO2021128462A1/zh
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Abstract

本发明提供一种TFT阵列基板及其制作方法，所述制作方法采用四道光罩工艺，以形成于半导体层上的刻蚀阻挡层为掩膜进行对准刻蚀以形成非晶硅岛的图案，去除裸露在源极和漏极外的尾纤，以使所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐，可有效降低TFT器件光电敏感性，缩小了非晶硅岛面积，进而缩小了TFT器件尺寸，有利于节省版图，同时可简化工序，节省版图空间，有效提高背光强度下大尺寸高分辨液晶面板的显示品味。

Description

TFT阵列基板及其制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT阵列基板及其制作方法。
背景技术
随着液晶显示面板趋于大尺寸、高分辨方向发展，为提高高阶产品的显示品味，液晶显示面板的背光照射强度增加，像素尺寸持续减小，因此对液晶显示面板的薄膜晶体管(Thin Film Transistor，TFT)器件提出了更高的要求。
TFT器件为经过多次曝光、显影及刻蚀处理形成的多层薄膜结构，在传统工艺中，TFT器件的形成需要经过4道光罩工艺，在传统的4道光罩工艺中，非晶硅岛和源极、漏极的形成需要采用一道光罩工艺曝光显影、两道湿法刻蚀和两道干法刻蚀形成。因金属湿法刻蚀和干法刻蚀特性的差异，位于源极和漏极下方的半导体层存在一定长度的尾纤，然而由于半导体层通常采用光敏材料，在显示面板应用过程中，当折射或反射的光线照射到TFT器件裸露在外的部分半导体层上时，则容易导致TFT器件的漏电流增加，使得像素电压的保持能力较弱，从而影响显示面板的显示品质。
综上所述，需要提供一种新的TFT阵列基板及其制作方法，来解决上述技术问题。
发明内容
本发明提供的TFT阵列基板及其制作方法，解决了现有的TFT阵列基板由于位于源极和漏极下方的半导体层存在一定长度的尾纤，当折射或反射的光线照射到TFT器件裸露在外的部分半导体层上时，则容易导致TFT器件的漏电流增加，使得像素电压的保持能力较弱，从而影响显示面板的显示品质的技术问题。
为解决上述问题，本发明提供的技术方案如下：
本发明实施例提供一种TFT阵列基板的制作方法，包括以下步骤：
S10：提供衬底基板，在所述衬底基板上形成第一金属层，采用第一道光罩工艺对所述第一金属层进行图案化处理以形成栅极，在所述栅极和所述衬底基板上依次形成栅极绝缘层、半导体层、刻蚀阻挡层以及第二金属层；
S20：采用第二道光罩工艺对所述第二金属层、所述刻蚀阻挡层以及所述半导体层进行图案化处理以形成源极、漏极以及非晶硅岛，所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐；
S30：在所述栅极绝缘层、所述源极以及所述漏极上形成钝化层，采用第三道光罩工艺对所述钝化层进行图案化处理，以形成过孔；以及
S40：采用第四道光罩工艺在所述钝化层上图案化形成像素电极，所述像素电极通过所述过孔与所述漏极连接。
根据本发明实施例提供的TFT阵列基板的制作方法，所述步骤S20包括以下步骤：
S201：在所述第二金属层上涂覆光阻材料；
S202：采用所述第二道光罩对所述光阻材料曝光显影以形成第一光阻层；
S203：刻蚀去除所述第一光阻层未覆盖的所述第二金属层和所述刻蚀阻挡层；
S204：对所述第一光阻层进行灰化处理以形成第二光阻层，所述第二光阻层对应于所述源极和所述漏极；
S205：对所述第二金属层进行刻蚀处理以形成所述源极和所述漏极；
S206：剥离所述第二光阻层；以及
S207：刻蚀去除未被所述刻蚀阻挡层、所述源极以及所述漏极遮盖的所述半导体层。
根据本发明实施例提供的TFT阵列基板的制作方法，所述半导体层包括非晶硅层和N+非晶硅层，所述步骤S207还包括，刻蚀去除所述沟道区的所述N+非晶硅层以露出所述非晶硅层。
根据本发明实施例提供的TFT阵列基板的制作方法，所述步骤S207包括以下步骤：
S2071：以所述刻蚀阻挡层为掩膜，采用干法刻蚀工艺去除位于所述刻蚀阻挡层外侧的所述半导体层；
S2072：以所述源极和所述漏极为掩膜，采用干法刻蚀工艺去除所述沟道区的所述刻蚀阻挡层；以及
S2073：以所述刻蚀阻挡层为掩膜，采用干法刻蚀工艺去除位于所述沟道区的所述N+非晶硅层以露出所述非晶硅层。
根据本发明实施例提供的TFT阵列基板的制作方法，去除所述沟道区的所述N+非晶硅层的厚度为
Figure BDA0002337582740000031
根据本发明实施例提供的TFT阵列基板的制作方法，所述步骤S2071、所述步骤S2072以及步骤S2073采用同一道干法刻蚀制程。
根据本发明实施例提供的TFT阵列基板的制作方法，所述步骤S203中采用湿法刻蚀工艺，所述步骤S205中采用湿法刻蚀工艺。
根据本发明实施例提供的TFT阵列基板的制作方法，所述第二道光罩为半色调光罩。
本发明实施例提供一种TFT阵列基板，包括：
衬底基板；
栅极，位于所述衬底基板上；
栅极绝缘层，覆盖所述栅极和所述衬底基板；
非晶硅岛，设置于所述栅极绝缘层上；
刻蚀阻挡层，设置于所述非晶硅岛上；
源极、漏极，设置于所述刻蚀阻挡层上，所述源极和所述漏极之间形成沟道区；
钝化层，设置于所述栅极绝缘层、所述源极以及所述漏极上，所述钝化层上设置有过孔；以及
像素电极，设置于所述钝化层上，所述像素电极通过所述过孔与所述漏极连接；
其中，所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐。
根据本发明实施例提供的TFT阵列基板，所述非晶硅岛包括非晶硅层和N+非晶硅层，所述N+非晶硅层对应于所述源极和所述漏极，所述非晶硅层对应于所述源极、所述漏极以及所述沟道区。
本发明的有益效果为：本发明提供的TFT阵列基板及其制作方法，采用四道光罩工艺，以形成于半导体层上的刻蚀阻挡层为掩膜进行对准刻蚀以形成非晶硅岛的图案，去除裸露在源极和漏极外的尾纤，以使所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐，可有效降低TFT器件光电敏感性，缩小了非晶硅岛面积，进而缩小了TFT器件尺寸，有利于节省版图，同时可简化工序，节省版图空间，有效提高背光强度下大尺寸高分辨液晶面板的显示品味。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种TFT阵列基板的制作方法的流程图；
图2为本发明实施例提供的一种TFT阵列基板的制作方法中的步骤S20的流程图；
图3为本发明实施例提供的一种TFT阵列基板的制作方法中的步骤S207的流程图；
图4A-图4M为本发明实施例提供的一种TFT阵列基板的制作方法的流程结构示意图；
图5为本发明实施例提供的一种TFT阵列基板的截面结构示意图。
具体实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本发明针对现有技术的TFT阵列基板及其制作方法，由于位于源极和漏极下方的半导体层存在一定长度的尾纤，当折射或反射的光线照射到TFT器件裸露在外的部分半导体层上时，则容易导致TFT器件的漏电流增加，使得像素电压的保持能力较弱，从而影响显示面板的显示品质，本实施例能够解决该缺陷。
如图1所示，本发明实施例提供的TFT阵列基板的制作方法，是以采用四道光罩工艺为例进行说明的，所述制作方法包括以下步骤：
S10：提供衬底基板10，在所述衬底基板10上形成第一金属层20，采用第一道光罩工艺对所述第一金属层20进行图案化处理以形成栅极201，在所述栅极201和所述衬底基板10上依次形成栅极绝缘层30、半导体层40、刻蚀阻挡层50以及第二金属层60。
具体地，如图4A所示，可采用物理气相沉积工艺沉积所述第一金属层20，所述第一金属层20的材料可以为铜、铝或钼；如图4B所示，通过第一道光罩工艺对所述第一金属层20进行曝光、显影以及刻蚀处理，以在所述衬底基板10上形成所述栅极201。
如图4C所示，之后在所述栅极201和所述衬底基板10上沉积所述栅极绝缘层30，在所述栅极绝缘层30上沉积所述半导体层40，在所述半导体层40上沉积刻蚀阻挡层50，在所述刻蚀阻挡层50上沉积第二金属层60；所述栅极绝缘层30的材料可以为氧化硅或氮化硅，所述刻蚀阻挡层50的材料为金属，所述半导体层40包括层叠设置的非晶硅层401和N+非晶硅层402，所述非晶硅层401形成于所述栅极绝缘层30上，所述N+非晶硅层402形成于所述非晶硅层401上。
S20：采用第二道光罩工艺对所述第二金属层60、所述刻蚀阻挡层50以及所述半导体层40进行图案化处理以形成源极601、漏极602以及非晶硅岛40＇，所述非晶硅岛40＇的边缘与所述源极601的边缘、所述漏极602的边缘以及所述刻蚀阻挡层50的边缘均对齐。
需要说明的是，对所述半导体层40进行图案化处理以形成所述非晶硅岛40＇，包括对所述非晶硅层401和N+非晶硅层402均进行图案化处理，以去除非晶硅层尾纤和N+非晶硅层尾纤。
具体地，如图2所示，所述步骤S20具体包括以下步骤：
S201：在所述第二金属层60上涂覆光阻材料。
S202：采用所述第二道光罩对所述光阻材料曝光显影以形成第一光阻层100。
如图4D所示，采用半色调掩膜板对所述光阻材料进行曝光、显影，以除去位于两侧边缘和对应沟道区603的部分所述光阻材料，保留下来的光阻材料形成所述第一光阻层100，对应所述沟道区603的所述第一光阻层100的厚度小于对应其它区域的所述第一光阻层100的厚度。
S203：刻蚀去除所述第一光阻层100未覆盖的所述第二金属层60和所述刻蚀阻挡层50。
具体地，如图4E所示，可以采用湿法刻蚀的方式，由于湿法刻蚀具有各向同性，经湿法刻蚀处理之后的所述第二金属层60和所述刻蚀阻挡层50在所述衬底基板10上的正投影位于所述第一光阻层100在所述衬底基板10上的正投影内，也就是说，至少未被所述第一光阻层100遮盖的所述第二金属层60和所述刻蚀阻挡层50被去除。
S204：对所述第一光阻层100进行灰化处理以形成第二光阻层200，所述第二光阻层200对应于所述源极601和所述漏极602。
具体地，如图4F所示，对应于所述沟道区603的光阻材料被去除，保留下来的所述光阻材料形成第二光阻层200，所述第二光阻层200对应于后续需制备的所述源极601和所述漏极602。
S205：对所述第二金属层60进行刻蚀处理以形成所述源极601和所述漏极602。
同样地，如图4G所示，可以采用湿法刻蚀的方式以去除对应所述沟道区603的所述第二金属层60，保留下来的所述第二金属层60形成所述源极601和所述漏极602。
S206：剥离所述第二光阻层200。
如图4H所示，将所述第二光阻层200从所述源极601和所述漏极602上剥离。
S207：刻蚀去除未被所述刻蚀阻挡层50、所述源极601以及所述漏极602遮盖的所述半导体层40。
具体地，如图3所示，所述步骤S207具体包括以下步骤：
S2071：以所述刻蚀阻挡层50为掩膜，采用干法刻蚀工艺去除位于所述刻蚀阻挡层50外侧的所述半导体层40。
具体地，如图4I所示，采用干法刻蚀工艺去除位于所述刻蚀阻挡层50外侧的所述非晶硅层401和所述N+非晶硅层402，以所述刻蚀阻挡层50为掩膜，无需考虑所述刻蚀阻挡层50和所述半导体层40之间的对准空间，便可使所述非晶硅层401和所述N+非晶硅层402的边缘与所述源极601的边缘、所述漏极602的边缘以及所述刻蚀阻挡层50的边缘均对齐便可，从而完全去除裸露在所述源极601和所述漏极602之外的非晶硅尾纤和N+非晶硅尾纤，避免折射或反射的光线照射到TFT器件裸露在外的部分所述半导体层40上时，导致TFT器件的漏电流增加的情况发生，进而提高TFT器件的光稳定性。
相比传统工艺，本发明实施例中，去除位于所述刻蚀阻挡层50外侧的所述半导体层40的长度为1um～2um。
可以理解的是，所述沟道区603内保留有所述刻蚀阻挡层50，能够起到保护所述沟道区603内的所述半导体层40避免受到刻蚀影响的作用。
S2072：以所述源极601和所述漏极602为掩膜，采用干法刻蚀工艺去除所述沟道区603的所述刻蚀阻挡层50。
同样地，如图4J所示，持续采用干法刻蚀工艺去除所述沟道区603的所述刻蚀阻挡层50，为后续刻蚀位于所述沟道区603的所述N+非晶硅层做准备。
S2073：以所述刻蚀阻挡层50为掩膜，采用干法刻蚀工艺去除位于所述沟道区603的所述N+非晶硅层402以露出所述非晶硅层401。
同样地，如图4K所示，持续采用干法刻蚀工艺去除位于所述沟道区603的所述N+非晶硅层402以露出所述非晶硅层401，从而完全除去位于所述沟道区603的所述N+非晶硅尾纤，进而形成TFT器件；由于无N+非晶硅尾纤的结构可以降低所述源极601和所述漏极602的金属面积，能够缩小TFT器件尺寸，节省版图空间。
需要说明的是，所述步骤S2071、所述步骤S2072以及步骤S2073采用连续的干法刻蚀步骤，可看作为同一道干法刻蚀制程。
S30：在所述栅极绝缘层30、所述源极601以及所述漏极602上形成钝化层70，采用第三道光罩工艺对所述钝化层70进行图案化处理，以形成过孔701。
具体地，如图4L所示，可以采用物理气相沉积的方法沉积所述钝化层70，所述钝化层70的材料可以为氧化物、氮化物或者氧氮化合物，然后通过第三道光罩工艺对所述钝化层70进行曝光、显影和刻蚀处理以形成所述过孔701。
S40：采用第四道光罩工艺在所述钝化层上图案化形成像素电极80，所述像素电极80通过所述过孔701与所述漏极602连接。
具体地，如图4M所示，所述过孔701形成后，可通过溅射或热蒸发的方法沉积形成所述透明导电层，然后通过第五道光罩工艺对所述透明导电层进行曝光、显影和刻蚀处理以形成所述像素电极80，所述像素电极80通过所述过孔701与所述漏极602连接。
可以理解的是，相比传统的四道光罩工艺，采用本发明实施例提供的制作方法形成的TFT阵列基板，其裸露在所述源极601和所述漏极602外的非晶硅尾纤的长度仅为经过所述步骤S205中的湿法刻蚀处理后，所述源极601和所述漏极602退至所述第二光阻层200后的距离，且该步骤中采用的湿法刻蚀方式仅刻蚀所述源极601和所述漏极602，后退距离较小，故可有效缩小形成的所述非晶硅岛40＇的面积，进而缩小所述TFT器件尺寸，且有效提升高背光强度下大尺寸高分辨液晶面板的显示品味。
如图5所示，本发明实施例提供的TFT阵列基板，包括衬底基板10、栅极201、栅极绝缘层30、非晶硅岛40＇、刻蚀阻挡层50、源极601、漏极602、钝化层70以及像素电极890，其中，所述栅极201位于所述衬底基板10上，所述栅极绝缘层30覆盖所述栅极201和所述衬底基板10，所述非晶硅岛40＇设置于所述栅极绝缘层30上，所述刻蚀阻挡层50设置于所述非晶硅岛40＇上；所述源极601和所述漏极602设置于所述刻蚀阻挡层50上，所述源极601和所述漏极602之间形成沟道区603，所述钝化层7设置于所述栅极绝缘层30、所述源极601以及所述漏极602上，所述钝化层70上设置有过孔701，所述像素电极80设置于所述钝化层70上，所述像素电极8通过所述过孔701与所述漏极602连接。
其中，所述非晶硅岛40＇的边缘与所述源极601的边缘、所述漏极602的边缘以及所述刻蚀阻挡层50的边缘均对齐。
所述非晶硅岛40＇包括非晶硅层401和N+非晶硅层402，所述N+非晶硅层402对应于所述源极601和所述漏极602，所述非晶硅层401对应于所述源极601、所述漏极602以及所述沟道区603；所述非晶硅层401位于所述衬底基板10上，所述N+非晶硅层402位于所述非晶硅层401上，由于对应所述源极601的外侧和所述漏极602的外侧的所述栅极绝缘层30上无非晶硅尾纤和所述N+非晶硅尾纤，对应所述沟道区603的所述非晶硅层401上无所述N+非晶硅尾纤，因此能够避免折射或反射的光线照射到TFT器件裸露在外的部分所述半导体层40上时，导致TFT器件的漏电流增加的情况发生，进而提高TFT器件的光稳定性，同时能够缩小所述非晶硅岛40＇面积，进而缩小了TFT器件尺寸，有利于节省版图。
有益效果为：本发明实施例提供的TFT阵列基板及其制作方法，采用四道光罩工艺，以形成于半导体层上的刻蚀阻挡层为掩膜进行对准刻蚀以形成非晶硅岛的图案，去除裸露在源极和漏极外的尾纤，以使所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐，可有效降低TFT器件光电敏感性，缩小了非晶硅岛面积，进而缩小了TFT器件尺寸，有利于节省版图，同时可简化工序，节省版图空间，有效提高背光强度下大尺寸高分辨液晶面板的显示品味。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种TFT阵列基板的制作方法，其特征在于，包括以下步骤：
S10：提供衬底基板，在所述衬底基板上形成第一金属层，采用第一道光罩工艺对所述第一金属层进行图案化处理以形成栅极，在所述栅极和所述衬底基板上依次形成栅极绝缘层、半导体层、刻蚀阻挡层以及第二金属层；
S20：采用第二道光罩工艺对所述第二金属层、所述刻蚀阻挡层以及所述半导体层进行图案化处理以形成源极、漏极以及非晶硅岛，所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐；
S30：在所述栅极绝缘层、所述源极以及所述漏极上形成钝化层，采用第三道光罩工艺对所述钝化层进行图案化处理，以形成过孔；以及
S40：采用第四道光罩工艺在所述钝化层上图案化形成像素电极，所述像素电极通过所述过孔与所述漏极连接。
2.根据权利要求1所述的TFT阵列基板的制作方法，其特征在于，所述步骤S20包括以下步骤：
S201：在所述第二金属层上涂覆光阻材料；
S202：采用所述第二道光罩对所述光阻材料曝光显影以形成第一光阻层；
S203：刻蚀去除所述第一光阻层未覆盖的所述第二金属层和所述刻蚀阻挡层；
S204：对所述第一光阻层进行灰化处理以形成第二光阻层，所述第二光阻层对应于所述源极和所述漏极；
S205：对所述第二金属层进行刻蚀处理以形成所述源极和所述漏极；
S206：剥离所述第二光阻层；以及
S207：刻蚀去除未被所述刻蚀阻挡层、所述源极以及所述漏极遮盖的所述半导体层。
3.根据权利要求2所述的TFT阵列基板的制作方法，其特征在于，所述半导体层包括非晶硅层和N+非晶硅层，所述步骤S207还包括，刻蚀去除所述沟道区的所述N+非晶硅层以露出所述非晶硅层。
4.根据权利要求3所述的TFT阵列基板的制作方法，其特征在于，所述步骤S207包括以下步骤：
S2071：以所述刻蚀阻挡层为掩膜，采用干法刻蚀工艺去除位于所述刻蚀阻挡层外侧的所述半导体层；
S2072：以所述源极和所述漏极为掩膜，采用干法刻蚀工艺去除所述沟道区的所述刻蚀阻挡层；以及
S2073：以所述刻蚀阻挡层为掩膜，采用干法刻蚀工艺去除位于所述沟道区的所述N+非晶硅层以露出所述非晶硅层。
5.根据权利要求4所述的TFT阵列基板的制作方法，其特征在于，去除所述沟道区的所述N+非晶硅层的厚度为
Figure FDA0002337582730000021
6.根据权利要求4所述的TFT阵列基板的制作方法，其特征在于，所述步骤S2071、所述步骤S2072以及步骤S2073采用同一道干法刻蚀制程。
7.根据权利要求2所述的TFT阵列基板的制作方法，其特征在于，所述步骤S203中采用湿法刻蚀工艺，所述步骤S205中采用湿法刻蚀工艺。
8.根据权利要求1所述的TFT阵列基板的制作方法，其特征在于，所述第二道光罩为半色调光罩。
9.一种TFT阵列基板，其特征在于，包括：
衬底基板；
栅极，位于所述衬底基板上；
栅极绝缘层，覆盖所述栅极和所述衬底基板；
非晶硅岛，设置于所述栅极绝缘层上；
刻蚀阻挡层，设置于所述非晶硅岛上；
源极、漏极，设置于所述刻蚀阻挡层上，所述源极和所述漏极之间形成沟道区；
钝化层，设置于所述栅极绝缘层、所述源极以及所述漏极上，所述钝化层上设置有过孔；以及
像素电极，设置于所述钝化层上，所述像素电极通过所述过孔与所述漏极连接；
其中，所述非晶硅岛的边缘与所述源极的边缘、所述漏极的边缘以及所述刻蚀阻挡层的边缘均对齐。
10.根据权利要求9所述的TFT阵列基板，其特征在于，所述非晶硅岛包括非晶硅层和N+非晶硅层，所述N+非晶硅层对应于所述源极和所述漏极，所述非晶硅层对应于所述源极、所述漏极以及所述沟道区。
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