CN111081756A - 一种优化米勒电容和导通压降的功率器件及制备方法 - Google Patents
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Abstract
本发明公开了一种优化米勒电容和导通压降的功率器件及制备方法，包括衬底，位于衬底左上方的阱区域，阱区域右侧为局部高掺注入区域；阱区域上方依次离子注入形成第二导电类型重掺区和第一导电类型重掺区；阱区域重掺区上方设置发射极，衬底右上方依次生长栅氧化层和栅极，衬底下方设置收集极。本发明通过区域注入方式替代普遍注入方式，确保在阱周边3um～5um的区域进行注入，栅极下方其余位置不进行注入，可以实现注入浓度的提升，从5E11～1E12atom/cm2增加到3E12～5E12atom/cm2，从而在不影响米勒(Miller)电容的前提下，降低器件导通压降。
Description
技术领域
本发明涉及功率半导体技术，尤其涉及一种优化米勒电容和导通压降的功率器件及制备方法。
背景技术
栅控型功率器件(如功率MOSFET和IGBT)是现代通用的电力半导体器件，主要应用于新能源、机车牵引、智能电网、高压变频器等领域。通过电力半导体器件对电能进行变换及控制，节能效果可达10％-40％。在全球气候变暖的背景下，栅控型功率器件应用技术是被公认的实现全球能效和二氧化碳减排目标的最佳综合性方法之一。
常规的栅控型功率器件(以IGBT为例)基本结构如图1所示，包含N型衬底4，栅极1，发射极2，收集极3，P型阱区域5，N型重掺区6，改进安全工作区的P型重掺区7。
在器件导通状态下，电子电流和空穴电流的通道如图1所示。其中，电子电流从N型重掺区6出发，流经沟道(栅极1和P型阱区域5相交的区域)，注入N型衬底，从收集极3流出。而空穴电流从收集极3出发，流经N型衬底，P型阱区域，然后在N型重掺区6下方被发射极2吸收。
器件的导通压降主要由N型衬底中的自由电子和空穴的浓度决定。由于增加P+收集极3的掺杂浓度来降低器件导通压降的方法会导致器件在开关过程中的功耗增加，常规设计是通过引入N-注入8(注入浓度大于N型衬底掺杂浓度)来增加器件表面的载流子浓度，从而降低器件的导通压降。采用常规普遍注入方式(没有光罩)来实现。
通过N-注入改善导通压降的同时，由于器件表面载流子浓度增加，会导致米勒(Miller)电容增大，从而致使器件开关速度变慢，功耗增加。在器件的导通压降和米勒电容之间取折中(trade-off)，在改善器件导通压降的同时减少米勒电容的增加。因此，采用常规普遍注入方式实现的N-掺杂浓度较小，保持在5E11～1E12 atom/cm2范围。
发明内容
发明目的：针对以上问题，本发明提出一种优化米勒电容和导通压降的功率器件及制备方法，通过区域注入方式，实现N-注入浓度的提升，在不影响米勒电容的前提下，降低器件导通压降。
技术方案：为实现本发明的目的，本发明所采用的技术方案是：一种优化米勒电容和导通压降的功率器件，包括衬底，位于衬底左上方的阱区域，阱区域右侧为局部高掺注入区域；阱区域上方依次离子注入形成第二导电类型重掺区和第一导电类型重掺区；阱区域重掺区上方设置发射极，衬底右上方依次生长栅氧化层和栅极，衬底下方设置收集极。
进一步地，所述阱区域右侧3-5um为局部高掺注入区域。
进一步地，所述衬底和局部高掺注入区域为第一导电类型，所述阱区域和收集极为第二导电类型。
一种优化米勒电容和导通压降的功率器件制备方法，包括步骤：
(1)在衬底上方右侧区域进行光刻，形成光刻胶阻挡区域；
(2)在衬底上方进行离子注入，形成局部高掺注入区域；
(3)去除光刻胶，在衬底上方生长形成栅氧化层和多晶硅层，然后通过光刻和刻蚀工艺形成多晶硅栅极；
(4)以栅极作为阻挡层，进行P型阱离子注入，然后进行热过程推进，形成阱区域；
(5)通过光刻工艺，进行离子注入，依次形成第二导电类型重掺区和第一导电类型重掺区；
(6)通过金属溅射工艺在阱区域重掺区上方制备发射极，在衬底下方制备收集极；
(7)通过沉积和刻蚀制备器件表面钝化层，最终得到器件的完整结构。
进一步地，所述衬底和局部高掺注入区域为第一导电类型，所述阱区域和收集极为第二导电类型。
进一步地，所述第二导电类型重掺区的注入深度为30Kev～100Kev，注入浓度为1E15～5E15 atom/cm2；所述第一导电类型重掺区的注入深度为30Kev～70Kev，注入浓度为1E15～5E15 atom/cm2。
进一步地，所述阱区域右侧3-5um为局部高掺注入区域。
进一步地，所述局部高掺注入区域注入浓度为3E12～5E12 atom/cm2。
有益效果：本发明通过区域注入方式，可以实现注入浓度的提升，从5E11～1E12atom/cm2增加到3E12～5E12 atom/cm2，从而在不影响米勒(Miller)电容的前提下，降低器件导通压降。
附图说明
图1是现有技术普遍注入的功率器件结构图；
图2是本发明采用区域注入的功率器件结构图；
图3是光刻工艺示意图。
具体实施方式
下面结合附图和实施例对本发明的技术方案作进一步的说明。
如图2所示，本发明所述的优化米勒电容和导通压降的功率器件，包括衬底4，位于衬底4左上方的阱区域5，阱区域5右侧3-5um为局部高掺注入区域8；阱区域5上方依次离子注入形成第二导电类型重掺区7和第一导电类型重掺区6；阱区域5重掺区上方设置发射极2，衬底4右上方依次生长栅氧化层和栅极1，衬底4下方设置收集极3。
衬底4和局部高掺注入区域8为第一导电类型，阱区域5和收集极3为第二导电类型。如果第一导电类型为N型，则第二导电类型为P型；如果第一导电类型为P型，则第二导电类型为N型。
如图2所示，本发明通过N-光罩(mask)实现区域注入，确保在P型阱区域5周边3um～5um的区域进行N-注入，这部分区域刚好是电子电流和和空穴电流流经的途径，栅极下方其余位置不进行N-注入，这部分区域是米勒(Miller)电容的主要构成部分。因此可以实现N-注入浓度的提升，N-注入浓度范围可增加到3E12～5E12 atom/cm2，从而在不影响米勒(Miller)电容的前提下，降低器件导通压降。
本发明所述的优化米勒电容和导通压降的功率器件制备方法，包括步骤：
(1)在衬底4上方右侧区域进行光刻，形成光刻胶阻挡区域，如图3所示；
(2)在衬底4上方进行离子注入，形成局部高掺注入区域8；局部高掺注入区域8注入浓度为3E12～5E12 atom/cm2；
(3)去除光刻胶，在衬底4上方生长形成栅氧化层和多晶硅层，然后通过光刻和刻蚀工艺形成多晶硅栅极1；
(4)以栅极1作为阻挡层，进行P型阱离子注入，然后进行热过程推进，形成阱区域5；
(5)通过光刻工艺，进行离子注入，依次形成第二导电类型重掺区7和第一导电类型重掺区6；
第二导电类型重掺区7的注入深度为30Kev～100Kev，注入浓度为1E15～5E15atom/cm2；所述第一导电类型重掺区6的注入深度为30Kev～70Kev，注入浓度为1E15～5E15 atom/cm2。
(6)通过金属溅射工艺在阱区域5重掺区上方制备发射极2，在衬底4下方制备收集极3；
(7)通过沉积和刻蚀制备器件表面钝化层，最终得到器件的完整结构。
Claims (8)
1.一种优化米勒电容和导通压降的功率器件，其特征在于，包括衬底(4)，位于衬底(4)左上方的阱区域(5)，阱区域(5)右侧为局部高掺注入区域(8)；阱区域(5)上方依次离子注入形成第二导电类型重掺区(7)和第一导电类型重掺区(6)；阱区域(5)重掺区上方设置发射极(2)，衬底(4)右上方依次生长栅氧化层和栅极(1)，衬底(4)下方设置收集极(3)。
2.根据权利要求1所述的优化米勒电容和导通压降的功率器件，其特征在于，所述阱区域(5)右侧3-5um为局部高掺注入区域(8)。
3.根据权利要求1所述的优化米勒电容和导通压降的功率器件，其特征在于，所述衬底(4)和局部高掺注入区域(8)为第一导电类型，所述阱区域(5)和收集极(3)为第二导电类型。
4.一种优化米勒电容和导通压降的功率器件制备方法，其特征在于，包括步骤：
(1)在衬底(4)上方右侧区域进行光刻，形成光刻胶阻挡区域；
(2)在衬底(4)上方进行离子注入，形成局部高掺注入区域(8)；
(3)去除光刻胶，在衬底上方生长形成栅氧化层和多晶硅层，然后通过光刻和刻蚀工艺形成多晶硅栅极(1)；
(4)以栅极(1)作为阻挡层，进行P型阱离子注入，然后进行热过程推进，形成阱区域(5)；
(5)通过光刻工艺，进行离子注入，依次形成第二导电类型重掺区(7)和第一导电类型重掺区(6)；
(6)通过金属溅射工艺在阱区域(5)重掺区上方制备发射极(2)，在衬底(4)下方制备收集极(3)；
(7)通过沉积和刻蚀制备器件表面钝化层，最终得到器件的完整结构。
5.根据权利要求4所述的优化米勒电容和导通压降的功率器件制备方法，其特征在于，所述衬底(4)和局部高掺注入区域(8)为第一导电类型，所述阱区域(5)和收集极(3)为第二导电类型。
6.根据权利要求4所述的优化米勒电容和导通压降的功率器件制备方法，其特征在于，所述第二导电类型重掺区(7)的注入深度为30Kev～100Kev，注入浓度为1E15～5E15atom/cm2；所述第一导电类型重掺区(6)的注入深度为30Kev～70Kev，注入浓度为1E15～5E15atom/cm2。
7.根据权利要求4所述的优化米勒电容和导通压降的功率器件制备方法，其特征在于，所述阱区域(5)右侧3-5um为局部高掺注入区域(8)。
8.根据权利要求4所述的优化米勒电容和导通压降的功率器件制备方法，其特征在于，所述局部高掺注入区域(8)注入浓度为3E12～5E12atom/cm2。
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| CN103872115A (zh) * | 2012-12-13 | 2014-06-18 | 中国科学院微电子研究所 | 一种增强微穿通型igbt |
| CN109494254A (zh) * | 2018-10-16 | 2019-03-19 | 扬州国扬电子有限公司 | 改进栅控型功率器件安全工作区性能的自对准工艺 |
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| CN103762230A (zh) * | 2014-01-24 | 2014-04-30 | 东南大学 | N沟道注入效率增强型绝缘栅双极型晶体管 |
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