CN111063664B - 一种模块化多芯片封装结构及其封装方法 - Google Patents

一种模块化多芯片封装结构及其封装方法 Download PDF

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CN111063664B
CN111063664B CN201911377957.7A CN201911377957A CN111063664B CN 111063664 B CN111063664 B CN 111063664B CN 201911377957 A CN201911377957 A CN 201911377957A CN 111063664 B CN111063664 B CN 111063664B
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董晨
马晓建
杨巧
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Huatian Technology Nanjing Co Ltd
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Abstract

本发明公开了一种模块化多芯片封装结构及其封装方法，在基板上的阵列多个封装单元，采用呈阶梯堆叠的多个芯片形成的封装单元，呈阶梯堆叠的芯片的引线端位于台阶表面，多个芯片的引线端通过芯片布线连接，芯片无需打线，减小了芯片的封装体积，避免了电性能在wirebond线上的损失，将多个芯片引线端一侧台阶表面通过第一塑封体塑封，第一塑封体底部设有与芯片布线连接的蚀刻线路，在基板上布设有连接布线，第一塑封体底部的蚀刻线路与基板上的连接布线连接，最后通过第二塑封体塑将多个封装单元封于基板上，塑封后芯片竖直设置于基板上，将独立的模块封装在一起可以将不同功能集成在一起，很好的打破了传统多芯片封装的限制，结构简单，连接稳定。

Description

一种模块化多芯片封装结构及其封装方法
【技术领域】
本发明属于存储芯片封装技术领域，具体涉及一种模块化多芯片封装结构及其封装方法。
【背景技术】
随着半导体封装行业的发展，存储类产品封装已经使用一种多芯片堆叠技术，以提供封装具有更大的储存或执行数据的容量，然而，传统多芯片堆叠封装一般将芯片以台阶状逐层堆叠的方式叠加来实现扩容，各层芯片直接通过wire bond打线实现互联，该方式一般需要芯片减薄厚度较薄，且打线悬空，这容易造成芯片裂片，且较长的wirebond打线也会使电性能有所损失。因此，对于这种封装方式而言，更高的集成度和可靠性显得至关重要。
【发明内容】
本发明的目的在于克服上述现有技术的缺点，提供一种模块化多芯片封装结构及其封装方法。
为达到上述目的，本发明采用以下技术方案予以实现：
一种模块化多芯片封装结构，包括基板和阵列于基板上的多个封装单元，封装单元包括多个呈阶梯堆叠的芯片，呈阶梯堆叠的芯片的引线端位于台阶表面，多个芯片的引线端通过芯片布线连接，多个芯片引线端一侧台阶表面通过第一塑封体塑封，第一塑封体底部设有与芯片布线连接的蚀刻线路；基板上布设有连接布线，第一塑封体底部的蚀刻线路与基板上的连接布线连接，多个封装单元通过第二塑封体塑封于基板上，塑封后芯片竖直设置于基板上。
进一步的，相邻两个芯片之间通过粘片胶膜连接。
进一步的，第一塑封体底部的蚀刻线路与基板上的连接布线通过锡球连接。
进一步的，基板上设有过孔，基板上端设置用于与封装单元电连接的布线，基板下端面设有连接布线，基板下端的连接布线与基板上端的布线通过过孔内导电体连通。
一种模块化多芯片封装结构的封装方法，包括以下步骤：
步骤1)、将多个芯片呈阶梯状依次堆叠，使芯片接线端位于阶梯上表面；
步骤2)、通过芯片布线连接阶梯表面的接线端；
步骤3)、通过第一塑封体将呈阶梯状依次堆叠的芯片塑封，然后将芯片布线引至沿芯片长度方向的第一塑封体一侧表面形成封装单元；
步骤4)、将多个封装单元表面的芯片布线与基板上端布线电连接，最后通过第二塑封体将多个封装单元与基板塑封后形成多芯片封装结构。
进一步的，相邻两个芯片通过粘片胶膜粘黏连接，多个芯片堆叠时水平放置。
进一步的，在形成的封装单元的第一塑封体一侧表面刻蚀布线与芯片布线连通。
进一步的，将多个封装单元表面的芯片布线与基板上端布线电连接时，芯片竖直设置于基板上。
进一步的，封装单元与基板上端通过锡球连接。
与现有技术相比，本发明具有以下有益效果：
本发明一种模块化多芯片封装结构，在基板上的阵列多个封装单元，采用呈阶梯堆叠的多个芯片形成的封装单元，呈阶梯堆叠的芯片的引线端位于台阶表面，多个芯片的引线端通过芯片布线连接，芯片无需打线，减小了芯片的封装体积，避免了电性能在wirebond线上的损失，将多个芯片引线端一侧台阶表面通过第一塑封体塑封，第一塑封体底部设有与芯片布线连接的蚀刻线路，在基板上布设有连接布线，第一塑封体底部的蚀刻线路与基板上的连接布线连接，最后通过第二塑封体塑将多个封装单元封于基板上，塑封后芯片竖直设置于基板上，将独立的模块封装在一起可以将不同功能集成在一起，很好的打破了传统多芯片封装的限制，结构简单，连接稳定；多芯片堆叠垂直放置，降低了芯片由于悬空、承重过大而可能产生的裂片风险，同时，通过第二塑封体将多个封装单元与基板塑封起到了二次保护的作用，提高了产品可靠性。
进一步的，相邻两个芯片之间通过粘片胶膜连接，连接稳定，连接体积小。
本发明一种多芯片堆叠封装结构的封装方法，通过多芯片正面通过焊接与重布线路层的每一个接口进行电性连接，减小了电性损失，无冲线风险，且芯片堆叠数量与塑封厚度灵活可调。
【附图说明】
图1为本发明的结构示意图。
图2为本发明封装单元结构示意图。
图3为本发明第一次塑封后底部植球结构示意图。
图4为本发明呈阶梯状依次堆叠的芯片结构示意图。
图5为本发明呈阶梯状依次堆叠的芯片通过芯片布线连接后结构示意图。
其中：1：基板，2：锡球，3：芯片布线，4：芯片，5：粘片胶膜(DAF)，6：第一塑封体，7：第二塑封体，8：过孔，9：连接布线。
【具体实施方式】
下面结合附图对本发明做进一步详细描述：
参见图1至图5所示，一种模块化多芯片封装结构，包括基板1和阵列于基板1上的多个封装单元，封装单元包括多个呈阶梯堆叠的芯片4，多个芯片4的引线端通过芯片布线3连接，多个芯片4引线端一侧台阶表面通过第一塑封体6塑封，第一塑封体6底部设有与芯片布线3连接的蚀刻线路；基板1上布设有连接布线，第一塑封体6底部的蚀刻线路与基板1上的连接布线连接，塑封后芯片4竖直设置于基板1上，多个封装单元通过第二塑封体7塑封于基板1上。呈阶梯堆叠的芯片4的引线端位于台阶表面，通过在呈阶梯堆叠的芯片4的台阶表面通过芯片布线3实现各芯片的连通，连接稳定，各芯片4之间连接空间小，且各芯片4之间没有空间，避免了芯片裂片的风险。
相邻两个芯片4之间通过粘片胶膜连接，连接稳定，连接体积小。
第一塑封体6底部的蚀刻线路与基板1上的连接布线通过锡球2连接。
基板1上设有过孔8，基板1上端设置用于与封装单元电连接的布线，基板1下端面设有连接布线9，基板1下端的连接布线9与基板1上端的布线通过过孔8内导电体连通。
一种模块化多芯片封装结构封装方法，包括以下步骤：
步骤1)、将多个芯片4呈阶梯状依次堆叠，使芯片4接线端位于阶梯上表面；如图4所示，相邻两个芯片4通过粘片胶膜5粘黏连接，多个芯片4堆叠时水平放置，确保相邻两个芯片4粘黏连接稳定；
步骤2)、通过芯片布线3连接阶梯表面的接线端，形成芯片4连接结构，如图5所示；
步骤3)、通过第一塑封体6将4呈阶梯状依次堆叠的芯片4塑封，然后将芯片布线3引至沿芯片4长度方向的第一塑封体6一侧表面形成封装单元；在形成的封装单元的第一塑封体6一侧表面刻蚀布线与芯片布线3连通，通过植球形成与基本连接的锡球2；
将芯片布线3引至沿芯片4长度方向的第一塑封体6一侧表面即将芯片布线3引至最终成型后的封装单元底部；
步骤4)、将多个封装单元表面的芯片布线3与基板1上端布线电连接，最后通过第二塑封体将多个封装单元与基板1塑封后形成多芯片封装结构。
本申请将多个芯片4呈阶梯状依次堆叠，使芯片4接线端位于阶梯上表面，大大降低了传输过程中的电性损失。
多芯片堆叠垂直放置，降低了芯片由于悬空、承重过大而可能产生的裂片风险，同时，通过第二塑封体将多个封装单元与基板1塑封起到了二次保护的作用，提高了产品可靠性。多模块并列垂直于基板放置，使得整体结构平衡性更好，对进一步提高产品封装可靠性大有裨益。模块化设计可以灵活用于产品的扩容，提高产片集成度。不同模块封装更有利于产品实现多功能化。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (5)

1.一种模块化多芯片封装结构的封装方法，其特征在于，所述模块化多芯片封装结构包括基板（1）和阵列于基板（1）上的多个封装单元，封装单元包括多个呈阶梯堆叠的芯片（4），呈阶梯堆叠的芯片（4）的引线端位于台阶表面，多个芯片（4）的引线端通过芯片布线（3）连接，多个芯片（4）引线端一侧台阶表面通过第一塑封体（6）塑封，第一塑封体（6）底部设有与芯片布线（3）连接的蚀刻线路；基板（1）上布设有连接布线，第一塑封体（6）底部的蚀刻线路与基板（1）上的连接布线连接，多个封装单元通过第二塑封体（7）塑封于基板（1）上，塑封后芯片（4）竖直设置于基板（1）上；
具体包括以下步骤：
步骤1）、将多个芯片（4）呈阶梯状依次堆叠，使芯片（4）接线端位于阶梯上表面；
步骤2）、通过芯片布线（3）连接阶梯表面的接线端；
步骤3）、通过第一塑封体（6）将呈阶梯状依次堆叠的芯片（4）塑封，然后将芯片布线（3）引至沿芯片（4）长度方向的第一塑封体（6）一侧表面形成封装单元；相邻两个芯片（4）通过粘片胶膜（5）粘黏连接，多个芯片（4）堆叠时水平放置；在形成的封装单元的第一塑封体（6）一侧表面刻蚀并布线，布线与芯片布线（3）连通；
步骤4）、将多个封装单元表面的芯片布线（3）与基板（1）上端布线电连接，最后通过第二塑封体（7）将多个封装单元与基板（1）塑封后形成多芯片封装结构。
2.根据权利要求1所述一种模块化多芯片封装结构的封装方法，其特征在于，第一塑封体（6）底部的蚀刻线路与基板（1）上的连接布线通过锡球（2）连接。
3.根据权利要求1所述一种模块化多芯片封装结构的封装方法，其特征在于，基板（1）上设有过孔（8），基板（1）上端设置用于与封装单元电连接的布线，基板（1）下端面设有连接布线（9），基板（1）下端的连接布线（9）与基板（1）上端的布线通过过孔（8）内导电体连通。
4.根据权利要求1所述一种模块化多芯片封装结构的封装方法，其特征在于，将多个封装单元表面的芯片布线（3）与基板（1）上端布线电连接时，芯片（4）竖直设置于基板（1）上。
5.根据权利要求1所述一种模块化多芯片封装结构的封装方法，其特征在于，封装单元与基板（1）上端通过锡球（2）连接。
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