CN110544704A - 驱动基板及制作方法、微led绑定方法 - Google Patents
驱动基板及制作方法、微led绑定方法 Download PDFInfo
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- CN110544704A CN110544704A CN201910911119.7A CN201910911119A CN110544704A CN 110544704 A CN110544704 A CN 110544704A CN 201910911119 A CN201910911119 A CN 201910911119A CN 110544704 A CN110544704 A CN 110544704A
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- 239000000758 substrate Substances 0.000 title claims abstract description 126
- 238000000034 method Methods 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000010409 thin film Substances 0.000 claims abstract description 29
- 230000000149 penetrating effect Effects 0.000 claims abstract description 12
- 239000004020 conductor Substances 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 117
- 239000000463 material Substances 0.000 claims description 25
- 238000002161 passivation Methods 0.000 claims description 12
- 239000011229 interlayer Substances 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000009413 insulation Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 7
- 230000035515 penetration Effects 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000002346 layers by function Substances 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
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Abstract
本发明提供一种驱动基板及制作方法、微LED绑定方法,涉及显示技术领域。驱动基板包括:衬底基板;驱动功能层,设置于衬底基板上,包括多个驱动薄膜晶体管和多条公共电极线;焊盘层,设置于驱动功能层远离衬底基板的一侧,包括多个第一焊盘和多个第二焊盘,第一焊盘与对应的驱动薄膜晶体管的第一极连接,第二焊盘与对应的公共电极线连接,第一焊盘和第二焊盘均包括焊盘本体和设置于焊盘本体远离衬底基板一侧的硬质导电材质的微结构;多个缓冲结构,缓冲结构包围对应的微结构,缓冲结构的高度低于所述微结构的高度。本发明实施例解决了微LED大面积绑定的过程中,难以保证微结构刺入微LED电极的均一性和良率的问题。
Description
技术领域
本发明涉及显示技术领域,尤其涉及驱动基板及制作方法、微LED绑定方法。
背景技术
微LED(微发光二极管)显示技术是将现有LED(发光二极管)的尺寸微缩至100um以下,尺寸约为现有LED尺寸的1%,再通过巨量转移技术,将其转移到驱动基板上,从而形成各种不同尺寸的微LED显示器。微LED具有自发光高亮度、高对比度、超高分辨率与色彩饱和度、长寿命、响应速度快、节能、适应环境宽泛等诸多优点,在各领域都有良好的应用前景。为了降低产品成本,保证产品质量,将微LED与驱动基板连接在一起的绑定工艺必须满足大面积、高良率的要求。
发明内容
有鉴于此,本发明提供一种驱动基板及制作方法、微LED绑定方法,用于解决微LED大面积绑定的过程中,难以保证微结构刺入微LED电极的均一性和良率的问题。
为解决上述技术问题,本发明提供一种驱动基板所述驱动基板包括:
衬底基板;
驱动功能层,设置于所述衬底基板上,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
焊盘层,所述焊盘层设置于所述驱动功能层远离所述衬底基板的一侧,所述焊盘层包括多个第一焊盘和多个第二焊盘,所述第一焊盘与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
多个缓冲结构,所述缓冲结构包围对应的所述微结构,所述缓冲结构的高度低于所述微结构的高度。
可选的,所述缓冲结构的材质为光敏性树脂材料。
可选的,所述缓冲结构为梯形台状或圆台状。
可选的,所述微结构的材质与所述焊盘本体的材质相同。
可选的,所述微结构为锥尖状或微管状。
可选的,所述驱动基板具体包括:
所述衬底基板;
位于所述衬底基板上的缓冲层;
有源层,位于所述缓冲层远离所述衬底基板的一侧;
栅极绝缘层,位于所述有源层远离所述衬底基板的一侧;
驱动薄膜晶体管的栅极,位于所述栅极绝缘层远离所述衬底基板的一侧;
层间绝缘层,位于所述栅极远离所述衬底基板的一侧;
源漏金属层,位于所述层间绝缘层远离所述衬底基板的一侧,所述源漏金属层包括:驱动薄膜晶体管的第一极、第二极和公共电极线,所述第一极和第二极通过贯通所述层间绝缘层和所述栅极绝缘层的过孔与所述有源层连接;
平坦化层,位于所述源漏金属层远离所述衬底基板的一侧;
钝化层,位于所述平坦化层远离所述衬底基板的一侧;
焊盘层,设置于所述钝化层远离所述衬底基板的一侧,包括多个第一焊盘和多个第二焊盘,所述第一焊盘通过贯通所述平坦化层和所述钝化层的过孔与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘通过贯通所述平坦化层和所述钝化层的过孔与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
多个缓冲结构,所述缓冲结构包围对应的所述微结构,所述缓冲结构的高度低于所述微结构的高度。
另外,本发明实施例还提供了一种驱动基板制作方法,包括:
提供一衬底基板;
在所述衬底基板上形成驱动功能层,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
在所述驱动功能层远离所述衬底基板的一侧形成焊盘层,所述焊盘层包括多个第一焊盘和多个第二焊盘,所述第一焊盘与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
形成包围所述微结构的多个缓冲结构,所述缓冲结构的高度低于所述微结构的高度。
可选的,所述在所述驱动功能层远离所述衬底基板的一侧形成焊盘层包括:
形成多个焊盘本体,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接;
在所述焊盘本体上形成微结构;
或者,
通过一次构图工艺形成多个焊盘本体和多个微结构,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接。
可选的,所述形成包围所述微结构的多个缓冲结构包括:
在所述焊盘层上涂敷光敏材料,形成光敏材料层;
采用掩膜版对所述光敏材料层进行灰度曝光,并显影,形成包围所述微结构的多个缓冲结构。
另外,本发明实施例还提供了一种微LED绑定方法,包括:
提供驱动基板,所述驱动基板为上述驱动基板;
将装载有微LED的转移载板与所述驱动基板对合,并按压所述转移载板和/或所述驱动基板,使得所述驱动基板的微结构刺入所述微LED的第三焊盘和第四焊盘内,所述驱动基板的第一焊盘与所述微LED的第三焊盘接触,所述驱动基板的第二焊盘与所述微LED的第四焊盘接触。
本发明的上述技术方案的有益效果如下:提供了一种设置有缓冲结构的驱动基板,缓冲结构围绕微结构设置,在微LED大面积绑定的过程中,由于在微结构与微LED电极的接触过程中受到了缓冲结构的缓冲作用,因此可以适当地增加压力以保证微结构插入微LED电极的深度一致,同时避免压力过大使得微结构进一步插入微LED,从而避免了微LED的损伤,增加了微LED大面积绑定的均一性和良率。
附图说明
图1为使用现有技术中的驱动基板进行微LED绑定的结构示意图之一;
图2为使用现有技术中的驱动基板进行微LED绑定的结构示意图之二;
图3为本发明一实施例中的驱动基板的结构示意图;
图4为使用本发明一实施例中的驱动基板进行微LED绑定的结构示意图;
图5为本发明一实施例中的驱动基板制作方法的流程示意图;
图6为本发明另一实施例中的驱动基板制作方法的流程示意图;
图7为本发明一实施例中的驱动基板制作方法的涂敷过程示意图;
图8为本发明一实施例中的驱动基板制作方法的曝光过程示意图;
图9为本发明一实施例中的微LED绑定方法的流程示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例的附图,对本发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于所描述的本发明的实施例,本领域普通技术人员所获得的所有其他实施例,都属于本发明保护的范围。
采用微结构对微LED进行绑定时,将所述微LED粘附在临时转移载板上,通过对所述临时转移载板施加一定的作用力使微结构刺入微LED的电极中,其中电极的厚度为2-3um,微结构的高度为2-3um。为了实现大面积的微LED绑定,需要采用大面积的临时转移载板,然而,由于存在对大面积的临时载板施压均一性的差异、锥尖高度制作的均一性差异等,很难保证锥尖压入的深度一致。如图1所示,不同区域的微结构刺入深度不同,区域A刺入过深,区域B刺入深度适中,区域C刺入过浅,当微结构刺入深度越深时,微LED与驱动基板的连接电阻越小,这就导致接触电阻会存在比较大的差异,最终表现为微LED显示不均。此外,如图2所示,为了提高绑定的均一性,避免微结构压入电极的深度过浅,可以增大施加在临时转移载板上的作用力,但当施加的作用力过大时,容易过深地刺入微LED的电极,损坏微LED的芯片,造成绑定失效,因此难以兼顾微LED绑定过程中微结构刺入微LED电极的均一性和良率。
请参考图3,图3为本发明一实施例中的驱动基板的结构示意图,为了解决上述问题,本发明实施例提供了一种驱动基板,包括:
衬底基板301,所述衬底基板可以为玻璃衬底,也可以是其它材质的衬底;
驱动功能层302,设置于所述衬底基板301上,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
焊盘层303,所述焊盘层303设置于所述驱动功能层302远离所述衬底基板301的一侧,所述焊盘层303包括多个第一焊盘3031和多个第二焊盘3032,所述第一焊盘3031与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘3032与对应的所述公共电极线连接,所述第一焊盘3031和第二焊盘3032均包括焊盘本体(SD2)3034和设置于所述焊盘本体3034远离所述衬底基板一侧的硬质导电材质的微结构3033;
其中,所述第一焊盘3031和第二焊盘3032根据需求形成nхm型阵列;
多个缓冲结构304,所述缓冲结构304包围对应的所述微结构3033,所述缓冲结构304的高度低于所述微结构3033的高度;
其中,所述多个第一焊盘3031和所述多个第二焊盘3032的高度一致,所述多个缓冲结构304的高度一致。
本发明的上述实施例中,在微结构的周围设置了缓冲结构,从而提供了一种具有缓冲结构的驱动基板,如图4所示,由于缓冲结构的存在,在大面积绑定的过程中,能够在增加施加的压力以保证为微结构插入微LED电极的深度均一的同时,避免因压力过大导致微LED的损坏,同时提高了微LED绑定过程中微结构刺入微LED电极的均一性和良率。
在本发明的一些实施例中,所述缓冲结构304的材质为光敏性树脂材料。
本发明的上述实施例中,在制作缓冲结构的过程中能够利用缓冲结构材料的光敏性采用光刻工艺进行制作,树脂材料在便于成型的同时还具有一定的弹性,能够更好地起到缓冲的作用,避免微LED以及焊盘层受损。
在本发明的一些实施例中,所述缓冲结构304为梯形台状或圆台状。
本发明的上述实施例中,梯形台状或圆台状的上下平台与驱动功能层平行,因此能够实现保证微LED的绑定工艺均一性,此外梯形台状或圆台状是十分稳定的结构,制作难度小,采用该形状降低了缓冲结构的制作难度。
在本发明的一些实施例中,所述微结构3033的材质与所述焊盘本体3034的材质相同;
所述微结构3033的材质和所述焊盘本体3034的材质可以是源漏金属材质。
本发明的上述实施例中,微结构与焊盘本体采用相同的材质制作,不仅减少了更换材质的工艺流程,也提供了更多的焊盘层的制作方式,微结构和焊盘本体不仅可以分开制作,也可以作为整体制作。
在本发明的一些实施例中,所述微结构3033为锥尖状或微管状。
本发明的上述实施例中,锥尖状或微管状的微结构形状简单,制作方便,同时能够稳定地插入微LED的电极,保证绑定的稳定性。
在本发明的一些实施例中,如图3所示,所述驱动基板具体包括:
所述衬底基板301;
位于所述衬底基板上的缓冲层(Buffer)3021;
有源层(Active)3022,位于所述缓冲层远离所述衬底基板301的一侧,所述有源层可以采用LTPS(低温多晶硅);
栅极绝缘层(GI)3023,位于所述有源层3022远离所述衬底基板301的一侧;
驱动薄膜晶体管的栅极(Gate)3024,位于所述栅极绝缘层3023远离所述衬底基板301的一侧;
层间绝缘层(ILD)3025,位于所述栅极3024远离所述衬底基板301的一侧;
源漏金属层,位于所述层间绝缘层3025远离所述衬底基板301的一侧,所述源漏金属层包括:驱动薄膜晶体管的第一极(Drain)3026、第二极(Source)3027和公共电极线(SD1)3028,所述第一极3026和第二极3027通过贯通所述层间绝缘层3025和所述栅极绝缘层3023的过孔与所述有源层3022连接;
平坦化层(PLN)3029,位于所述源漏金属层远离所述衬底基板301的一侧;
钝化层(PVX)30210,位于所述平坦化层3029远离所述衬底基板301的一侧;
焊盘层303,设置于所述钝化层30210远离所述衬底基板301的一侧,包括多个第一焊盘3031和多个第二焊盘3032,所述第一焊盘3031通过贯通所述平坦化层3029和所述钝化层30210的过孔与对应的所述驱动薄膜晶体管的第一极3026连接,所述第二焊盘3032通过贯通所述平坦化层3029和所述钝化层30210的过孔与对应的所述公共电极线3028连接,所述第一焊盘3031和第二焊盘3032均包括焊盘本体3034和设置于所述焊盘本体3034远离所述衬底基板301一侧的硬质导电材质的微结构3033;
多个缓冲结构304,所述缓冲结构304包围对应的所述微结构3033,所述缓冲结构3034的高度低于所述微结构3033的高度。
本发明的上述实施例中,提供了一种驱动基板,与微LED绑定后能够驱动其显示,此外由于具有缓冲结构,上述实施例中提供的驱动基板不仅有利于绑定过程中增大施加于临时转移载板上的压力以提高为微结构与电极连接电阻的均一性,同时还能避免微结构插入微LED,对微LED的芯片造成损坏。
此外,本发明实施例还提供了一种驱动基板制作方法,如图5所示,包括:
步骤501:提供一衬底基板;
步骤502:在所述衬底基板上形成驱动功能层,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
步骤503:在所述驱动功能层远离所述衬底基板的一侧形成焊盘层,所述焊盘层包括多个第一焊盘和多个第二焊盘,所述第一焊盘与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
步骤504:形成包围所述微结构的多个缓冲结构,所述缓冲结构的高度低于所述微结构的高度。
本发明的上述实施例中,制作了一种具有缓冲结构的驱动基板,通过在驱动功能层上形成焊盘层实现驱动功能层和微LED电极的大面积连接,并且形成包围微结构的缓冲结构,即可以提高微结构与电极之间连接电阻的均一性,又能够避免施加压力过大造成微结构损坏微LED芯片,同时保证了微LED大铭记绑定过程中微结构刺入微LED电极的均一性和良率。
在本发明的一些实施例中,如图6所示,所述步骤503包括:
步骤5031:形成多个焊盘本体,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接;
步骤5032:在所述焊盘本体上形成微结构;
或者,
步骤5033:通过一次构图工艺形成多个焊盘本体和多个微结构,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接。
本发明的上述实施例中,通过两种方法制作焊盘层,既可以分别制作焊盘本体和微结构,也可以采用一次构图的工艺制作,制作方式多样灵活。
在本发明的一些实施例中,如图6所示,所述步骤504包括:
步骤5041:如图7所示,图7为本发明一实施例中的驱动基板制作方法的涂敷过程示意图,在所述焊盘层上涂敷光敏材料,形成光敏材料层(Resin)701;
步骤5042:采用掩膜版对所述光敏材料层进行灰度曝光,并显影,形成包围所述微结构的多个缓冲结构;
其中,如图8所示,所述掩膜版为灰度掩膜版801,所述灰度掩膜版通过在被曝光的部分加入金属条来调整被曝光部分的金属条密度,从而控制曝光强度,从而使得曝光后的光敏材料层701的各部分有不同的厚度,保证所述缓冲结构的上表面平行于所述驱动功能层的上表面;
其中,若所述光敏材料为光敏性树脂材料,所述步骤5042之后还可以包括步骤5043:对所述多个缓冲结构进行固化。
本发明的上述实施例中,采用灰度曝光制作出具有一定高度的缓冲结构,能够在已制作完成的驱动功能层和焊盘层的基础上直接制作多个缓冲结构,保证了缓冲结构高度的一致以及与为微结构的匹配度。
此外,本发明实施例还提供了一种微LED绑定方法,如图9所示,包括:
步骤901:提供驱动基板,所述驱动基板为上述驱动基板;
步骤902:将装载有微LED的转移载板与所述驱动基板对合,并按压所述转移载板和/或所述驱动基板,使得所述驱动基板的微结构刺入所述微LED的第三焊盘和第四焊盘内,所述驱动基板的第一焊盘与所述微LED的第三焊盘接触,所述驱动基板的第二焊盘与所述微LED的第四焊盘接触。
本发明的上述实施例中,采用具有缓冲结构的驱动基板对微LED进行绑定,能够在增加施加的压力以保证为微结构插入微LED电极的深度均一的同时,避免因压力过大导致微LED的损坏,同时提高了微LED绑定工艺的均一性和良率。
以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明所述原理的前提下,还可以作出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (10)
1.一种驱动基板,其特征在于,包括:
衬底基板;
驱动功能层,设置于所述衬底基板上,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
焊盘层,所述焊盘层设置于所述驱动功能层远离所述衬底基板的一侧,所述焊盘层包括多个第一焊盘和多个第二焊盘,所述第一焊盘与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
多个缓冲结构,所述缓冲结构包围对应的所述微结构,所述缓冲结构的高度低于所述微结构的高度。
2.如权利要求1所述的驱动基板,其特征在于,所述缓冲结构的材质为光敏性树脂材料。
3.如权利要求1所述的驱动基板,其特征在于,所述缓冲结构为梯形台状或圆台状。
4.如权利要求1所述的驱动基板,其特征在于,所述微结构的材质与所述焊盘本体的材质相同。
5.如权利要求1所述的驱动基板,其特征在于,所述微结构为锥尖状或微管状。
6.如权利要求1所述的驱动基板,其特征在于,具体包括:
所述衬底基板;
位于所述衬底基板上的缓冲层;
有源层,位于所述缓冲层远离所述衬底基板的一侧;
栅极绝缘层,位于所述有源层远离所述衬底基板的一侧;
驱动薄膜晶体管的栅极,位于所述栅极绝缘层远离所述衬底基板的一侧;
层间绝缘层,位于所述栅极远离所述衬底基板的一侧;
源漏金属层,位于所述层间绝缘层远离所述衬底基板的一侧,所述源漏金属层包括:驱动薄膜晶体管的第一极、第二极和公共电极线,所述第一极和第二极通过贯通所述层间绝缘层和所述栅极绝缘层的过孔与所述有源层连接;
平坦化层,位于所述源漏金属层远离所述衬底基板的一侧;
钝化层,位于所述平坦化层远离所述衬底基板的一侧;
焊盘层,设置于所述钝化层远离所述衬底基板的一侧,包括多个第一焊盘和多个第二焊盘,所述第一焊盘通过贯通所述平坦化层和所述钝化层的过孔与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘通过贯通所述平坦化层和所述钝化层的过孔与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
多个缓冲结构,所述缓冲结构包围对应的所述微结构,所述缓冲结构的高度低于所述微结构的高度。
7.一种驱动基板制作方法,其特征在于,包括:
提供一衬底基板;
在所述衬底基板上形成驱动功能层,所述驱动功能层包括多个驱动薄膜晶体管和多条公共电极线;
在所述驱动功能层远离所述衬底基板的一侧形成焊盘层,所述焊盘层包括多个第一焊盘和多个第二焊盘,所述第一焊盘与对应的所述驱动薄膜晶体管的第一极连接,所述第二焊盘与对应的所述公共电极线连接,所述第一焊盘和第二焊盘均包括焊盘本体和设置于所述焊盘本体远离所述衬底基板一侧的硬质导电材质的微结构;
形成包围所述微结构的多个缓冲结构,所述缓冲结构的高度低于所述微结构的高度。
8.根据权利要求7所述的驱动基板制作方法,其特征在于,所述在所述驱动功能层远离所述衬底基板的一侧形成焊盘层包括:
形成多个焊盘本体,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接;
在所述焊盘本体上形成微结构;
或者,
通过一次构图工艺形成多个焊盘本体和多个微结构,部分所述焊盘本体与所述驱动薄膜晶体管的第一极连接,部分所述焊盘本体与所述公共电极线连接。
9.根据权利要求7所述的驱动基板制作方法,其特征在于,所述形成包围所述微结构的多个缓冲结构包括:
在所述焊盘层上涂敷光敏材料,形成光敏材料层;
采用掩膜版对所述光敏材料层进行灰度曝光,并显影,形成包围所述微结构的多个缓冲结构。
10.一种微LED绑定方法,其特征在于,包括:
提供驱动基板,所述驱动基板为如权利要求1-6任一项所述的驱动基板;
将装载有微LED的转移载板与所述驱动基板对合,并按压所述转移载板和/或所述驱动基板,使得所述驱动基板的微结构刺入所述微LED的第三焊盘和第四焊盘内,所述驱动基板的第一焊盘与所述微LED的第三焊盘接触,所述驱动基板的第二焊盘与所述微LED的第四焊盘接触。
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