WO2019169770A1 - Led芯片及其制造方法、显示面板以及电子设备 - Google Patents

Led芯片及其制造方法、显示面板以及电子设备 Download PDF

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Publication number
WO2019169770A1
WO2019169770A1 PCT/CN2018/089793 CN2018089793W WO2019169770A1 WO 2019169770 A1 WO2019169770 A1 WO 2019169770A1 CN 2018089793 W CN2018089793 W CN 2018089793W WO 2019169770 A1 WO2019169770 A1 WO 2019169770A1
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Prior art keywords
electrode
extension
extension electrode
contact electrode
layer
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PCT/CN2018/089793
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English (en)
French (fr)
Inventor
韦冬
邢汝博
刘会敏
杨小龙
王建太
Original Assignee
昆山工研院新型平板显示技术中心有限公司
昆山国显光电有限公司
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Priority to US16/416,298 priority Critical patent/US10868217B2/en
Publication of WO2019169770A1 publication Critical patent/WO2019169770A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body

Definitions

  • the present invention relates to display technologies, and in particular, to an LED chip, a method of manufacturing the same, a display panel, and an electronic device.
  • Micro-LED Display is a new generation of display technology that uses micro LED units as sub-pixels for image display.
  • LCD liquid crystal display
  • the Micro-LED display panel can realize image display without using an external light source, which improves the lightness and thinness of the display panel.
  • OLED Organic Light-Emitting Diode
  • the life of the Micro-LED display panel is long, which has become a research hotspot in the industry.
  • the LED chip comprises: a sapphire substrate 1, an N-type gallium nitride 2, a quantum well layer 3 and a P-type gallium nitride 4, which are sequentially arranged on a sapphire substrate, and an indium tin oxide layer 5 on the P-type gallium nitride 4, a first contact electrode 6 on the indium tin oxide layer 5, and a second contact electrode 7 electrically connected to the N-type gallium nitride 2.
  • each LED is controlled by controlling the luminous intensity of the quantum well layer 3 and combining colorization techniques.
  • the chips are used as a sub-pixel unit to realize image display.
  • the problem to be solved by the present invention is to provide an LED chip, a manufacturing method thereof, a display panel, and an electronic device, which improve the yield of the display panel.
  • an LED chip comprising: a first semiconductor layer; an active layer and a second semiconductor layer sequentially disposed on the first semiconductor layer; a first contact electrode penetrating the active layer and a second semiconductor layer electrically connected to the first semiconductor layer; a second contact electrode on the second semiconductor layer and electrically connected to the second semiconductor layer; a first extension electrode on the first contact electrode And electrically connected to the first contact electrode, the first extension electrode includes a plurality of pits for soldering; the second extension electrode is located on the second contact electrode and electrically connected to the second contact electrode And isolated from the first extension electrode, the second extension electrode includes a plurality of pits for soldering.
  • At least a partial region of the first extension electrode or the second extension electrode is used to form the plurality of pits.
  • the first extension electrode and the second extension electrode are circular extension electrodes, and the entire area of the circular extension electrode is used to form the plurality of pits.
  • the surfaces of the first contact electrode and the second contact electrode are flush to form a surface; the first contact electrode and the second contact electrode are circular contact electrodes; A projected area of the electrode at the forming surface is greater than a projected area of the circular contact electrode at the forming surface.
  • the projection of the circular extension electrode and the circular contact electrode on the forming surface constitutes a concentric circle structure.
  • a circular area in the first extension electrode and the second extension electrode is used to form the plurality of pits.
  • the first contact electrode comprises a main contact electrode, and at least one auxiliary contact electrode isolated from the main contact electrode;
  • the first extension electrode comprises a main extension electrode covering the main contact electrode, covering a secondary extension electrode of the auxiliary contact electrode, and a linear extension electrode connecting the main extension electrode and the auxiliary extension electrode; wherein the main extension electrode is formed in a circular area above the main contact electrode Pits.
  • the second contact electrode comprises a main contact electrode, and at least one extension electrode connected to the main contact electrode; the second extension electrode covers the main contact electrode and the extension electrode, the first A circular region in which the second extension electrode is located above the main contact electrode is used to form the plurality of pits.
  • the surfaces of the first contact electrode and the second contact electrode are flush for forming a forming surface;
  • the main contact electrode is a circular contact electrode; and the circular area is at the surface forming surface
  • the projected area is larger than the projected area of the circular contact electrode at the forming surface.
  • the circular region and the projection of the circular contact electrode on the forming surface constitute a concentric circular structure.
  • the LED chip further includes: a first insulating layer between the first contact electrode and the second contact electrode, flush with a surface of the first contact electrode and the second contact electrode.
  • the method further includes: a second insulating layer between the first extension electrode and the second extension electrode for separating the first extension electrode from the second extension electrode.
  • the thickness of the second insulating layer is greater than the thickness of the first extension electrode or the second extension electrode.
  • the pits are circular, regular polygons or irregularly shaped pits.
  • the opening size of the pit is in the range of 8 nm to 10 ⁇ m.
  • a pitch of adjacent pits in the first extension electrode or the second extension electrode is in a range of 8 nm to 10 ⁇ m.
  • the thickness of the first extension electrode or the second extension electrode is in a range of 20 nm to 2 ⁇ m.
  • the material of the first extension electrode or the second extension electrode is metal.
  • a method of fabricating an LED chip further comprising: providing a substrate; sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on the substrate; forming through a source layer and a second semiconductor layer and electrically connecting the first contact electrode to the first semiconductor layer; forming a second contact electrode electrically connected to the second semiconductor layer on the second semiconductor layer; Forming, on a contact electrode, a first extension electrode electrically connected to the first contact electrode, the first extension electrode including a plurality of pits for soldering; forming and the second on the second contact electrode A second extension electrode electrically connected to the contact electrode and isolated from the first extension electrode, the second extension electrode including a plurality of pits for soldering.
  • the first extension electrode and the second extension electrode are formed by nanoimprinting or photolithography.
  • a first insulating layer is further formed between the first contact electrode and the second contact electrode, and is flush with a surface of the first contact electrode and the second contact electrode to form a surface;
  • the step of forming the first extension electrode and the second extension electrode comprises: covering the formation surface with a nano embossing glue; patterning the nano embossing glue by a nano embossing technique to form a nano embossed pattern layer; Forming a first conductive layer on the forming surface between the nanoimprint pattern layer and the nanoimprint pattern layer; removing the first conductive layer on the nanoimprint pattern layer, remaining on the forming surface
  • the first conductive layer is configured to constitute the first extension electrode and the second extension electrode; and the nanoimprint pattern layer is removed.
  • the step of forming the first conductive layer comprises: forming the first conductive layer by an evaporation process.
  • the step of forming the first conductive layer comprises: the thickness of the first conductive layer being less than the thickness of the nanoimprint pattern layer.
  • the step of removing the first conductive layer on the nanoimprint pattern layer comprises: removing the first conductive layer on the nanoimprint pattern layer by a lift-off process.
  • the step of forming the first contact electrode and the second contact electrode includes: forming a first opening penetrating the active layer and the second semiconductor layer and exposing the first semiconductor layer; at the first opening The bottom, the sidewall and the second semiconductor layer are covered with a first insulating material layer; the first insulating material layer is patterned to expose a bottom of the first opening and form a second opening on the second semiconductor layer; Filling the first opening and the second opening with a second conductive layer; planarizing the second conductive layer and the first insulating material layer, and the second conductive layer located in the first opening is used to form the a first contact electrode; a second conductive layer located in the second opening for forming a second contact electrode.
  • the method further includes: forming a second insulating layer between the first extension electrode and the second extension electrode.
  • the thickness of the second insulating layer is greater than the thickness of the first extension electrode or the second extension electrode.
  • the step of forming the second insulating layer includes: covering the first extended electrode, the second extended electrode, and the forming surface with a second insulating material layer; and patterning the second insulating material by a photolithography process a layer forming the second insulating layer.
  • a display panel includes: a driving backplane including: a substrate; and a plurality of circuit units on the substrate, the circuit unit including a first electrical terminal and a second electrical a plurality of LED chips that are placed on the driving backplane, the LED chip is an LED chip according to the present invention, and the first extension electrode of the LED chip is soldered to the first electricity through the pits And a second extension electrode of the LED chip is soldered to the second electrical terminal through the pit.
  • the substrate is a flexible substrate, a folded substrate or a stretched substrate.
  • an electronic device comprising the display panel of the present invention.
  • the present invention forms a first extension electrode electrically connected to the first contact electrode, and further forms a second extension electrode electrically connected to the second contact electrode, the first extension electrode and the second extension electrode each including a plurality of pits for soldering, such that when the LED chip is soldered to the driving backplane, the pits for soldering can accommodate the solder, increasing the contact area of the solder with the first extended electrode and the second extended electrode,
  • the first extension electrode or the second extension electrode can have a strong welding force with the driving back plate, so that it is not easy to fall off from the driving back plate, and the phenomenon of de-soldering occurs, thereby reducing the probability of occurrence of a bad point, thereby improving the probability. Display panel yield.
  • FIG. 1 is a cross-sectional view of an LED chip in the prior art
  • FIGS. 2 to 10 are schematic views of respective steps of a method of fabricating an LED chip according to an embodiment of the present invention.
  • Figure 11 is a cross-sectional view of an LED chip in accordance with one embodiment of the present invention.
  • Figure 12 is a plan view of the LED chip shown in Figure 11;
  • Figure 13 is a top plan view of an LED chip in accordance with another embodiment of the present invention.
  • Figure 14 is a top plan view of an LED chip in accordance with still another embodiment of the present invention.
  • Figure 15 is a top plan view of an LED chip in accordance with still another embodiment of the present invention.
  • Figure 16 is a top plan view of an LED chip in accordance with still another embodiment of the present invention.
  • Figure 17 is a plan view of an LED chip in accordance with still another embodiment of the present invention.
  • Figure 18 is a top plan view of an LED chip in accordance with still another embodiment of the present invention.
  • Figure 19 is a cross-sectional view of a display panel in accordance with one embodiment of the present invention.
  • the sapphire substrate 1 of the LED chip is removed, and a plurality of LED chips are bonded on the driving backplane, thereby realizing the LED. Batch transfer of chips.
  • the bonding process connects the first contact electrode 6 or the second contact electrode 7 to the driving backplane by a soldering process, so that the circuit unit on the driving backplane can be directed to the first contact electrode 6 and the second contact electrode 7 are loaded with a voltage.
  • the size of the first contact electrode 6 and the second contact electrode 7 is reduced to a few micrometers or even nanometers. Since the contact area is small, the bonding force of the first contact electrode 6 or the second contact electrode 7 to the driving back plate is reduced, and the probability of solder chip soldering is increased, resulting in an increase in the number of dead spots of the Micro-LED display panel.
  • the present invention provides a method of fabricating an LED chip, forming a first extension electrode electrically connected to the first contact electrode, and further forming a second extension electrode electrically connected to the second contact electrode,
  • the first extension electrode and the second extension electrode each include a plurality of pits for soldering.
  • the pits for soldering can also accommodate the solder, increasing the contact area of the solder with the first extension electrode and the second extension electrode, and the first extension electrode can be made
  • the second extension electrode and the driving back plate have strong welding force, so that it is not easy to fall off from the driving back plate and the phenomenon of de-soldering occurs, thereby improving the yield of the display panel.
  • LED chip manufacturing method includes:
  • a substrate 100 is provided.
  • the substrate 100 is used to provide a growth surface for a functional layer of an LED.
  • the substrate 100 is a sapphire substrate and has a good lattice matching with the gallium nitride material.
  • the substrate can also be silicon carbide.
  • a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 102 are sequentially formed on a substrate 100.
  • the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 102 are used to form a die of a light emitting diode, which is a functional layer of the LED chip.
  • the material of the first semiconductor layer 101 is N-type gallium nitride; the active layer 102 is a quantum well layer of an indium gallium nitride material; and the material of the second semiconductor layer 103 is P. Shaped gallium nitride.
  • the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 102 may be formed by a method of Metal Organic Chemical Vapor Deposition (MOCVD).
  • MOCVD Metal Organic Chemical Vapor Deposition
  • a first contact electrode 106 is formed through the active layer 102 and the second semiconductor layer 103 and electrically connected to the first semiconductor layer 101; and formed on the second semiconductor layer 103 The second semiconductor layer 103 is electrically connected to the second contact electrode 107.
  • the first contact electrode 106 and the second contact electrode 107 are used to apply voltages to the first semiconductor layer 101 and the second semiconductor layer 103, respectively.
  • the steps of forming the first contact electrode 106 and the second contact electrode 107 include:
  • a first opening 104 penetrating the active layer 102 and the second semiconductor layer 103 and exposing the first semiconductor layer 101 is formed.
  • the active layer 102 and the second semiconductor layer 103 are patterned by MESA lithography to form the first opening 104.
  • a channel penetrating through the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 and exposing the substrate 100 is formed by isolation lithography. To define the area of a single LED chip and isolate the LED chips.
  • the ohmic contact layer 105 is further formed on the second semiconductor layer 103 for reducing the subsequently formed second contact electrode 107 and the second semiconductor layer. Contact resistance between 103.
  • the material of the ohmic contact layer 105 is indium tin oxide.
  • an indium tin oxide layer may be formed by a physical vapor deposition or a sputtering process, and then an indium tin oxide layer on the bottom and sidewalls of the first opening 104 is removed by photolithography to form a surface on the second semiconductor layer 103.
  • Ohmic contact layer 105 may be formed by a physical vapor deposition or a sputtering process, and then an indium tin oxide layer on the bottom and sidewalls of the first opening 104 is removed by photolithography to form a surface on the second semiconductor layer 103.
  • Ohmic contact layer 105 may be formed by a physical vapor deposition or a sputtering process, and then an indium tin oxide layer on the bottom and sidewalls of the first opening 104 is removed by photolithography to form a surface on the second semiconductor layer 103.
  • Ohmic contact layer 105 may be formed by a physical vapor deposition or a sputtering process, and then an indium tin oxide layer on the
  • the first insulating layer 108 is formed to isolate the subsequently formed first contact electrode 106 and second contact electrode 107.
  • a first insulating material layer is formed on the bottom of the first opening 104 (shown in FIG. 4), the sidewall, and the second semiconductor layer 103; the first insulating material layer is patterned to expose the A second opening (not shown) is formed on the bottom of the first opening (shown in FIG. 4) and on the second semiconductor layer 103 to form a first insulating layer 108.
  • the first insulating layer 108 defines positions of the first contact electrode 106 and the second contact electrode 107 at the first opening 104 and the second opening, respectively.
  • the ohmic contact layer 105 is formed on the second semiconductor layer 103, and the first insulating material layer and the second semiconductor layer 103 are formed on the first insulating material layer.
  • the ohmic contact layer 105 is in contact; when the second opening is formed, the second opening exposes an ohmic contact layer 105 over the second semiconductor layer 103.
  • the material of the first insulating layer 108 is silicon oxide or silicon nitride.
  • the first insulating material layer may be patterned by a photolithography process to form a first insulating layer 108.
  • a first contact electrode 106 is formed in the first opening 104 (shown in FIG. 4), and a second contact electrode 107 is formed in the second opening (not shown).
  • the surfaces of the first contact electrode 106 and the second contact electrode 107 are flush to form a surface A, and the first insulating layer 108 is also surfaced with the first contact electrode 106 and the second contact electrode 107. Flushing provides a basis for the subsequent formation of the first extension electrode and the second extension electrode.
  • a first extension electrode 111 electrically connected to the first contact electrode 106 is formed on the first contact electrode 106, and the first extension electrode 111 includes a plurality of recesses for soldering.
  • the first extension electrode 111 is an extension electrode of the first contact electrode 106, and a plurality of pits 130 are formed in the first extension electrode 111 for placing solder and soldering with the driving circuit, thereby implementing the first contact.
  • the electrode 106 is electrically connected to a drive circuit.
  • the second extension electrode 121 is an extension electrode of the second contact electrode 107, and a plurality of pits 130 are formed in the second extension electrode 121 for placing solder and soldering with the driving circuit, thereby realizing
  • the second contact electrode 107 is electrically connected to the drive circuit.
  • the first extension electrode 111 and the second extension electrode 121 with the pits 130 are formed by a nanoimprint method. Specifically, the following steps are included:
  • the nanoimprintant 140 is covered on the forming surface A.
  • the nano embossing adhesive 140 is a polymer film, and the nano embossing adhesive 140 can be covered on the forming surface A by a coating method.
  • the thickness of the nano embossing adhesive 140 is too small, the thickness of the subsequently formed first extension electrode and the second extension electrode is too small (because the thickness of the first extension electrode and the second extension electrode is smaller than the nano embossing)
  • the thickness of the glue 140 the depth of the pit is not enough to be detrimental to the increase of the welding strength; if the thickness of the nano-imprinted adhesive 140 is too large, it is easy to cause waste of materials and increase the difficulty of the nanoimprint process, and accordingly, in this embodiment
  • the nanoimprintant 140 has a thickness in the range of 1 ⁇ m to 10 ⁇ m.
  • the nanoimprint adhesive 140 (shown in FIG. 6) is patterned by a nanoimprint technique to form a nanoimprint pattern layer 109.
  • the nanoimprint pattern layer 109 serves as a mask for the subsequently formed first extension electrode and second extension electrode for defining the positions and patterns of the first extension electrode and the second extension electrode.
  • a nano-imprinted mold is provided, and the nano-imprint adhesive 140 is imprinted by a mold, and the mold pattern is transferred into the nano-imprint adhesive 140, thereby patterning the nano-imprint adhesive 140 to form a nanometer.
  • the graphic layer 109 is embossed.
  • the first extension electrode and the second extension electrode are formed by two pattern transfer, and correspondingly, the pattern of the mold is consistent with the pattern of the first extension electrode and the second extension electrode to be formed.
  • the position and pattern of the concave portion (or convex portion) pattern in the mold coincide with the position and pattern in which the concave portion (or convex portion) is formed in the first extension electrode and the second extension electrode.
  • a first conductive layer 110 is formed on the formation surface A between the nanoimprint pattern layer 109 and the nanoimprint pattern layer 109.
  • the portion of the first conductive layer 110 located at the surface A is formed to form a first extension electrode and a second extension electrode.
  • the material of the first conductive layer 110 is a metal, such as gold, silver or aluminum.
  • the metal can be reflective, thereby improving the light extraction efficiency of the LED chip.
  • the first conductive layer 110 may be formed by an evaporation method. In other embodiments, the first conductive layer 110 can also be formed by a sputtering or electroplating process.
  • the thickness of the first conductive layer 110 is smaller than the thickness of the nanoimprint pattern layer 109, so that the top surface of the first conductive layer 110 on the surface A is formed lower than the nanoimprint pattern layer. a top surface of 109 such that the first conductive layer 110 on the formation surface A is separated from the first conductive layer 110 on the top surface of the nanoimprint pattern layer 109 to facilitate removal of the nanoimprint pattern in a subsequent process
  • Layer 109 collectively removes first conductive layer 110 on its top surface and retains first conductive layer 110 on formation surface A.
  • the thickness of the first conductive layer 110 is too small, the thicknesses of the first extension electrode and the second extension electrode are small, and correspondingly, the first extension electrode and the second extension electrode have pits
  • the depth of the first conductive layer 110 is too large, and the thickness of the first extended electrode and the second extended electrode is too large, and the first contact electrode 106 and the second contact are easily increased.
  • the resistance between the electrode 107 and the driving circuit is also likely to cause the aspect ratio of the pit to be too large to increase the filling difficulty of the solder.
  • the thickness of the first conductive layer 110 is in the range of 20 nm to 2 ⁇ m.
  • the first conductive layer 110 on the nanoimprint pattern layer 109 (shown in FIG. 8) is removed, and the first conductive layer 110 remaining on the formation surface A is used to form a structure.
  • the first extension electrode 111 and the second extension electrode 121 are described.
  • the nanoimprint pattern layer 109 After the nanoimprint pattern layer 109 is removed, a portion of the space occupied by the original nanoimprint pattern layer 109 is used to form the pits 130.
  • the first conductive layer 110 on the nanoimprint pattern layer 109 is removed by a lift off process.
  • the first conductive layer 110 on the nanoimprint pattern layer 109 may be peeled off by a tape.
  • the nanoimprint pattern layer 109 is removed.
  • the nanoimprint pattern layer 109 is removed by an etching process.
  • the etching process can be dry or wet engraving.
  • the first extension electrode 111 and the second extension electrode 121 are circular extension electrodes, and the entire area of the circular extension electrode is used to form a A plurality of pits 130 are described.
  • the solder easily forms a circular extended surface.
  • the LED chip manufacturing method of the present embodiment forms a circular extended electrode with a plurality of pits 130, which matches the shape of the circular extended surface and can be made smaller.
  • the expanded electrode area obtains a larger soldering area, thereby increasing the utilization ratio of the first extension electrode 111 and the second extension electrode 121.
  • the plurality of pits 130 shown in FIG. 10 have a circular shape.
  • the process of the circular pit 130 is relatively simple, and the manufacturing efficiency of the LED chip is improved.
  • the first extension electrode and the second extension electrode of other shapes may also be formed, and the plurality of pits may be formed on all regions or portions of the first extension electrode and the second extension electrode. In the region, the pits may also be in the shape of a triangle, a square, or the like. In a practical application, the first extension electrode and the second extension electrode are formed by providing different molds.
  • first extension electrode and the second extension electrode are formed by a nanoimprint process.
  • first extension electrode and the second extension electrode may also be formed by a photolithography process.
  • the second insulating layer 112 may be formed between the first extension electrode 111 and the second extension electrode 121 .
  • the second insulating layer 112 is used to achieve isolation between the first extension electrode 111 and the second extension electrode 121.
  • the material of the second insulating layer 112 is silicon nitride or silicon oxide or the like.
  • the second insulating material layer may be patterned by a photolithography process to form a second insulating layer 112.
  • the thickness of the second insulating layer 112 is greater than the thickness of the first extension electrode 111 or the second extension electrode 121. In this way, in addition to the electrical isolation of the first extension electrode 111 and the second extension electrode 121, the second insulating layer 112 can also physically isolate the solder on the different extension electrodes during the soldering process, thereby achieving electrical isolation. Specifically, the thickness of the second insulating layer 112 is in the range of 1 ⁇ m to 10 ⁇ m.
  • the LED manufacturing method of the present invention may not form the second insulating layer.
  • the precise expansion welding process control may be respectively located at the first extended electrode and the second extended The solder on the electrodes are not connected together, thereby avoiding a short circuit problem between the first extension electrode and the second extension electrode.
  • the driving backplane includes a plurality of circuit units, and the first extension electrode 111 of the LED chip is connected to the first electrical terminal of the circuit unit, and the second extension electrode 121 of the LED chip and the second electrode of the circuit unit The terminals are connected, and a voltage is applied to the first contact electrode 106 and the second contact electrode 107 of the LED chip through the circuit unit, thereby causing the active layer 102 in the LED chip to emit light.
  • the first extension electrode 111 is soldered to the first electrical terminal of the driving backplane
  • the second extension electrode 121 is soldered to the second electrical terminal of the driving backplane, the first extension electrode 111 and the second extension electrode.
  • the pits 130 in 121 are used for soldering, and the solder is located in the pits 130 to increase the contact area of the solder with the first extension electrode 111 and the second extension electrode 121, thereby improving the soldering strength and preventing the LED chip from falling off the driving backplane.
  • the problem reduces the probability of bad points and increases the yield.
  • the present invention also provides an LED chip, including: a first extension electrode electrically connected to the first contact electrode, and a second extension electrode electrically connected to the second contact electrode;
  • Each of the first extension electrode and the second extension electrode includes a plurality of pits for soldering.
  • the LED chip includes:
  • the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103 which are sequentially located on the first semiconductor layer 101.
  • the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 102 are used to form a die of a light emitting diode, which is a functional layer of the LED chip.
  • the first semiconductor layer 101 is located on the substrate 100.
  • the material of the first semiconductor layer 101 is N-type gallium nitride; the active layer 102 is a quantum well layer of an indium gallium nitride material; and the material of the second semiconductor layer 103 is P-type nitride gallium.
  • first contact electrode 106 penetrating the active layer 102 and the second semiconductor layer 103 and electrically connected to the first semiconductor layer 101; a second contact electrode 107 on the second semiconductor layer 103 and the second The semiconductor layer 103 is electrically connected; the first contact electrode 106 and the second contact electrode 107 are respectively used to apply voltages to the first semiconductor layer 101 and the second semiconductor layer 103.
  • the surfaces of the first contact electrode 106 and the second contact electrode 107 are flush to form the formation surface A.
  • a first insulating layer 108 is further formed between the first contact electrode 106 and the active layer 102 and the second semiconductor layer 103 for electrically isolating the first contact electrode 106 from the active layer 102 and the second semiconductor layer 103.
  • first insulating layer 108 is also located above the second semiconductor layer 103 and between the first contact electrode 106 and the second contact electrode 107.
  • the first insulating layer 108 is flush with the surfaces of the first contact electrode 106 and the second contact electrode 107.
  • the material of the first insulating layer 108 is silicon oxide or silicon nitride.
  • An ohmic contact layer 105 is further formed between the second semiconductor layer 103 and the second contact electrode 107 for reducing the contact resistance between the second contact electrode 107 and the second semiconductor layer 103.
  • the material of the ohmic contact layer 105 is indium tin oxide.
  • the LED chip further includes a first extension electrode 111 located on the first contact electrode 106 and electrically connected to the first contact electrode 106, the first extension electrode 111 including a plurality of pits for soldering a second extension electrode 121 is disposed on the second contact electrode 107, electrically connected to the second contact electrode 107, and is isolated from the first extension electrode 111, and the second extension electrode 121 includes A plurality of pits 130 are welded.
  • the first extension electrode 111 and the second extension electrode 121 are circular extension electrodes, and the entire area of the circular extension electrode is used to form the plurality of pits 130. .
  • the solder easily forms a circular extended surface.
  • the circular extended electrode with a plurality of concave points 130 in the LED chip of the embodiment matches the shape of the circular extended surface, and can pass through the smaller extended electrode. The area obtains a larger soldering area, thereby increasing the utilization ratio of the first extension electrode 111 and the second extension electrode 121.
  • the first extension electrode and the second extension electrode may also have other shapes, such as an elliptical extension electrode, a racetrack-shaped extension electrode, a polygonal extension electrode, etc., and all regions of the extension electrode are formed in multiple regions. a pit.
  • the first contact electrode 106 and the second contact electrode 107 are circular contact electrodes; the projected area of the circular extended electrode on the forming surface A is larger than the circular contact electrode The projected area of the surface A is formed. That is, the projected area of the first extension electrode 111 and the second extension electrode 121 on the formation surface A is large, so that the welding area of the first extension electrode 111 and the second extension electrode 121 can be increased.
  • the first contact electrode 106 penetrates the active layer 102 and the second semiconductor layer 103. Accordingly, the first contact electrode 106 is generally an electrode having a small cross section. This can reduce the influence of the first contact electrode 106 on the light-emitting area of the LED.
  • the increase in the area of the first extension electrode 111 does not affect the LED illumination area, and thus the first extension electrode 111 can be increased by The area of the first extension electrode 111 and the driving circuit can be increased, thereby improving the welding strength of the first contact electrode 106 and the driving circuit.
  • a projected area of the first extension electrode and the second extension electrode may be equal to or slightly smaller than a projected area of the first contact electrode and the second contact electrode. Because a plurality of pits are formed in the first extension electrode and the second extension electrode, the sidewalls of the plurality of pits can still function to increase the welding area, thereby increasing the welding strength.
  • the projection of the circular extension electrode and the circular contact electrode on the formation surface A constitutes a concentric circle structure.
  • the solder is located at the center of the concentric circle, which ensures a large contact area between the driving circuit and the circular extended electrode, and between the circular extended electrode and the circular contact electrode. , thereby increasing the welding strength.
  • the first extension electrode is electrically connected to the first contact electrode
  • the second extension electrode is electrically connected to the second contact electrode
  • the projection of the circular contact electrode on the forming surface A may also be an intersecting circle, an inscribed circle or an inner circular structure.
  • the materials of the first extension electrode 111 and the second extension electrode 121 are metals, such as gold, silver or aluminum.
  • the metal can be reflective, thereby improving the light extraction efficiency of the LED chip.
  • the first extension electrode and the second extension electrode may also be other conductive materials.
  • the thickness of the first extension electrode 111 and the second extension electrode 121 is in the range of 20 nm to 2 ⁇ m.
  • the pits 130 located in the first extension electrode 111 and the second extension electrode 121 are circular, and the circular pit formation process is relatively simple.
  • the opening size of the pit 130 is too large (or the spacing between adjacent pits 130 is too small), it is easy to affect between the first extension electrode 111 and the first contact electrode 106 or the second extension electrode 121. Contact area with the second contact electrode 107, thereby affecting the electrical connection effect; if the opening size of the recess 130 is too small (or the spacing between adjacent pits 130 is too large), it is not conducive to the increase of the welding area, and further Affecting the welding effect, correspondingly, the opening size of the pit 130 is in the range of 8 nm to 10 ⁇ m, and the pitch of the adjacent pits in the first extension electrode 111 or the second extension electrode 121 is in the range of 8 nm to 10 ⁇ m. .
  • the LED chip further includes: a second insulating layer 112 between the first extension electrode 111 and the second extension electrode 121 for implementing the first The extension electrode 111 is isolated from the second extension electrode 121.
  • the thickness of the second insulating layer 112 is greater than the thickness of the first extension electrode 111 or the second extension electrode 121.
  • the second insulating layer 112 can physically isolate the solder on the different extension electrodes during the soldering process to achieve electrical isolation.
  • the thickness of the second insulating layer 112 is in the range of 1 ⁇ m to 10 ⁇ m.
  • the material of the second insulating layer 112 is silicon nitride or silicon oxide or the like.
  • the second insulating layer may not be disposed, and when the LED chip is soldered to the driving circuit, the first extended electrode and the second extended are respectively controlled by precise soldering process control. The solder on the electrodes are not connected together, thereby avoiding a short circuit problem between the first extension electrode and the second extension electrode.
  • FIG. 13 a top view of an LED chip in accordance with another embodiment of the present invention is shown.
  • the same points of the embodiment are the same as those of the previous embodiment, except that a partial region of the first extension electrode in the LED chip of the embodiment is used to form a plurality of pits.
  • the first contact electrode 406 includes a main contact electrode 4061, and two auxiliary contact electrodes 4062 that are isolated from the main contact electrode 4061.
  • the main contact electrode 4061 is an electrode having a large contact area and corresponding to the soldering position.
  • the main contact electrode 4061 and the auxiliary contact electrode 4062 are isolated from each other and distributed at different positions of the LED chip, which can increase the current distribution in the LED chip and enhance the uniformity of the light output of the LED chip.
  • the number of the auxiliary contact electrodes 4062 is two. In other embodiments, the number of the auxiliary contact electrodes 4062 is at least one in order to increase the current distribution.
  • the first extension electrode 411 includes a main extension electrode 4111 covering the main contact electrode 4061, a secondary extension electrode 4112 covering the auxiliary contact electrode 4062, and a connection between the main extension electrode 4111 and the auxiliary extension electrode 4112.
  • a linear extension electrode 4113; a circular area (shown by a broken line) of the main extension electrode 4111 above the main contact electrode 4061 is formed with a plurality of pits 430 for achieving soldering.
  • the solder In the subsequent soldering process, the solder easily forms a circular elongated surface, and a circular area in which the plurality of pits 430 are formed in the first extension electrode 411 matches the shape of the circular extension surface.
  • the surfaces of the first contact electrode 406 and the second contact electrode 407 are flush to form a surface (not shown).
  • the main contact electrode 4061 is a circular contact electrode, and a projected area of the circular area on the forming surface is larger than a projected area of the circular contact electrode on the forming surface. That is to say, the projection area of the circular area for achieving welding is large, which can increase the welding area between the LED chip and the driving circuit, thereby increasing the welding strength.
  • the circular area may also be equal to or slightly smaller than the projected area of the circular contact electrode.
  • the projection of the circular area and the circular contact electrode on the forming surface constitutes a concentric circle structure.
  • the solder is located at the center of the concentric circle, and the circular region between the driving circuit and the first extension electrode 411 and the circular region of the first extension electrode 411 are in contact with the circle.
  • the electrodes have a large contact area between them, thereby increasing the welding strength.
  • the projection of the circular area and the circular contact electrode on the forming surface may also be an intersecting circle, an inscribed circle or an inner circular structure.
  • the second contact electrode 407 includes a circular main contact electrode, and two linear extension electrodes connected to the circular main contact electrode, which can increase the current distribution in the LED chip and enhance the light uniformity of the LED chip.
  • the second extension electrode 412 is a circular extension electrode covering the circular main contact electrode, and the entire area of the circular extension electrode is used to form a plurality of pits 430. That is to say, in the embodiment, the second extension electrode 412 does not completely cover the second contact electrode 407.
  • FIG. 14 a schematic diagram of an LED chip in accordance with still another embodiment of the present invention is shown.
  • the same points of the LED chip as those of the embodiment shown in FIG. 11 and FIG. 12 are not described again, except that in the present embodiment, a partial area of the second extension electrode 521 in the LED chip is used for The plurality of pits 530 are formed.
  • the second contact electrode 507 includes a main contact electrode 5071 and two extension electrodes 5072 connected to the main contact electrode 5071 to increase the distribution of current in the LED chip, thereby enhancing the uniformity of light emission of the LED chip.
  • the number of the extension electrodes 5072 is two. In other embodiments, the number of the extension electrodes 5072 is at least one in order to increase the current distribution.
  • the second extension electrode 521 covers the main contact electrode 5071 and the extension electrode 5072, and the second extension electrode 521 and the second contact electrode 507 have a larger contact area, thereby improving the second.
  • the circular area (dashed line area) of the second extension electrode 521 located above the main contact electrode 5071 is formed with a plurality of pits 530 for soldering.
  • the solder In the subsequent soldering process, the solder easily forms a circular extended surface, and a circular area in which the concave portion 530 is formed in the second expanded electrode 521 matches the shape of the circular expanded surface.
  • the main contact electrode 5071 is a circular contact electrode, and a projected area of the circular area on the forming surface is larger than a projected area of the circular contact electrode on the forming surface. That is to say, the projection area of the circular area for achieving welding is large, which can increase the welding area between the LED chip and the driving circuit, thereby increasing the welding strength.
  • the circular area may also be equal to or slightly smaller than the projected area of the circular contact electrode.
  • the projection of the circular area and the circular contact electrode on the forming surface constitutes a concentric circle structure.
  • the solder is located at the center of the concentric circle, and the circular region between the driving circuit and the second extension electrode 521 and the circular region of the second extension electrode 521 are in contact with the circle.
  • the electrodes have a large contact area between them, thereby increasing the welding strength.
  • the projection of the circular area and the circular contact electrode on the forming surface may also be an intersecting circle, an inscribed circle or an inner circular structure.
  • the first contact electrode 506 is a circular main contact electrode
  • the first extension electrode 511 covers the circular main contact electrode
  • the first extension electrode 511 is also a partial region ( The circular area) is used to form a plurality of pits 530.
  • the first extension electrode 511 is electrically insulated from the first extension electrode 521 by the second insulation layer 512.
  • the first extension electrode 511 and the second extension electrode 521 each form a pit 530 for soldering in a partial region (circular region). As shown in FIG. 15, in other embodiments, the first extension electrode 611 and the second extension electrode 621 may also form pits 630 for soldering in all regions. At the time of the soldering process, any region of the solder located at the first extension electrode 611 or the second extension electrode 621 may be formed in the pit 630, which reduces the difficulty in alignment of the soldering position, thereby enhancing the soldering strength.
  • the first contact electrode or the second contact electrode is a circular contact electrode, or the main contact electrode of the first contact electrode or the second contact electrode is in a circular contact. electrode.
  • the first extended electrode or the second extended electrode is used to realize the soldering contact. Therefore, the shape of the first contact electrode or the second contact electrode may be other shapes, for example, as shown in FIG.
  • the first contact electrode 706 or the second contact electrode 707 is a strip electrode.
  • the first contact electrode or the second contact electrode may also be a square electrode, an elliptical electrode, a trapezoidal electrode or the like.
  • the shapes of the pits in the first extension electrode or the second extension electrode are all circular.
  • the pits in the LED chip of the present invention may also have other shapes, for example, as shown in Fig. 17, the pits 206 are square in shape; or, as shown in Fig. 18, the pits 306 are triangular in shape.
  • the pit may also be a regular polygon such as a regular pentagon, a regular hexagon or the like.
  • the pits can also be irregular shaped pits.
  • the LED chip provided by the present invention may be formed by the method for manufacturing the LED chip provided by the present invention, or may be formed by other manufacturing methods.
  • the present invention also provides a display panel, and with reference to Figure 19, is a schematic view of a display panel in accordance with one embodiment of the present invention.
  • the display panel includes:
  • the driving backplane 20 includes: a substrate 24, and a plurality of circuit units (not shown) on the substrate 24, the circuit unit including a first electrical terminal 21 and a second electrical terminal 22 for LED chip loading voltage.
  • a plurality of LED chips are placed on the driving backplane 20, and the first extension electrode 111 of the LED chip is soldered to the first electrical terminal 21 through the pits, and the second extended electrode of the LED chip 121 is soldered to the second electrical terminal 22 through the pits.
  • the LED chip is an LED chip provided by the present invention, and the related description is not repeated herein.
  • the first extension electrode 111 is electrically connected to the first contact electrode 106, and the first contact electrode 106 is electrically connected to the first semiconductor layer 101. Therefore, the circuit unit passes the first
  • the electrical terminal 21 applies a voltage to the first semiconductor layer 101.
  • the second extension electrode 121 is electrically connected to the second contact electrode 107, and the second contact electrode 107 is electrically connected to the second semiconductor layer 103. Therefore, the circuit unit passes through the second electrical terminal. 22 applies a voltage to the second semiconductor layer 103. After the first semiconductor layer 101 and the second semiconductor layer 103 are loaded with a voltage, the active layer 102 emits light, and light is emitted from a side close to the first semiconductor layer 101.
  • the first semiconductor layer 101 is an N-type semiconductor layer
  • the second semiconductor layer 102 is a P-type semiconductor layer.
  • the first electrical terminal 21 is a negative connection end
  • the second electrical terminal 22 is a positive connection end.
  • the pits of the first extension electrode 111 in the LED chip are filled with solder 30 and soldered to the first electrical terminal 21; the pits of the second extension electrode 121 are filled with solder 30, and Welding with the second electrical terminal 22.
  • the filling of the solder 30 in the pit increases the welding area and enhances the welding strength, thereby reducing the problem of the LED chip being unsold from the driving back plate 20, reducing the probability of occurrence of the dead point, and thereby improving the yield of the display panel.
  • the substrate 24 may be a rigid substrate, or may be a flexible substrate, a folded substrate, or a stretched substrate.
  • the present invention also provides an electronic device comprising the display panel provided by the present invention.
  • the probability of occurrence of a dead pixel in the display panel is small, and accordingly, the electronic device has good reliability, long service life, and low repair rate.
  • the electronic device may be a mobile phone, a near-eye display device (VR or AR), a television set or a wearable device, or the like.
  • VR near-eye display device
  • AR television set or a wearable device

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Abstract

本发明提供一种LED芯片及其制造方法、显示面板以及电子设备。所述制造方法包括：提供衬底；在衬底上依次形成第一半导体层、有源层和第二半导体层；形成贯穿所述有源层和第二半导体层且与所述第一半导体层电连接的第一接触电极；在所述第二半导体层上形成与所述第二半导体层电连接的第二接触电极；在所述第一接触电极上形成与所述第一接触电极电连接的第一扩展电极，所述第一扩展电极包括用于焊接的多个凹点；在所述第二接触电极上形成与所述第二接触电极电连接且与所述第一扩展电极相隔离的第二扩展电极，所述第二扩展电极包括用于焊接的多个凹点。本发明提高了显示面板的良率。

Description

LED芯片及其制造方法、显示面板以及电子设备 技术领域
本发明涉及显示技术，尤其涉及一种LED芯片及其制造方法、显示面板以及电子设备。
背景技术
微发光二极管显示器(Micro-LED Display)为新一代的显示技术，它以微LED单元作为亚像素实现图像显示。与液晶显示(Liquid Crystal Display，LCD)技术相比，Micro-LED显示面板可以在不借助外部光源的情况下实现图像显示，提高了显示面板的轻薄度。此外，与同样可以自发光显示的有机发光二极管显示(Organic Light-Emitting Diode，OLED)相比，Micro-LED显示面板的寿命较长，因而成为业界研究的热点。
参考图1，示意出了现有技术中的一种LED芯片的剖视图。LED芯片包括：蓝宝石衬底1，依次位于蓝宝石衬底上的N型氮化镓2、量子阱层3和P型氮化镓4，位于P型氮化镓4上的氧化铟锡层5，位于氧化铟锡层5上的第一接触电极6，以及与所述N型氮化镓2电连接的第二接触电极7。
Micro-LED显示时，在所述第一接触电极6和第二接触电极7上加载电压，使量子阱层3发光，通过控制量子阱层3的发光强度并结合彩色化技术，使每个LED芯片均作为一个亚像素单元，进而实现图像的显示。
然而，随着LED芯片电极尺寸的减小，Micro-LED显示面板的坏点数量成倍增多，从而影响了显示面板的良率。
发明内容
本发明解决的问题是提供一种LED芯片及其制造方法、显示面板以及电子设备，提高显示面板的良率。
根据本发明的一个方面，提供了一种LED芯片，包括：第一半导体层；依次位于第一半导体层上的有源层和第二半导体层；第一接触电极，贯穿所述有源层和第二半导体层且与所述第一半导体层电连接；第二接触电极，位于第二半导体层上且与所述第二半导体层电连接；第一扩展电极，位于所述第一接触电极上且与所述第一接触电极电连接，所述第一扩展电极包括用于焊接的多个凹点；第二扩展电极，位于所述第二接触电极上、与所述第二接触电极电连接且与所述第一扩展电极相隔离，所述第二扩展电极包括用于焊接的多个凹点。
可选地，所述第一扩展电极或第二扩展电极的至少部分区域用于形成所述多个凹点。
可选地，所述第一扩展电极和第二扩展电极为圆形扩展电极，所述圆形扩展电极的全部区域用于形成所述多个凹点。
可选地，所述第一接触电极和所述第二接触电极的表面齐平，构成形成表面；所述第一接触电极和所述第二接触电极为圆形接触电极；所述圆形扩展电极在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。
可选地，所述圆形扩展电极和所述圆形接触电极在所述形成表面的投影构成同心圆结构。
可选地，所述第一扩展电极和第二扩展电极中的圆形区域用于形成所述多个凹点。
可选地，所述第一接触电极包括主接触电极，以及至少一个与所述主接触电极相隔离的辅接触电极；所述第一扩展电极包括覆盖所述主接触电极的主扩展电极，覆盖所述辅接触电极的辅扩展电极，以及连接所述主扩展电极和所述辅扩展电极的线形扩展电极；所述主扩展电极位于所述主接触电极上方的圆形区域形成有所述多个凹点。
可选地，所述第二接触电极包括主接触电极，以及与所述主接触电极相连的至少一个延长电极；所述第二扩展电极覆盖所述主接触电极和所述延长电极，所述第二扩展电极位于所述主接触电极上方的圆形区域用于形成所述多个凹点。
可选地，所述第一接触电极和所述第二接触电极的表面齐平，用于构成形成表面；所述主接触电极为圆形接触电极；所述圆形区域在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。
可选地，所述圆形区域和所述圆形接触电极在所述形成表面的投影构成同心圆结构。
可选地，LED芯片还包括：第一绝缘层，位于所述第一接触电极和所述第二接触电极之间，与所述第一接触电极和所述第二接触电极的表面齐平。
可选地，还包括：第二绝缘层，位于所述第一扩展电极与所述第二扩展电极之间，用于实现所述第一扩展电极与第二扩展电极的隔离。
可选地，所述第二绝缘层的厚度大于第一扩展电极或第二扩展电极的厚度。
可选地，所述凹点为圆形、正多边形或不规则形凹点。
可选地，所述凹点的开口尺寸在8nm～10μm的范围内。
可选地，所述第一扩展电极或第二扩展电极中相邻凹点的间距在8nm～10μm的范围内。
可选地，所述第一扩展电极或第二扩展电极的厚度在20nm～2μm的范围内。
可选地，所述第一扩展电极或第二扩展电极的材料为金属。
根据本发明的另一个方面，还提供了一种LED芯片的制造方法，包括：提供衬底；在衬底上依次形成第一半导体层、有源层和第二半导体层；形成贯穿所述有源层和第二半导体层且与所述第一半导体层电连接第一接触电极；在所述第二半导体层上形成与所述第二半导体层电连接的第二接触电极；在所述第一接触电极上形成与所述第一接触电极电连接的第一扩展电极，所述第一扩展电极包括用于焊接的多个凹点；在所述第二接触电极上形成与所述第二接触电极电连接、且与所述第一扩展电极相隔离的第二扩展电极，所述第二扩展电极包括用于焊接的多个凹点。
可选地，通过纳米压印或光刻形成所述第一扩展电极和第二扩展电极。
可选地，所述第一接触电极和所述第二接触电极之间还形成有第一绝缘层，与所述第一接触电极和所述第二接触电极的表面齐平，构成形成表面；形成所述第一扩展电极和第二扩展电极的步骤包括：在所述形成表面上覆盖纳米压印胶；通过纳米压印技术图形化所述纳米压印胶，形成纳米压印图形层；在所述纳米压印图形层上和所述纳米压印图形层之间的形成表面上形成第一导电层；去除位于纳米压印图形层上的第一导电层，保留在所述形成表面上的第一导电层用于构成所述第一扩展电极和第二扩展电极；去除所述纳米压印图形层。
可选地，形成第一导电层的步骤包括：通过蒸镀工艺形成所述第一导电层。
可选地，形成第一导电层的步骤包括：所述第一导电层的厚度小于所述纳米压印图形层的厚度。
可选地，去除位于纳米压印图形层上第一导电层的步骤包括：通过剥离工艺去除所述纳米压印图形层上的第一导电层。
可选地，形成第一接触电极和第二接触电极的步骤包括：形成贯穿所述有源层和第二半导体层且露出所述第一半导体层的第一开口；在所述第一开口的底部、侧壁和所述第二半导体层上覆盖第一绝缘材料层；图形化所述第一绝缘材料层，露出所述第一开口的底部并在第二半导体层上形成第二开口；在所述第一开口和第二开口中填充第二导电层；平坦化所述第二导电层和所述第一绝缘材料层，位于所述第一开口中的第二导电层用于构成所述第一接触电极；位于所述第二开口中的第二导电层用于构成第二接触电极。
可选地，还包括：在所述第一扩展电极和第二扩展电极之间形成第二绝缘层。
可选地，所述第二绝缘层的厚度大于所述第一扩展电极或所述第二扩展电极的厚度。
可选地，所述形成第二绝缘层的步骤包括：在所述第一扩展电极、第二扩展电极及形成表面上覆盖第二绝缘材料层；通过光刻工艺图形化所述第二绝缘材料层，形成所述第二绝缘层。
根据本发明的再一个方面，还提供一种显示面板，包括：驱动背板，包括：基板，以及位于基板上的多个电路单元，所述电路单元包括第一电性端子和第二电性端子；倒置于所述驱动背板上的多个LED芯片，所述LED芯片为本发明所述的LED芯片，所述LED芯片的第一扩展电极通过所述凹点焊接于所述第一电性端子，所述LED芯片的第二扩展电极通过所述凹点焊接于所述第二电性端子。
可选地，所述基板为柔性基板、折叠基板或拉伸基板。
根据本发明的又一个方面，还提供一种电子设备，包括本发明所述的显示面板。
与现有技术相比，本发明的技术方案具有以下优点：
本发明形成与所述第一接触电极电连接的第一扩展电极，还形成与所述第二接触电极电连接的第二扩展电极，所述第一扩展电极和所述第二扩展电极均包括用于焊接的多个凹点，这样，在将LED芯片焊接在驱动背板上时，用于焊接的凹点可以容纳焊料，增加了焊料与第一扩展电极和第二扩展电极的接触面积，可以使所述第一扩展电极或第二扩展电极与驱动背板具有较强的焊接力，从而不容易从驱动背板上脱落而发生脱焊现象，减少了坏点产生的几率，进而提高了显示面板的良率。
附图说明
图1为现有技术中的一种LED芯片的剖视图；
图2至图10为根据本发明的一个实施例的LED芯片制造方法的各步骤的示意图；
图11为根据本发明的一个实施例的LED芯片的剖视图；
图12为图11所示LED芯片的俯视图；
图13为根据本发明的另一个实施例的LED芯片的俯视图；
图14为根据本发明的再一个实施例的LED芯片的俯视图；
图15为根据本发明的又一个实施例的LED芯片的俯视图；
图16为根据本发明的又一个实施例的LED芯片的俯视图；
图17为根据本发明的又一个实施例的LED芯片的俯视图；
图18为根据本发明的又一个实施例的LED芯片的俯视图；
图19为根据本发明的一个实施例的显示面板的剖视图。
具体实施方式
由背景技术可知，随着LED芯片电极尺寸的减小，Micro-LED显示面板的坏点数量成倍增多，从而影响了Micro-LED显示面板的良率。现结合图1分析Micro-LED显示面板坏点数量增多的原因：
实际Micro-LED的制造过程中，在制造完成图1所示的LED芯片之后，去除LED芯片的蓝宝石衬底1，并将多个LED芯片邦定(bonding)在驱动背板上，从而实现LED芯片的批量转移。
具体地说，邦定的过程通过焊接工艺使第一接触电极6或第二接触电极7与所述驱动背板相连，从而使所述驱动背板上的电路单元可以向所述第一接触电极6和第二接触电极7加载电压。
但随着LED芯片尺寸的缩小，第一接触电极6和第二接触电极7的尺寸缩小到几个微米甚至纳米级别。由于接触面积小，第一接触电极6或第二接触电极7与驱动背板焊接的结合力减小，LED芯片脱焊的几率增加，从而导致Micro-LED显示面板坏点数量的增多。
为了解决上述技术问题，本发明提供一种LED芯片的制造方法，形成与所述第一接触电极电连接的第一扩展电极，还形成与所述第二接触电极电连接的第二扩展电极，所述第一扩展电极和所述第二扩展电极均包括多个凹点，所述多个凹点用于焊接。这样，在将LED芯片焊接在驱动背板上时，用于焊接的凹点也可以容纳焊料，增加了焊料与第一扩展电极和第二扩展电极的接触面积，可以使所述第一扩展电极或第二扩展电极与驱动背板具有较强的焊接力，从而不容易从驱动背板上脱落而发生脱焊现象，进而提高了显示面板的良率。
参考图2至图10，示出了根据本发明的一个实施例的LED芯片制造方法的各步骤的示意图。需要说明的是，为了使附图简洁、清楚，此处以一个LED芯片作为示例。所述LED芯片制造方法包括：
如图2所示，提供衬底100。所述衬底100用于为LED的功能层提供生长表面。
本实施例中，所述衬底100为蓝宝石(sapphire)衬底，与氮化镓材料具有较好的晶格匹配。在其他实施例中，所述衬底还可以是碳化硅。
如图3所示，在衬底100上依次形成第一半导体层101、有源层102和第二半导体层102。所述第一半导体层101、有源层102和第二半导体层102用于构成发光二极管的管芯，为LED芯片的功能层。
在本实施例中，所述第一半导体层101的材料为N型氮化镓；所述有源层102为氮化铟镓材料的量子阱层；所述第二半导体层103的材料为P形氮化镓。
实际工艺中，可以通过金属有机化合物气相外延(Metal Organic Chemical Vapor Deposition，MOCVD)的方法形成所述第一半导体层101、有源层102和第二半导体层102。
结合参考图4和图5，形成贯穿所述有源层102和第二半导体层103且与所述第一半导体层101电连接第一接触电极106；在所述第二半导体层103上形成与所述第二半导体层103电连接的第二接触电极107。
所述第一接触电极106和第二接触电极107分别用于向所述第一半导体层101和第二半导体层103加载电压。
具体地，形成第一接触电极106和第二接触电极107的步骤包括：
如图4所示，形成贯穿所述有源层102和第二半导体层103且露出所述第一半导体层101的第一开口104。
具体地，通过MESA光刻图形化所述有源层102和第二半导体层103，形成所述第一开口104。
需要说明的是，本实施例还通过隔离结构(Isolation)光刻，形成贯穿所述第一半导体层101、有源层 102和第二半导体层103并露出所述衬底100的沟道，用于定义单个LED芯片的区域，并使LED芯片之间相隔离。
继续参考图4，本实施例在形成所述第一开口104之后，还在第二半导体层103上形成欧姆接触层105，用于降低后续形成的第二接触电极107与所述第二半导体层103之间的接触电阻。
本实施例中，所述欧姆接触层105的材料为氧化铟锡。
具体地，可以通过物理气相沉积或溅射工艺形成氧化铟锡层，之后通过光刻去除位于第一开口104底部和侧壁上的氧化铟锡层，从而形成位于所述第二半导体层103表面的欧姆接触层105。
如图5所示，本实施例还在形成欧姆接触层105之后，形成第一绝缘层108，用于隔离后续形成的第一接触电极106和第二接触电极107。
具体地，在所述第一开口104(如图4所示)的底部、侧壁和所述第二半导体层103上形成第一绝缘材料层；图形化所述第一绝缘材料层，露出所述第一开口(如图4所示)的底部并在第二半导体层103上形成第二开口(图中未标注)，形成第一绝缘层108。所述第一绝缘层108在所述第一开口104和第二开口处分别定义出第一接触电极106和第二接触电极107的位置。
需要说明的是，本实施例中，所述第二半导体层103上形成有欧姆接触层105，在形成第一绝缘材料层时，所述第一绝缘材料层与位于第二半导体层103上的所述欧姆接触层105相接触；在形成第二开口时，所述第二开口露出的是第二半导体层103上方的欧姆接触层105。
其中，所述第一绝缘层108的材料为氧化硅或氮化硅。可以通过光刻工艺图形化所述第一绝缘材料层，形成第一绝缘层108。
继续参考图5，在第一开口104(如图4所示)中形成第一接触电极106，在所述第二开口(图中未标注)中形成第二接触电极107。
具体地，在所述第一开口104和第二开口中填充第二导电层，平坦化所述第二导电层和所述第一绝缘材料层，位于所述第一开口104(如图4所示)中的第二导电层用于构成所述第一接触电极106；位于所述第二开口中的第二导电层用于构成第二接触电极107。
平坦化工艺之后，第一接触电极106和第二接触电极107的表面齐平，构成形成表面A，所述第一绝缘层108也与所述第一接触电极106和第二接触电极107的表面齐平，为后续形成第一扩展电极和第二扩展电极提供基础。
结合参考图6至图10，在所述第一接触电极106上形成与所述第一接触电极106电连接的第一扩展电极111，所述第一扩展电极111包括用于焊接的多个凹点130；在所述第二接触电极107上形成与所述第二接触电极107电连接、且与所述第一扩展电极111相隔离的第二扩展电极121，所述第二扩展电极121包括用于焊接的多个凹点130。
所述第一扩展电极111为所述第一接触电极106的扩展电极，所述第一扩展电极111中形成有多个凹点130，用于放置焊料并与驱动电路焊接，进而实现第一接触电极106与驱动电路的电连接。
相应地，所述第二扩展电极121为所述第二接触电极107的扩展电极，所述第二扩展电极121中形成有多个凹点130，用于放置焊料并与驱动电路焊接，进而实现第二接触电极107与驱动电路的电连接。
在本实施例中，通过纳米压印的方法形成带有凹点130的第一扩展电极111和第二扩展电极121。具体地，包括以下步骤：
如图6所示，在所述形成表面A上覆盖纳米压印胶140。
在本实施例中，所述纳米压印胶140为聚合物薄膜，可以通过涂布的方法在形成表面A覆盖纳米压印胶140。
需要说明的是，如果纳米压印胶140的厚度过小，则后续形成的第一扩展电极和第二扩展电极的厚度过小(因为第一扩展电极和第二扩展电极厚度需小于纳米压印胶140的厚度)，凹点深度不够不利于焊接强度的增加；如果纳米压印胶140的厚度过大，则容易造成材料的浪费并增加纳米压印过程的难度，相应地，本实施例中，所述纳米压印胶140的厚度在1μm～10μm的范围内。
如图7所示，通过纳米压印技术图形化所述纳米压印胶140(如图6所示)，形成纳米压印图形层109。
所述纳米压印图形层109用作后续形成的第一扩展电极和第二扩展电极的掩膜版，用于定义第一扩展电极和第二扩展电极的位置和图形。
具体地，提供纳米压印的模具，通过模具对所述纳米压印胶140进行压印，将模具的图形转移到纳米压印胶140中，从而图形化所述纳米压印胶140，形成纳米压印图形层109。
需要说明的是，本实施例第一扩展电极和第二扩展电极是通过两次图形转移形成的，相应地，所述模具的图形与待形成的第一扩展电极和第二扩展电极的图形一致。例如：模具中凹部(或凸部)图形的位置、图形与第一扩展电极和第二扩展电极中形成凹部(或凸部)的位置、图形一致。
如图8所示，在所述纳米压印图形层109上和所述纳米压印图形层109之间的形成表面A上形成第一导电层110。
所述第一导电层110位于所述形成表面A的部分用于形成第一扩展电极和第二扩展电极。
在本实施例中，所述第一导电层110的材料为金属，例如：金、银或铝等。金属可以反光，从而可以提高LED芯片的出光效率。
在实际工艺中，可以通过蒸镀的方法形成所述第一导电层110。在其他实施例中，还可以通过溅射或电镀工艺形成所述第一导电层110。
在本实施例中，所述第一导电层110的厚度小于所述纳米压印图形层109的厚度，从而使形成表面A上第一导电层110的顶面低于所述纳米压印图形层109的顶面，从而使形成表面A上的第一导电层110与位于纳米压印图形层109顶面的第一导电层110相分离，以便于在后续过程中通过去除所述纳米压印图形层109一并去除其顶面上的第一导电层110，并保留位于形成表面A上的第一导电层110。
需要说明的是，如果所述第一导电层110的厚度过小，则第一扩展电极和第二扩展电极的厚度较小，相应地，所述第一扩展电极和第二扩展电极中凹点的深度较小，不利于增加焊接增强；如果所述第一导电层110的厚度过大，则第一扩展电极和第二扩展电极的厚度过大，容易增加第一接触电极106、第二接触电极107与驱动电路之间的电阻，还容易造成凹点的深宽比过大而增加焊料的填充难度。相应地，所述第一导电层110的厚度在20nm～2μm的范围内。
如图9和图10所示，去除位于纳米压印图形层109(如图8所示)上的第一导电层110，保留在所述形成表面A上的第一导电层110用于构成所述第一扩展电极111和第二扩展电极121。
去除所述纳米压印图形层109后，原纳米压印图形层109所占据空间的一部分用于形成凹点130。
在本实施例中，通过剥离(lift off)工艺去除所述纳米压印图形层109上的第一导电层110。具体地，可以通过胶带剥离所述纳米压印图形层109上的第一导电层110。
在去除位于纳米压印图形层109上的第一导电层110的步骤之后，去除所述纳米压印图形层109。
具体地，在剥离所述纳米压印图形层109上的第一导电层110之后，通过刻蚀工艺去除所述纳米压印图形层109。所述刻蚀工艺可以是干刻或湿刻。
参考图10，为图9所示的俯视图，在本实施例中，所述第一扩展电极111和第二扩展电极121为圆形扩展电极，所述圆形扩展电极的全部区域用于形成所述多个凹点130。后续焊接过程中，焊料容易形成一圆形延展面，本实施例LED芯片制造方法形成带有多个凹点130的圆形扩展电极，与所述圆形延展面形状相匹配，可以通过较小的扩展电极面积获得较大的焊接面积，进而提高了第一扩展电极111和第二扩展电极121的利用率。
此外，图10中所示多个凹点130的形状为圆形。圆形凹点130的工艺较为简单，提高了LED芯片的制造效率。
需要说明的是，在其他实施例中，还可以形成其他形状的第一扩展电极和第二扩展电极，所述多个凹点可以形成于第一扩展电极和第二扩展电极的全部区域或部分区域，所述凹点也可以是三角形、正方形等形状。实际应用中，通过设置不同的模具形成所述第一扩展电极和第二扩展电极。
还需要说明的是，本实施例中，通过纳米压印工艺形成所述第一扩展电极和第二扩展电极。在其他实施例中，还可以通过光刻工艺形成所述第一扩展电极和第二扩展电极。
需要说明的是，如图11和图12所示，在其他实施例中，还可以在所述第一扩展电极111和第二扩展电极121之间形成第二绝缘层112。所述第二绝缘层112用于实现第一扩展电极111和第二扩展电极121之间的隔离。
在所述第一扩展电极111、第二扩展电极121以及第一扩展电极111和第二扩展电极121之间的形成表面A上覆盖第二绝缘材料层，图形化所述第二绝缘材料层形成第二绝缘层112。
所述第二绝缘层112的材料为氮化硅或氧化硅等。可以通过光刻工艺图形化所述第二绝缘材料层，形成第二绝缘层112。
在本实施例中，所述第二绝缘层112的厚度大于所述第一扩展电极111或所述第二扩展电极121的厚度。这样，第二绝缘层112除了实现第一扩展电极111和第二扩展电极121的电性隔离，还可以在焊接过程中，对不同扩展电极上的焊料也实现物理隔离，进而实现电性隔离。具体地，所述第二绝缘层112的厚度在1μm～10μm的范围内。
需要说明的是，本发明LED制造方法还可以不形成所述第二绝缘层，在将LED芯片焊接到驱动电路上时，通过精确的焊接工艺控制可以使分别位于第一扩展电极、第二扩展电极上的焊料不连接在一起，从而避免造成第一扩展电极和第二扩展电极之间的短路问题。
为了制造显示面板，在完成LED芯片制造之后，还需要去除LED芯片中的衬底100，将LED芯片焊接至驱动背板上实现批量转移。所述驱动背板上包括多个电路单元，所述LED芯片的第一扩展电极111与电路单元的第一电性端子相连，所述LED芯片的第二扩展电极121与电路单元的第二电性端子相连，通过所述电路单元对所述LED芯片的第一接触电极106和第二接触电极107加载电压，进而使LED芯片中的有源层102发光。
具体地，使第一扩展电极111与驱动背板的第一电性端子焊接，并使第二扩展电极121与驱动背板的第二电性端子焊接，第一扩展电极111和第二扩展电极121中的凹点130用于焊接，焊料位于凹点130中 可以增加焊料与第一扩展电极111和第二扩展电极121的接触面积，从而提高了焊接强度，避免LED芯片从驱动背板脱落的问题，进而减小了坏点产生的概率、提高了良率。
为了解决所述技术问题，本发明还提供一种LED芯片，包括：与所述第一接触电极电连接的第一扩展电极，以及与所述第二接触电极电连接的第二扩展电极；所述第一扩展电极和所述第二扩展电极均包括用于焊接的多个凹点。这样，在将LED芯片焊接在驱动背板上时，用于焊接的凹点也可以容纳焊料，增加了焊料与第一扩展电极和第二扩展电极的接触面积，可以使所述第一扩展电极或第二扩展电极与驱动背板具有较强的焊接力，从而不容易从驱动背板上脱落而发生脱焊现象，进而提高了显示面板的良率。
继续参考图11和图12，分别示出了根据本发明的一个实施例的LED芯片的剖视图和俯视图。在本实施例中，LED芯片包括：
第一半导体层101、依次位于第一半导体层101上的有源层102和第二半导体层103。所述第一半导体层101、有源层102和第二半导体层102用于构成发光二极管的管芯，为LED芯片的功能层。本实施例中，所述第一半导体层101位于衬底100上。
具体地，所述第一半导体层101的材料为N型氮化镓；所述有源层102为氮化铟镓材料的量子阱层；所述第二半导体层103的材料为P形氮化镓。
第一接触电极106，贯穿所述有源层102和第二半导体层103且与所述第一半导体层101电连接；第二接触电极107，位于第二半导体层103上且与所述第二半导体层103电连接；所述第一接触电极106、第二接触电极107分别用于向所述第一半导体层101、第二半导体层103加载电压。
本实施例中，所述第一接触电极106和第二接触电极107的表面齐平，用于构成形成表面A。
第一接触电极106与有源层102以及第二半导体层103之间还形成有第一绝缘层108，用于实现第一接触电极106与有源层102以及第二半导体层103的电性隔离。
需要说明的是，所述第一绝缘层108还位于所述第二半导体层103上方、且位于第一接触电极106以及第二接触电极107之间。所述第一绝缘层108与所述第一接触电极106和第二接触电极107的表面齐平。
本实施例中，所述第一绝缘层108的材料为氧化硅或氮化硅。
所述第二半导体层103与所述第二接触电极107之间还形成有欧姆接触层105，用于降低第二接触电极107与所述第二半导体层103之间的接触电阻。本实施例中，所述欧姆接触层105的材料为氧化铟锡。
所述LED芯片还包括：第一扩展电极111，位于所述第一接触电极106上且与所述第一接触电极106电连接，所述第一扩展电极111包括用于焊接的多个凹点130；第二扩展电极121，位于所述第二接触电极107上、与所述第二接触电极107电连接且与所述第一扩展电极111相隔离，所述第二扩展电极121包括用于焊接的多个凹点130。
如图12所示，在本实施例中，所述第一扩展电极111和第二扩展电极121为圆形扩展电极，所述圆形扩展电极的全部区域用于形成所述多个凹点130。后续焊接过程中，焊料容易形成一圆形延展面，本实施例LED芯片中带有多个凹点130的圆形扩展电极与所述圆形延展面形状相匹配，可以通过较小的扩展电极的面积获得较大的焊接面积，进而提高第一扩展电极111和第二扩展电极121的利用率。
在其他实施例中，所述第一扩展电极和第二扩展电极还可以为其他形状，例如椭圆形扩展电极、跑道形扩展电极、多边形扩展电极等，且所述扩展电极的全部区域均形成多个凹点。
在本实施例中，所述第一接触电极106和所述第二接触电极107为圆形接触电极；所述圆形扩展电极 在所述形成表面A的投影面积大于所述圆形接触电极在所述形成表面A的投影面积。也就是说，所述第一扩展电极111和第二扩展电极121在形成表面A的投影面积较大，这样可以增大第一扩展电极111和第二扩展电极121的焊接面积。
尤其对于第一接触电极106而言，所述第一接触电极106贯穿所述有源层102和第二半导体层103，相应地，所述第一接触电极106通常为横截面较小的电极，这样可以减小第一接触电极106对LED发光面积的影响。而本实施例中，通过设置与第一接触电极106电连接的第一扩展电极111，所述第一扩展电极111面积的增大不影响LED发光面积，因此可以通过增大第一扩展电极111的面积，可以增加第一扩展电极111与驱动电路的焊接面积，进而提高第一接触电极106与驱动电路的焊接强度。
需要说明的是，在其他实施例中，所述第一扩展电极和第二扩展电极的投影面积还可以等于或者略小于所述第一接触电极和第二接触电极的投影面积。因为所述第一扩展电极和第二扩展电极中形成有多个凹点，所述多个凹点的侧壁仍然可以起到增加焊接面积的作用，进而增加焊接强度的作用。
结合参考图11和图12，所述圆形扩展电极和所述圆形接触电极在所述形成表面A的投影构成同心圆结构。这样在LED芯片与驱动电路焊接时，焊料位于同心圆的圆心位置处，可以保证驱动电路与圆形扩展电极之间，以及圆形扩展电极与圆形接触电极之间均具有较大的接触面积，从而提高焊接强度。
需要说明的是，在其他实施例中，所述第一扩展电极与第一接触电极电连接、所述第二扩展电极与所述第二接触电极电连接即可，所述圆形扩展电极和所述圆形接触电极在所述形成表面A的投影还可以是相交圆、内切圆或内含圆结构。
在本实施例中，所述第一扩展电极111和第二扩展电极121的材料为金属，例如：金、银或铝等。金属可以反光，从而可以提高LED芯片的出光效率。在其他实施例中，第一扩展电极和第二扩展电极还可以是其他导电材料。
如果第一扩展电极111和第二扩展电极121的厚度过小，相应地，所述第一扩展电极111和第二扩展电极121中凹点130的深度较小，容易影响焊接力增强的效果；如果第一扩展电极111和第二扩展电极121的厚度过大，容易增加第一接触电极106、第二接触电极107与驱动电路之间的电阻，还容易造成凹点130的深宽比过大而增加焊料的填充难度。相应地，第一扩展电极111和第二扩展电极121的厚度在20nm～2μm的范围内。
如图12所示，位于所述第一扩展电极111和第二扩展电极121中的凹点130为圆形，圆形凹点形成工艺较为简单。
需要说明的是，如果所述凹点130开口尺寸过大(或相邻凹点130之间间距过小)，容易影响第一扩展电极111与第一接触电极106之间或者第二扩展电极121与第二接触电极107之间接触面积，从而影响电连接效果；如果所述凹点130开口尺寸过小(或相邻凹点130之间间距过大)，则不利于焊接面积的增加，进而影响焊接效果，相应地，所述凹点130的开口尺寸在8nm～10μm的范围内，所述第一扩展电极111或第二扩展电极121中相邻凹点的间距在8nm～10μm的范围内。
继续参考图11和图12，在本实施中，LED芯片还包括：第二绝缘层112，位于所述第一扩展电极111与所述第二扩展电极121之间，用于实现所述第一扩展电极111与第二扩展电极121的隔离。
在本实施例中，所述第二绝缘层112的厚度大于所述第一扩展电极111或所述第二扩展电极121的厚度。这样，第二绝缘层112除了实现第一扩展电极111和第二扩展电极121的电性隔离，还可以在焊接过 程中，对不同扩展电极上的焊料实现物理隔离，进而实现电性隔离。具体地，所述第二绝缘层112的厚度在1μm～10μm的范围内。
所述第二绝缘层112的材料为氮化硅或氧化硅等。
需要说明的是，在其他实施例中，还可以不设置所述第二绝缘层，在将LED芯片焊接到驱动电路上时，通过精确的焊接工艺控制使分别位于第一扩展电极、第二扩展电极上的焊料不连接在一起，从而避免造成第一扩展电极和第二扩展电极之间的短路问题。
参考图13，示出了根据本发明的另一个实施例的LED芯片的俯视图。本实施例与前一实施例的相同之处不再赘述，不同之处在于，本实施例LED芯片中所述第一扩展电极的部分区域用于形成多个凹点。
在本实施例中，所述第一接触电极406包括主接触电极4061，以及两个与所述主接触电极4061相隔离的辅接触电极4062。其中，所述主接触电极4061为接触面积较大、与焊接位置相对应的电极。
所述主接触电极4061和所述辅接触电极4062相隔离，分布在LED芯片的不同位置，可增大LED芯片中电流的分布，增强LED芯片出光的均匀性。
需要说明的是，在本实施例中，辅接触电极4062的数量为两个，在其他实施例中，为了增大电流分布，所述辅接触电极4062的数量至少为一个。
所述第一扩展电极411包括覆盖所述主接触电极4061的主扩展电极4111，覆盖所述辅接触电极4062的辅扩展电极4112，以及连接所述主扩展电极4111和所述辅扩展电极4112的线形扩展电极4113；所述主扩展电极4111位于所述主接触电极4061上方的圆形区域(虚线所示)形成有实现焊接的多个凹点430。
后续焊接过程中，焊料容易形成一圆形延展面，第一扩展电极411中形成有多个凹点430的圆形区域与所述圆形延展面形状相匹配。
所述第一接触电极406和所述第二接触电极407的表面齐平，构成形成表面(图中未标注)。本实施例中，所述主接触电极4061为圆形接触电极，且所述圆形区域在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。也就是说，用于实现焊接的圆形区域投影面积较大，这样可以增大LED芯片与驱动电路之间的焊接面积，进而增加焊接强度。
需要说明的是，在其他实施例中，所述圆形区域还可以等于或者略小于所述圆形接触电极的投影面积。
在本实施例中，所述圆形区域和所述圆形接触电极在所述形成表面的投影构成同心圆结构。这样在LED芯片与驱动电路焊接时，焊料位于同心圆的圆心位置处，可以保证驱动电路与第一扩展电极411的圆形区域之间，以及第一扩展电极411的圆形区域与圆形接触电极之间均具有较大的接触面积，从而提高焊接强度。
需要说明的是，在其他实施例中，所述圆形区域与所述圆形接触电极在所述形成表面的投影还可以是相交圆、内切圆或内含圆结构。
如图13所示，第二接触电极407包括圆形主接触电极，以及与圆形主接触电极相连的两条线形延长电极，可增大LED芯片中电流的分布，增强LED芯片出光均匀性。
在本实施例中，第二扩展电极412为覆盖所述圆形主接触电极的圆形扩展电极，且所述圆形扩展电极的全部区域用于形成多个凹点430。也就是说，本实施例中，第二扩展电极412并未完全覆盖所述第二接触电极407。
参考图14，示出了根据本发明的再一个实施例的LED芯片的示意图。在本实施例中，LED芯片与图 11和图12所示实施例的相同之处不再赘述，不同之处在于，在本实施例中，LED芯片中第二扩展电极521的部分区域用于形成所述多个凹点530。
在本实施例中，第二接触电极507包括主接触电极5071，以及与主接触电极5071相连的两条延长电极5072，以增大LED芯片中电流的分布，进而增强LED芯片出光均匀性。
需要说明的是，在本实施例中，延长电极5072的数量为两个，在其他实施例中，为了增大电流分布，所述延长电极5072的数量至少为一个。
在本实施例中，所述第二扩展电极521覆盖所述主接触电极5071和延长电极5072，所述第二扩展电极521与第二接触电极507具有较大的接触面积，从而提高了第二扩展电极521与第二接触电极507之间电连接的可靠性。所述第二扩展电极521位于所述主接触电极5071上方的圆形区域(虚线区域)形成有用于焊接的多个凹点530。
后续焊接过程中，焊料容易形成一圆形延展面，第二扩展电极521中形成有凹点530的圆形区域与所述圆形延展面形状相匹配。
在本实施例中，所述主接触电极5071为圆形接触电极，且所述圆形区域在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。也就是说，用于实现焊接的圆形区域投影面积较大，这样可以增大LED芯片与驱动电路之间的焊接面积，进而增加焊接强度。
需要说明的是，在其他实施例中，所述圆形区域还可以等于或者略小于所述圆形接触电极的投影面积。
在本实施例中，所述圆形区域和所述圆形接触电极在所述形成表面的投影构成同心圆结构。这样在LED芯片与驱动电路焊接时，焊料位于同心圆的圆心位置处，可以保证驱动电路与第二扩展电极521的圆形区域之间，以及第二扩展电极521的圆形区域与圆形接触电极之间均具有较大的接触面积，从而提高焊接强度。
需要说明的是，在其他实施例中，所述圆形区域与所述圆形接触电极在所述形成表面的投影还可以是相交圆、内切圆或内含圆结构。
如图14所示，在本实施例中，第一接触电极506为圆形主接触电极，第一扩展电极511覆盖所述圆形主接触电极，且所述第一扩展电极511也是部分区域(圆形区域)用于形成多个凹点530。
在本实施例中，所述第一扩展电极511通过第二绝缘层512与所述第一扩展电极521实现电性绝缘。
需要说明的是，在本实施例中，所述第一扩展电极511和第二扩展电极521均在部分区域(圆形区域)中形成用于焊接的凹点530。如图15所示，在其他实施例中，所述第一扩展电极611和第二扩展电极621还可以在全部区域中形成用于焊接的凹点630。在焊接过程时，焊料位于第一扩展电极611或第二扩展电极621的任何区域均可以形成在凹点630中，减小了焊接位置对准的难度，从而可以增强焊接强度。
还需要说明的是，在前述实施例中，所述第一接触电极或第二接触电极为圆形接触电极，或者，所述第一接触电极或第二接触电极的主接触电极为圆形接触电极。本发明LED芯片中用于实现焊接接触的为第一扩展电极或第二扩展电极，因此，所述第一接触电极或第二接触电极的形状还可以其他形状，例如，如图16所示，所述第一接触电极706或第二接触电极707为条形电极。所述第一接触电极或第二接触电极还可以是方块形电极、椭圆形电极、梯形电极等。
还需要说明的是，在前述实施例中，第一扩展电极或第二扩展电极中凹点的形状均为圆形。本发明LED芯片中凹点还可以是其他形状，例如：如图17所示，凹点206形状为正方形；或者，如图18所示，凹点 306的形状为三角形。所述凹点还可以是正五边形、正六边形等的正多边形。此外所述凹点还可以为不规则形凹点。
还需要说明的是，本发明提供的LED芯片可以由本发明提供的LED芯片的制造方法形成，也可以采用其他制造方法形成。
相应地，本发明还提供一种显示面板，参考图19，示出了根据本发明的一个实施例的显示面板的示意图。所述显示面板包括：
驱动背板20，包括：基板24，以及位于基板24上的多个电路单元(图中未示出)，所述电路单元包括第一电性端子21和第二电性端子22，用于向LED芯片加载电压。
倒置于所述驱动背板20上的多个LED芯片，所述LED芯片的第一扩展电极111通过所述凹点焊接于所述第一电性端子21，所述LED芯片的第二扩展电极121通过所述凹点焊接于所述第二电性端子22。
其中，所述LED芯片为本发明提供的LED芯片，相关描述在此不再赘述。
在本实施例中，所述第一扩展电极111与所述第一接触电极106电连接，且所述第一接触电极106与第一半导体层101电连接，因此，电路单元通过所述第一电性端子21向第一半导体层101加载电压。相应地，所述第二扩展电极121与所述第二接触电极107电连接，且所述第二接触电极107与第二半导体层103电连接，因此，电路单元通过所述第二电性端子22向第二半导体层103加载电压。在第一半导体层101和第二半导体层103加载电压之后，所述有源层102发光，且从靠近所述第一半导体层101的一侧出光。
在本实施例中，所述第一半导体层101为N型半导体层，所述第二半导体层102为P型半导体层。相应地，所述第一电性端子21为负极连接端，所述第二电性端子22为正极连接端。
如图19所示，所述LED芯片中第一扩展电极111的凹点中填充有焊料30，并与第一电性端子21焊接；第二扩展电极121的凹点中填充有焊料30，并与第二电性端子22焊接。所述焊料30填充在凹点内增加了焊接面积，增强了焊接强度，从而可以减少LED芯片从驱动背板20脱焊的问题，减少坏点产生的几率，进而提高了显示面板的良率。
具体地，所述基板24可以是刚性基板，也可以是柔性基板、折叠基板或拉伸基板。
本发明还提供一种电子设备，包括本发明提供的显示面板。所述显示面板中坏点产生的几率较小，相应地，所述电子设备的可靠性好、使用寿命长、返修率低。
所述电子设备可以是手机、近眼显示装置(VR或AR)、电视机或可穿戴设备等。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (20)

  1. 一种LED芯片，包括：
    第一半导体层；
    依次位于第一半导体层上的有源层和第二半导体层；
    第一接触电极，贯穿所述有源层和第二半导体层且与所述第一半导体层电连接；
    第二接触电极，位于第二半导体层上且与所述第二半导体层电连接；
    第一扩展电极，位于所述第一接触电极上且与所述第一接触电极电连接，所述第一扩展电极包括用于焊接的多个凹点；
    第二扩展电极，位于所述第二接触电极上、与所述第二接触电极电连接且与所述第一扩展电极相隔离，所述第二扩展电极包括用于焊接的多个凹点。
  2. 如权利要求1所述的LED芯片，其中，所述第一扩展电极或第二扩展电极的至少部分区域用于形成所述多个凹点。
  3. 如权利要求2所述的LED芯片，其中，所述第一扩展电极和第二扩展电极为圆形扩展电极，所述圆形扩展电极的全部区域用于形成所述多个凹点。
  4. 如权利要求3所述的LED芯片，其中，所述第一接触电极和所述第二接触电极的表面齐平，构成形成表面；
    所述第一接触电极和所述第二接触电极为圆形接触电极；
    所述圆形扩展电极在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。
  5. 如权利要求4所述的LED芯片，其中，所述圆形扩展电极和所述圆形接触电极在所述形成表面的投影构成同心圆结构。
  6. 如权利要求2所述的LED芯片，其中，所述第一扩展电极和第二扩展电极中的圆形区域用于形成所述多个凹点。
  7. 如权利要求6所述的LED芯片，其中，所述第一接触电极包括主接触电极，以及至少一个与所述主接触电极相隔离的辅接触电极；
    所述第一扩展电极包括覆盖所述主接触电极的主扩展电极，覆盖所述辅接触电极的辅扩展电极，以及连接所述主扩展电极和所述辅扩展电极的线形扩展电极；
    所述主扩展电极位于所述主接触电极上方的圆形区域形成有所述多个凹点。
  8. 如权利要求6所述的LED芯片，其中，所述第二接触电极包括主接触电极，以及与所述主接触电极相连的至少一个延长电极；
    所述第二扩展电极覆盖所述主接触电极和所述延长电极，所述第二扩展电极位于所述主接触电极上方的圆形区域用于形成所述多个凹点。
  9. 如权利要求7或8所述的LED芯片，其中，所述第一接触电极和所述第二接触电极的表面齐平，用于构成形成表面；
    所述主接触电极为圆形接触电极；
    所述圆形区域在所述形成表面的投影面积大于所述圆形接触电极在所述形成表面的投影面积。
  10. 如权利要求9所述的LED芯片，其中，所述圆形区域和所述圆形接触电极在所述形成表面的投影构成同心圆或相交圆或内切圆或内含圆结构。
  11. 如权利要求1～8中任意一项权利要求所述的LED芯片，其中，LED芯片还包括：第一绝缘层，位于所述第一接触电极和所述第二接触电极之间，与所述第一接触电极和所述第二接触电极的表面齐平。
  12. 如权利要求1～8中任意一项权利要求所述的LED芯片，其中，还包括：第二绝缘层，位于所述第一扩展电极与所述第二扩展电极之间，用于实现所述第一扩展电极与第二扩展电极的隔离，所述第二绝缘层的厚度大于第一扩展电极或第二扩展电极的厚度。
  13. 如权利要求1～8中任意一项权利要求所述的LED芯片，其中，所述凹点为圆形或正多边形或不规则形凹点。
  14. 如权利要求1所述的LED芯片，其中，所述第一扩展电极或第二扩展电极为椭圆形扩展电极或跑道形扩展电极或多边形扩展电极。
  15. 一种LED芯片的制造方法，包括：
    提供衬底；
    在衬底上依次形成第一半导体层、有源层和第二半导体层；
    形成贯穿所述有源层和第二半导体层且与所述第一半导体层电连接的第一接触电极；
    在所述第二半导体层上形成与所述第二半导体层电连接的第二接触电极；
    在所述第一接触电极上形成与所述第一接触电极电连接的第一扩展电极，所述第一扩展电极包括用于焊接的多个凹点；
    在所述第二接触电极上形成与所述第二接触电极电连接、且与所述第一扩展电极相隔离的第二扩展电极，所述第二扩展电极包括用于焊接的多个凹点。
  16. 如权利要求15所述的制造方法，其中，所述第一接触电极和所述第二接触电极的表面齐平，构成形成表面；形成所述第一扩展电极和第二扩展电极的步骤包括：
    在所述形成表面上覆盖纳米压印胶；
    通过纳米压印技术图形化所述纳米压印胶，形成纳米压印图形层；
    在所述纳米压印图形层上和所述纳米压印图形层之间的形成表面上形成第一导电层；
    去除位于纳米压印图形层上的第一导电层，保留在所述形成表面上的第一导电层用于构成所述第一扩展电极和第二扩展电极；
    去除所述纳米压印图形层。
  17. 如权利要求15所述的制造方法，其中，形成第一接触电极和第二接触电极的步骤包括：
    形成贯穿所述有源层和第二半导体层且露出所述第一半导体层的第一开口；
    在所述第一开口的底部、侧壁和所述第二半导体层上覆盖第一绝缘材料层；
    图形化所述第一绝缘材料层，露出所述第一开口的底部并在第二半导体层上形成第二开口；
    在所述第一开口和第二开口中填充第二导电层；
    平坦化所述第二导电层和所述第一绝缘材料层，位于所述第一开口中的第二导电层用于构成所述第一接触电极；位于所述第二开口中的第二导电层用于构成第二接触电极。
  18. 如权利要求15所述的制造方法，其中，还包括：在所述第一扩展电极和第二扩展电极之间形成第 二绝缘层，所述第二绝缘层的厚度大于所述第一扩展电极或所述第二扩展电极的厚度，所述形成第二绝缘层的步骤包括：
    在所述第一扩展电极、第二扩展电极及形成表面上覆盖第二绝缘材料层；
    通过光刻工艺图形化所述第二绝缘材料层，形成所述第二绝缘层。
  19. 一种显示面板，包括：
    驱动背板，包括：基板，以及位于基板上的多个电路单元，所述电路单元包括第一电性端子和第二电性端子；
    倒置于所述驱动背板上的多个LED芯片，所述LED芯片为权利要求1～14中任意一项权利要求所述的LED芯片，所述LED芯片的第一扩展电极通过所述凹点焊接于所述第一电性端子，所述LED芯片的第二扩展电极通过所述凹点焊接于所述第二电性端子。
  20. 一种电子设备，包括如权利要求19所述的显示面板。
PCT/CN2018/089793 2018-03-07 2018-06-04 Led芯片及其制造方法、显示面板以及电子设备 WO2019169770A1 (zh)

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