CN110246531B - 电阻式存储器件及其操作方法 - Google Patents
电阻式存储器件及其操作方法 Download PDFInfo
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- CN110246531B CN110246531B CN201811621955.3A CN201811621955A CN110246531B CN 110246531 B CN110246531 B CN 110246531B CN 201811621955 A CN201811621955 A CN 201811621955A CN 110246531 B CN110246531 B CN 110246531B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1653—Address circuits or decoders
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1653—Address circuits or decoders
- G11C11/1655—Bit-line or column circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1653—Address circuits or decoders
- G11C11/1657—Word-line or row circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0026—Bit-line or column circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0028—Word-line or row circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0033—Disturbance prevention or evaluation; Refreshing of disturbed memory data
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
- G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50008—Marginal testing, e.g. race, voltage or current testing of impedance
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/81—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a hierarchical redundancy scheme
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/838—Masking faults in memories by using spares or by reconfiguring using programmable devices with substitution of defective spares
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
- G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/14—Dummy cell management; Sense reference voltage generators
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Electrotherapy Devices (AREA)
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2018-0027910 | 2018-03-09 | ||
KR1020180027910A KR102445560B1 (ko) | 2018-03-09 | 2018-03-09 | 저항성 메모리 장치 및 그의 동작 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110246531A CN110246531A (zh) | 2019-09-17 |
CN110246531B true CN110246531B (zh) | 2023-04-11 |
Family
ID=67843387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811621955.3A Active CN110246531B (zh) | 2018-03-09 | 2018-12-28 | 电阻式存储器件及其操作方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10714174B2 (ko) |
KR (1) | KR102445560B1 (ko) |
CN (1) | CN110246531B (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102599662B1 (ko) * | 2018-07-27 | 2023-11-07 | 삼성전자주식회사 | 주어진 동작 환경에 적합한 쓰기 전류에 기초하여 동작하는 메모리 장치 및 쓰기 전류를 구동하는 방법 |
US11081151B2 (en) * | 2019-09-26 | 2021-08-03 | Intel Corporation | Techniques to improve a read operation to a memory array |
JP2021096887A (ja) * | 2019-12-16 | 2021-06-24 | ソニーセミコンダクタソリューションズ株式会社 | 記憶装置 |
US11423984B2 (en) | 2020-04-06 | 2022-08-23 | Crossbar, Inc. | Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip |
US12087397B1 (en) | 2020-04-06 | 2024-09-10 | Crossbar, Inc. | Dynamic host allocation of physical unclonable feature operation for resistive switching memory |
US11727986B2 (en) * | 2020-04-06 | 2023-08-15 | Crossbar, Inc. | Physically unclonable function (PUF) generation involving programming of marginal bits |
US11823739B2 (en) * | 2020-04-06 | 2023-11-21 | Crossbar, Inc. | Physically unclonable function (PUF) generation involving high side programming of bits |
US11574657B2 (en) | 2020-09-28 | 2023-02-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device, sense amplifier and method for mismatch compensation |
US11942144B2 (en) | 2022-01-24 | 2024-03-26 | Stmicroelectronics S.R.L. | In-memory computation system with drift compensation circuit |
EP4390934A1 (en) * | 2022-12-23 | 2024-06-26 | STMicroelectronics S.r.l. | In-memory computation device having improved drift compensation |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7203112B2 (en) * | 2004-08-05 | 2007-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multiple stage method and system for sensing outputs from memory cells |
JP3962048B2 (ja) * | 2004-09-28 | 2007-08-22 | 株式会社東芝 | 半導体メモリ |
WO2007046349A1 (ja) * | 2005-10-18 | 2007-04-26 | Nec Corporation | Mram、及びその動作方法 |
US7286429B1 (en) * | 2006-04-24 | 2007-10-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | High speed sensing amplifier for an MRAM cell |
JP4987616B2 (ja) * | 2006-08-31 | 2012-07-25 | 株式会社東芝 | 磁気ランダムアクセスメモリ及び抵抗ランダムアクセスメモリ |
WO2008133087A1 (ja) * | 2007-04-17 | 2008-11-06 | Nec Corporation | 半導体記憶装置及びその動作方法 |
KR20110120013A (ko) | 2010-04-28 | 2011-11-03 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치 |
US9042152B2 (en) * | 2011-08-25 | 2015-05-26 | Samsung Electronics Co., Ltd. | Data read circuit, a non-volatile memory device having the same, and a method of reading data from the non-volatile memory device |
KR101298190B1 (ko) * | 2011-10-13 | 2013-08-20 | 에스케이하이닉스 주식회사 | 저항성 메모리 장치, 그 레이아웃 구조 및 센싱 회로 |
JP5948667B2 (ja) | 2012-03-07 | 2016-07-06 | パナソニックIpマネジメント株式会社 | 不揮発性半導体記憶装置 |
KR101929983B1 (ko) * | 2012-07-18 | 2018-12-17 | 삼성전자주식회사 | 저항성 메모리 셀을 갖는 반도체 메모리 장치 및 그 테스트 방법 |
KR102056853B1 (ko) | 2013-01-18 | 2020-01-22 | 삼성전자주식회사 | 저항성 메모리 장치 및 그에 따른 동작 제어방법 |
KR102049258B1 (ko) * | 2013-03-15 | 2019-11-28 | 삼성전자주식회사 | 레퍼런스 셀을 포함하는 불휘발성 메모리 장치 및 그것의 데이터 관리 방법 및 |
KR102127137B1 (ko) * | 2013-12-03 | 2020-06-26 | 삼성전자주식회사 | 셀 트랜지스터들의 계면 상태를 제어하여 센싱 마진을 보상할 수 있는 저항성 메모리 장치 |
KR102264162B1 (ko) * | 2014-10-29 | 2021-06-11 | 삼성전자주식회사 | 저항성 메모리 장치 및 저항성 메모리 장치의 동작 방법 |
KR102292643B1 (ko) | 2015-02-17 | 2021-08-23 | 삼성전자주식회사 | 저항성 메모리 장치, 저항성 메모리 시스템 및 저항성 메모리 시스템의 동작 방법 |
KR20170055222A (ko) | 2015-11-11 | 2017-05-19 | 삼성전자주식회사 | 리페어 단위 변경 기능을 가지는 메모리 장치 및 메모리 시스템 |
KR102519458B1 (ko) * | 2016-11-01 | 2023-04-11 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그것의 동작 방법 |
-
2018
- 2018-03-09 KR KR1020180027910A patent/KR102445560B1/ko active IP Right Grant
- 2018-12-13 US US16/219,740 patent/US10714174B2/en active Active
- 2018-12-28 CN CN201811621955.3A patent/CN110246531B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
KR20190106417A (ko) | 2019-09-18 |
US10714174B2 (en) | 2020-07-14 |
CN110246531A (zh) | 2019-09-17 |
US20190279709A1 (en) | 2019-09-12 |
KR102445560B1 (ko) | 2022-09-22 |
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