CN110112108B - 半导体器件和在半导体管芯周围形成绝缘层的方法 - Google Patents
半导体器件和在半导体管芯周围形成绝缘层的方法 Download PDFInfo
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Abstract
本发明涉及半导体器件和在半导体管芯周围形成绝缘层的方法。一种半导体器件具有半导体晶片,该半导体晶片包括在该半导体晶片的第一表面上方形成的多个接触焊盘和多个半导体管芯。部分地穿过半导体晶片的第一表面形成沟槽。将绝缘材料设置在半导体晶片的第一表面上方和到沟槽中。在接触焊盘上方形成导电层。该导电层可以被印刷成在相邻的接触焊盘之间的沟槽中的绝缘材料上方延伸。将半导体晶片的与半导体晶片的第一表面相对的一部分移除,到沟槽中的绝缘材料。在半导体晶片的第二表面和半导体晶片的侧表面上方形成绝缘层。穿过第一沟槽中的绝缘材料而单体化半导体晶片,以分离半导体管芯。
Description
技术领域
本发明大体上涉及半导体器件,并且更具体地涉及半导体器件和在半导体管芯周围形成绝缘层的方法。
背景技术
半导体器件通常存在于现代电子产品中。半导体器件在电气部件的数目和密度方面变化。分立的半导体器件通常含有一种类型的电气部件,例如发光二极管(LED)、小信号晶体管、电阻器、电容器、电感器和功率金属氧化物半导体场效应晶体管(MOSFET)。集成的半导体器件典型地含有数百到数百万个电气部件。集成的半导体器件的示例包括微控制器、微处理器、电荷耦合器件(CCD)、太阳能电池和数字微镜器件(DMD)。
半导体器件执行广泛的功能,诸如,信号处理、高速计算、传输和接收电磁信号、控制电子器件、将太阳光转换为电力、以及创建用于电视显示的视觉投影。半导体器件存在于娱乐、通信、功率转换、网络、计算机和消费产品的领域中。半导体器件也存在于军事应用、航空、机动车、工业控制器和办公设备中。
半导体器件利用半导体材料的电性质。半导体材料的结构允许通过施加电场或基极电流或者通过掺杂工艺来操控材料的电导率。掺杂将杂质引入到半导体材料中,以操控和控制半导体器件的电导率。
半导体器件含有有源和无源电气结构。包括双极和场效应晶体管的有源结构控制电流的流动。通过改变电场或基极电流的施加和掺杂的水平,晶体管促进或者约束电流的流动。包括电阻器、电容器和电感器的无源结构创建执行各种电气功能所需的电压与电流之间的关系。无源和有源结构电连接以形成电路,其使得半导体器件能够执行高速操作和其它有用功能。
通常使用两种复杂制造工艺来制造半导体器件,该两种复杂制造工艺即前端制造和后端制造,每个涉及许多步骤。前端制造涉及在半导体晶片的表面上形成多个管芯。每个半导体管芯典型是相同的并且含有通过将有源和无源部件电连接来形成的电路。后端制造涉及从完成的晶片单体化个体半导体管芯以及对管芯进行封装,以提供结构支撑和环境隔离。
半导体制造的一个目标是保护半导体管芯免受诸如湿气、污染物和光的外部环境要素的影响。常常在半导体管芯上方施加密封剂或模制化合物。半导体管芯的一个或多个表面,尤其在倒装芯片配置中,仍然可能暴露于外部环境要素。
发明内容
存在保护半导体管芯免受外部环境要素的影响的需要。因此,在一个实施例中,本发明是制作半导体器件的方法,该方法包括以下步骤:提供半导体晶片,该半导体晶片包括在该半导体晶片的第一表面上方形成的多个接触焊盘和多个半导体管芯;形成部分地穿过半导体晶片的第一表面的第一沟槽;将绝缘材料设置在半导体晶片的第一表面上方和到第一沟槽中;移除半导体晶片的、与半导体晶片的第一表面相对的一部分,到第一沟槽中的绝缘材料;在半导体晶片的第二表面和半导体晶片的侧表面上方形成绝缘层;以及穿过第一沟槽中的绝缘材料而单体化半导体晶片,以分离半导体管芯。
在另一实施例中,本发明是一种制作半导体器件的方法,该方法包括以下步骤:提供半导体晶片,该半导体晶片包括在该半导体晶片的第一表面上方形成的多个接触焊盘和多个半导体管芯;将第一沟槽形成到半导体晶片的第一表面中;将绝缘材料设置在半导体晶片的第一表面上方和到第一沟槽中;以及在半导体晶片的第二表面和半导体晶片的侧表面上方形成绝缘层。
在另一实施例中,本发明是一种制作半导体器件的方法,该方法包括以下步骤:提供半导体晶片;将第一沟槽形成到半导体晶片的第一表面中;将绝缘材料设置在半导体晶片的第一表面上方和到第一沟槽中;以及在半导体晶片的第二表面和半导体晶片的侧表面上方形成绝缘层。
在另一实施例中,本发明是一种半导体器件,该半导体器件包含半导体晶片,该半导体晶片包括形成到半导体晶片的第一表面中的第一沟槽。将绝缘材料设置在半导体晶片的第一表面上方和到第一沟槽中。在半导体晶片的第二表面和半导体晶片的侧表面上方形成绝缘层。
附图说明
图1图示了印刷电路板(PCB),该印刷电路板具有安装到PCB的表面的不同类型的封装;
图2a-2q图示了在半导体晶片周围形成绝缘材料的工艺;
图3图示了来自图2a-2q的工艺流程的半导体管芯;
图4a-4g图示了在具有导电印刷的半导体晶片周围形成绝缘材料的另一工艺;
图5图示了来自图4a-4g的工艺流程的半导体管芯;
图6a-6m图示了在半导体晶片周围形成绝缘材料的另一工艺,该半导体晶片具有在半导体管芯的侧表面上的导电层;以及
图7图示了来自图6a-6m的工艺流程的半导体管芯。
具体实施方式
在下面的描述中,在一个或多个实施例中参考附图来描述本发明,其中相同的数字表示相同或类似的元件。虽然按照用于实现本发明的目标的最佳模式来对本发明进行描述,但是本领域的技术人员将领会到,该描述旨在覆盖如可以被包括在本发明的精神和范围内的替换、修改和等价物,本发明的精神和范围由如下面的公开和附图所支持的所附权利要求书和权利要求书的等价物限定。
通常使用以下两种复杂制造工艺来制造半导体器件:前端制造和后端制造。前端制造涉及在半导体晶片的表面上形成多个半导体管芯。晶片上的每个半导体管芯含有有源和无源电气部件,有源和无源电气部件电连接以形成功能电路。诸如晶体管和二极管的有源电气部件具有控制电流的流动的能力。诸如电容器、电感器和电阻器的无源电气部件创建执行电路功能所需的电压与电流之间的关系。如本文中所使用的术语“半导体管芯”指代单词的单数形式和复数形式两者,并且因此,能够指代单个半导体器件和多个半导体器件两者。
通过包括掺杂、沉积、光刻、刻蚀和平面化的一系列工艺步骤在半导体晶片的表面上方形成有源和无源部件。掺杂通过诸如离子注入或热扩散的技术将杂质引入到半导体材料中。掺杂工艺通过响应于电场或基极电流而动态地改变半导体材料的电导率来修改有源器件中的半导体材料的电导率。晶体管含有变化的掺杂类型和程度的区域,所述区域在必要时被布置成使晶体管能够在施加电场或基极电流时促进或约束电流的流动。
有源和无源部件由具有不同电气性质的材料层形成。该层能够通过由正被沉积的材料的类型部分地确定的各种沉积技术来形成。例如,薄膜沉积能够涉及化学气相沉积(CVD)、物理气相沉积(PVD)、电解电镀和化学镀工艺。每个层大体上被图案化以形成有源部件、无源部件或部件之间的电连接的部分。
后端制造指代将完成的晶片切割或单体化成个体的半导体管芯,并且然后对半导体管芯进行封装以用于结构支撑和环境隔离。为了单体化半导体管芯,使用激光切割工具或锯片沿着称为锯切道或划线的晶片的非功能区域切割晶片。在单体化之后,将个体半导体管芯安装到封装衬底,该封装衬底包括用于与其它系统部件互连的管脚或接触焊盘。在半导体管芯上方形成的接触焊盘然后连接到封装内的接触焊盘。能够利用焊料凸块、柱形凸块、导电膏或接合引线来制作电连接。将密封剂或其它的模制材料沉积在封装上方,以提供物理支撑和电气隔离。然后将完成的封装插入到电气系统中并且使半导体器件的功能可用于其它系统部件。
图1图示具有芯片载体衬底或PCB 52的电子器件50,其中多个半导体封装安装在PCB 52的表面上。取决于应用,电子器件50可以具有一种类型的半导体封装或多种类型的半导体封装。出于说明的目的,在图1中示出不同类型的半导体封装。
电子器件50可以是使用半导体封装来执行一个或多个电气功能的独立系统。替换地,电子器件50可以是更大的系统的子部件。例如,电子器件50可以是便携式电话、个人数字助理(PDA)、数码摄像机(DVC)或其它电子通信装置的部分。替换地,电子器件50可以是能够插入到计算机中的图形卡、网络接口卡或其它信号处理卡。半导体封装可以包括微处理器、存储器、专用集成电路(ASIC)、逻辑电路、模拟电路、射频(RF)电路、分立器件或其它半导体管芯或电气部件。小型化和重量减小对于要被市场接受的产品而言是必要的。可以减小半导体器件之间的距离以实现更高的密度。
在图1中,PCB 52提供用于安装在PCB上的半导体封装的结构支撑和电气互连的通用衬底。使用蒸发、电解电镀、化学镀、丝网印刷或其它合适的金属沉积工艺在PCB 52的表面上方或层内形成导电信号迹线54。信号迹线54提供半导体封装、安装的部件和其它外部系统部件中的每个之间的电气通信。迹线54还向每个半导体封装提供电源连接和接地连接。
在一些实施例中,半导体器件具有两个封装级。第一级封装是用于将半导体管芯机械和电气附接到中间载体的技术。第二级封装涉及将中间载体机械和电气附接到PCB。在其它实施例中,半导体器件可以仅具有第一级封装,在第一级封装中将管芯直接机械和电气安装到PCB。
出于说明的目的,在PCB 52上示出包括接合线封装56和倒装芯片58的若干类型的第一级封装。此外,示出安装在PCB 52上的若干类型的第二级封装,包括球栅格阵列(BGA)60、凸块芯片载体(BCC)62、接点栅格阵列(LGA)66、多芯片模块(MCM)68、四方扁平无引线封装(QFN)70、四方扁平封装72和倒装芯片74。取决于系统要求,利用第一和第二级封装样式的任何组合配置的半导体封装以及其它电子部件的任何组合能够连接到PCB 52。在一些实施例中,电子器件50包括单个附接的半导体封装,而其它实施例需要多个互连的封装。通过在单个衬底上方将一个或多个半导体封装组合,制造商能够将预制部件并入到电子器件和系统中。因为半导体封装包括复杂的功能,所以能够使用较便宜的部件和流线型制造工艺来制造电子器件。所得到的器件不太可能失效并且制造成本较低,从而导致针对消费者的更低成本。
图2a示出具有基底衬底材料122的半导体晶片120,基底衬底材料122诸如是硅、锗、磷化铝、砷化铝、砷化镓、氮化镓、磷化铟、碳化硅或用于结构支撑的其它体半导体材料。在晶片120上形成由非有源的、管芯间的晶片区域、划线或锯切道126所分离的多个半导体管芯或部件124,如上面所描述的那样。锯切道126提供用于将半导体晶片120单体化成个体的半导体管芯124的切割区域。在一个实施例中,半导体晶片120具有200-300毫米(mm)的宽度或直径以及700微米(μm)的厚度。在另一实施例中,半导体晶片120具有100-450 mm的宽度或直径。
图2b示出半导体晶片120的一部分的横截面视图。半导体晶片120和每个半导体管芯124具有背表面或非有源表面128和有源表面130,该有源表面130含有被实现为根据管芯的电气设计和功能而在管芯内形成并且电气互连的有源器件、无源器件、导电层和电介质层的模拟或数字电路。例如,电路可以包括在有源表面130内形成的一个或多个晶体管、二极管和其它电路元件,以实现模拟电路或数字电路,诸如数字信号处理器(DSP)、ASIC、存储器或其它信号处理电路。半导体管芯124还可以含有用于RF信号处理的集成的无源器件(IPD),诸如电感器、电容器和电阻器。在一个实施例中,半导体管芯124是倒装芯片类型的器件。
使用PVD、CVD、电解电镀、化学镀工艺或其它合适的金属沉积工艺在有源表面130上方形成导电层132。导电层132可以是以下各项中的一个或多个层:铝(Al)、铜(Cu)、锡(Sn)、镍(Ni)、金(Au)、银(Ag)、钛(Ti)或其它合适的导电材料。在一个实施例中,导电层132是通过化学镀沉积或电解电镀形成在Al上方的Ni。其它金属层也可以用于形成导电层132。导电层132操作为电连接到有源表面130上的电路的接触焊盘。如图2b所示,导电层132可以被形成为离半导体管芯124的边缘第一距离并排设置的接触焊盘。替换地,导电层132可以被形成为接触焊盘,该接触焊盘在多个行中偏移,使得接触焊盘的第一行被设置成离管芯的边缘第一距离,并且与第一行交替的接触焊盘的第二行被设置成离管芯的边缘第二距离。
图2c示出含有牺牲基底材料的载体或临时衬底140的一部分的横截面视图,牺牲基底材料诸如是硅、聚合物、氧化铍、玻璃、或用于结构支撑的其它合适的低成本刚性材料。界面层或双面胶带142形成在载体140上方,作为临时粘合剂接合膜、刻蚀停止层或热释放层。半导体晶片120定位在载体140和界面层142上方并且安装到载体140和界面层142,其中有源表面130和导电层132背离载体定向。图2d示出安装到载体140的界面层142的半导体晶片120。
在图2e中,使用锯片或激光切割工具145、深反应离子刻蚀(DRIE)或其它合适的切割工艺,沿着锯切道126部分地但不完全地穿过半导体晶片120在半导体晶片120的表面中形成沟槽144。在一个实施例中,对于700 μm厚的半导体晶片120,沟槽144具有210μm的深度。替换地,沟槽144具有半导体晶片120的厚度的0.25-0.50倍的深度。图2f示出沿着锯切道126在半导体晶片120中形成的沟槽144的平面视图。利用等离子体刻蚀或化学刻蚀对半导体晶片120进行预处理,以增强稍后施加的绝缘材料或密封剂的粘附性。氧化物沉积可以应用于需要第二级金属端接(termination)的半导体晶片120。
在图2g中,沟槽144填充有绝缘材料146,诸如环氧树脂或聚合物材料。绝缘材料146在沟槽144中覆盖半导体管芯124的侧表面147,并且进一步在有源表面130上方形成层。在另一实施例中,绝缘材料146可以是二氧化硅(SiO2)、氮化硅(Si3N4)、氮氧化硅(SiON)、五氧化二钽(Ta2O5)、氧化铝(Al2O3)或具有类似绝缘和结构性质的其它材料。如图2g所示,绝缘材料146的层延伸到导电层132的表面148,从而使表面148暴露。绝缘材料146被固化以巩固并且接合到半导体管芯124的有源表面130和侧表面147。
在另一实施例中,如图2h所示,绝缘材料146的层足够厚以覆盖导电层132的表面148。在这种情况下,研磨机150移除过量的绝缘材料146以使绝缘材料平面化和暴露导电层132的表面148。
在另一实施例中,取代图2g或2h中施加绝缘材料146,将半导体晶片120从载体140移除并且将半导体晶片120放置在开槽铸模(chase mold)162的腔体160中,如图2i所示。将大量的密封剂或模制化合物164在升高的温度和压强下在有源表面130上方例如通过入口166注入到腔体160中,并且到半导体晶片120的沟槽144中。在自动成型工艺期间在端口170上抽取真空,以实现均匀分散的、一致分布的、基本上没有空隙的密封剂164。替换地,将半导体晶片120在真空辅助下利用密封剂164在开槽铸模162中压缩成型。密封剂164可以是聚合物复合材料,诸如,具有填充物的环氧树脂、具有填充物的环氧丙烯酸酯或具有适合的填充物的聚合物。密封剂164是不导电的,提供物理支撑并且在环境方面保护半导体管芯124免受外部要素、污染物和湿气的影响。密封剂164还保护半导体管芯124以免由于暴露于光而退化。在密封剂164设置在半导体晶片120的有源表面130上方和沟槽144中的情况下,将半导体晶片120从开槽铸模162移除。在图2j中,研磨机172移除过量的密封剂164,以使密封剂平面化和暴露导电层132的表面148。
相应地,设置在有源表面130上方和沟槽144中的绝缘材料可以是如图2g或2h中的绝缘材料146,或者如图2j中的密封剂164。下面的描述是根据绝缘材料146而提供的,但也适用于具有密封剂164的实施例。返回到图2h,净化导电层132的表面148,以及使用PVD、CVD、电解电镀、化学镀工艺或其它合适的金属沉积工艺在导电层132的表面148上方形成导电层174,如图2k所示的那样。导电层174可以是以下各项中的一个或多个层:Al、Cu、Sn、Ni、Au、Ag、Ti、SnAg、SnAgCu、CuNi、CuNiAu、CuSnAg、CuNiPdAu或其它合适的导电材料。在一个实施例中,导电层174是Ni、Au或Ni/Au合金。导电层174在绝缘材料146或密封剂164上方延伸并且抑制导电层132的氧化。
在图2l中,通过化学刻蚀、机械剥离、化学机械抛光(CMP)、机械研磨、热烘、UV光、激光扫描或湿法脱模(wet stripping)来移除载体140和界面层142。图2l还示出了含有牺牲基底材料的载体或临时衬底176的一部分的横截面视图,牺牲基底材料诸如是硅、聚合物、氧化铍、玻璃或用于结构支撑的其它合适的低成本刚性材料。在载体176上方形成界面层或双面胶带178,作为临时粘合剂接合膜、刻蚀停止层或热释放层。在有源表面130和导电层132和174朝向载体定向的情况下,半导体晶片120定位在载体176的界面层178上方并且安装到载体176的界面层178。
在图2m中,研磨机180移除衬底材料122的一部分,下至沟槽144中的绝缘材料146。替换地,通过刻蚀工艺移除衬底材料122的一部分,以暴露沟槽144中的绝缘材料146。半导体晶片120和相应的是半导体管芯124在厚度上减小被移除的衬底材料122的量。在一个实施例中,通过光学传感器或光学成像器182来控制研磨机180,以实现半导体晶片120的期望厚度或最佳厚度,例如210μm。光学传感器182监测半导体晶片120的研磨后的厚度并且调节研磨机180以维持平面的、均匀的和准确的研磨操作。尽管已经将衬底材料122移除至沟槽144,但是半导体管芯124仍然通过沟槽中的固化的绝缘材料146保持在一起。
在图2n中,使用PVD、CVD、印刷、层压、旋转涂覆或喷雾涂覆在半导体晶片120的背表面128和侧表面186上方形成绝缘层184。绝缘层184含有以下各项中的一个或多个层:SiO2、Si3N4、SiON、Ta2O5、Al2O3或具有类似的绝缘性质和结构性质的其它材料。在一个实施例中,绝缘层184是用于保护和加固背表面128和侧表面186的LC类型的背面涂覆的胶带。
在图2o中,通过化学刻蚀、机械剥离、CMP、机械研磨、热烘、UV光、激光扫描或湿法脱模来移除载体176和界面层178,从而使半导体晶片120完全被绝缘材料146或密封剂164和绝缘层184包围,即所有侧表面147和186、背表面128和有源表面130被绝缘材料146或密封剂164和绝缘层184包围,其中导电层174暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在另一实施例中,取代图2n中施加绝缘层184,将具有绝缘材料146的半导体晶片120放置在开槽铸模192的腔体190中,如图2p所示的那样。将大量的密封剂或模制化合物194在升高的温度和压强下在半导体晶片120的背表面128上方和侧表面186周围例如通过入口196注入到腔体190中。在自动成型工艺期间在端口200上抽取真空198,以实现均匀分散的、一致分布的、基本上没有空隙的密封剂194。替换地,半导体晶片120在真空辅助下利用密封剂194在开槽铸模192中压缩成型。密封剂194可以是聚合物复合材料,诸如,具有填充物的环氧树脂、具有填充物的环氧丙烯酸酯或具有适合的填充物的聚合物。密封剂194是不导电的,提供物理支撑并且在环境方面保护半导体管芯124免受外部要素、污染物和湿气的影响。密封剂194还保护半导体管芯124以免由于暴露于光而退化。类似于图2o,在密封剂194处于半导体晶片120的背表面128上方和侧表面186周围的情况下,将半导体晶片120从开槽铸模192中移除。类似于图2h,研磨机移除过量的密封剂194,以使密封剂平面化。相应地,半导体晶片120完全被绝缘材料146或密封剂164以及绝缘层184或密封剂194包围,即所有侧表面147和186、背表面128和有源表面130被绝缘材料146或密封剂164以及绝缘层184或密封剂194包围,其中导电层174暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在图2q中,将半导体晶片120放置在切片胶带(dicing tape)202上,并且使用锯片或激光切割工具204、穿过沟槽144中的绝缘材料146或密封剂164的中心将半导体晶片120单体化成个体的半导体管芯124。锯片或激光切割工具204的宽度小于沟槽144的宽度,从而使绝缘材料146或密封剂164在侧表面147和有源表面130上,以及绝缘层184或密封剂194在每个半导体管芯124的侧表面186和背表面128上,以保护半导体管芯的侧表面、有源表面和背表面。使用超声工具将单体化的半导体管芯124从切片胶带202分离并且进行质量保证和功能测试。
图3示出单体化之后的半导体管芯124。半导体管芯124的有源表面130上的电路电连接到导电层132和174,以用于外部互连。在一个实施例中,半导体管芯124是倒装芯片类型的管芯。绝缘材料146或密封剂164保护半导体管芯124的侧表面147和有源表面130。绝缘层184或密封剂194覆盖半导体管芯124的侧表面186和背表面128。相应地,每个半导体管芯124完全被绝缘材料146或密封剂164以及绝缘层184或密封剂194包围,即所有侧表面147和186、背表面128和有源表面130被绝缘材料146或密封剂164以及绝缘层184或密封剂194包围,其中导电层174暴露以用于电气互连。
图4a-4g示出具有在导电层132和绝缘材料146上方形成的印刷导电层的替换实施例。从图2h继续,净化导电层132的表面148,并且使用丝网印刷、模板印刷或喷墨印刷在绝缘材料146和导电层132的表面148上方形成导电层220,如图4a所示的那样。在一个实施例中,利用Ag墨印刷导电层220以减小寄生电容以及提供改进的表面安装质量。导电层220的印刷允许形成任何形状电极。替换地,导电层220可以是以下各项中的一个或多个层:Al、Cu、Sn、Ni、Au、Ag、Ti、SnAg、SnAgCu、CuNi、CuNiAu、CuSnAg、CuNiPdAu或利用光刻工艺形成的其它合适的导电材料。导电层220在沟槽的相对侧上的导电层132的部分之间在沟槽144上方延伸。导电层220在绝缘材料146或密封剂164上方延伸并且抑制导电层132的氧化。
在图4b中,通过化学刻蚀、机械剥离、CMP、机械研磨、热烘、UV光、激光扫描或或湿法脱模来移除载体140和界面层142。图4b还示出了含有牺牲基底材料的载体或临时衬底226的一部分的横截面视图,牺牲基底材料诸如是硅、聚合物、氧化铍、玻璃或用于结构支撑的其它合适的低成本刚性材料。在载体226上方形成界面层或双面胶带228,作为临时粘合剂接合膜、刻蚀停止层或热释放层。在有源表面130和导电层132和220朝向载体定向的情况下,半导体晶片120定位在载体226的界面层228上方并且安装到载体226的界面层228。
在图4c中,研磨机230移除衬底材料122的一部分,下至沟槽144中的绝缘材料146。替换地,通过刻蚀工艺移除衬底材料122的一部分,以暴露沟槽144中的绝缘材料146。半导体晶片120和相应的是半导体管芯124在厚度上减小被移除的衬底材料122的量。在一个实施例中,通过光学传感器或光学成像器232来控制研磨机230,以实现半导体晶片120的期望厚度或最佳厚度,例如210 μm。光学传感器232监测半导体晶片120的研磨后的厚度并且调节研磨机230以维持平面的、均匀的和准确的研磨操作。尽管已经将衬底材料122移除到沟槽144,但是半导体管芯124仍然通过沟槽中的固化的绝缘材料146保持在一起。
在图4d中,使用PVD、CVD、印刷、层压、旋转涂覆或喷雾涂覆在半导体晶片120的背表面128和侧表面236上方形成绝缘层234。绝缘层234含有以下各项中的一个或多个层:SiO2、Si3N4、SiON、Ta2O5、Al2O3或具有类似的绝缘性质和结构性质的其它材料。在一个实施例中,绝缘层234是用于保护和加固背表面128和侧表面236的LC类型的背面涂覆的胶带。
在图4e中,通过化学刻蚀、机械剥离、CMP、机械研磨、热烘、UV光、激光扫描或湿法脱模来移除载体226和界面层228,从而使半导体晶片120完全被绝缘材料146或密封剂164和绝缘层234包围,即所有侧表面147和236、背表面128和有源表面130被绝缘材料146或密封剂164和绝缘层234包围,其中导电层220暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在另一实施例中,取代图4d中施加绝缘层234,将具有绝缘材料146的半导体晶片120放置在开槽铸模242的腔体240中,如图4f所示的那样。将大量的密封剂或模制化合物244在升高的温度和压强下例如通过入口246在半导体晶片120的背表面128上方和侧表面236周围注入到腔体240中。在自动成型工艺期间在端口250上抽取真空248,以实现均匀分散的、一致分布的、基本上没有空隙的密封剂244。替换地,半导体晶片120在真空的辅助下利用密封剂244在开槽铸模242中压缩成型。密封剂244可以是聚合物复合材料,诸如,具有填充物的环氧树脂、具有填充物的环氧丙烯酸酯或具有适合的填充物的聚合物。密封剂244是不导电的,提供物理支持并且在环境方面保护半导体管芯124免受外部要素、污染物和湿气的影响。密封剂244还保护半导体管芯124以免由于暴露于光而退化。类似于图4d,在密封剂244在半导体晶片120的背表面128上方和侧表面236周围的情况下,将半导体晶片120从开槽铸模242中移除。类似于图2h,研磨机移除过量的密封剂244,以使密封剂平面化。相应地,半导体晶片120完全被绝缘材料146或密封剂164和绝缘层234或密封剂244包围,即所有侧表面147和236、背表面128和有源表面130被绝缘材料146或密封剂164和绝缘层234或密封剂244包围,其中导电层220暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在图4g中,将半导体晶片120放置在切片胶带252上,并且使用锯片或激光切割工具254穿过导电层220和沟槽144中的绝缘材料146或密封剂164的中心将半导体晶片120单体化成个体的半导体管芯124。锯片或激光切割工具254的宽度小于沟槽144的宽度,从而使绝缘材料146或密封剂164在侧表面147和有源表面130上,以及绝缘层234或密封剂244在每个半导体管芯124的侧表面236和背表面128上,以保护半导体管芯的侧表面、有源表面和背表面。使用超声工具将单体化的半导体管芯124从切片胶带252分离并且进行质量保证和功能测试。
图5示出单体化之后的半导体管芯124。半导体管芯124的有源表面130上的电路电连接到导电层132和220,以用于外部互连。在一个实施例中,半导体管芯124是倒装芯片类型的管芯。绝缘材料146或密封剂164保护半导体管芯124的侧表面147和有源表面130。绝缘层234或密封剂244覆盖半导体管芯124的侧表面236和背表面128。相应地,每个半导体管芯124完全被绝缘材料146或密封剂164以及绝缘层234或密封剂244包围,即所有侧表面147和236、背表面128和有源表面130被绝缘材料146或密封剂164以及绝缘层234或密封剂244包围,其中导电层174暴露以用于电气互连。可以在单体化之后使用适合于焊接的电镀工艺在导电层220上方形成另外的金属层,例如Ni、Au或Cu。
图6a-6m示出具有形成在导电层132和绝缘材料260上方和沟槽144中的印刷导电层的替换实施例。从图2e继续,如图6a所示,沟槽144填充有绝缘材料260,诸如环氧树脂或聚合物材料。绝缘材料260在沟槽144中覆盖半导体管芯124的侧表面262并且进一步在有源表面130上方形成层。在另一实施例中,绝缘材料260可以是SiO2、Si3N4、SiON、Ta2O5、Al2O3或具有类似的绝缘性质和结构性质的其它材料。如图6a所示,绝缘材料260的层延伸到导电层132的表面264,从而使表面264暴露。绝缘材料260被固化以巩固并且接合到半导体管芯124的有源表面130和侧表面262。
在另一实施例中,如图6b所示,绝缘材料260的层足够厚以覆盖导电层132的表面264。在这种情况下,研磨机266移除过量的绝缘材料260以使绝缘材料平面化和暴露导电层132的表面264。
在另一实施例中,取代图6a或6b中施加绝缘材料260,将半导体晶片120从载体140移除并且将半导体晶片120放置在开槽铸模272的腔体270中,如图6c所示的那样。将大量的密封剂或模制化合物274在升高的温度和压强下例如通过入口276在有源表面130上方注入腔体270中,并且注入到半导体晶片120的沟槽144中。在自动成型工艺期间在端口280上抽取真空278,以实现均匀分散的、一致分布的、基本上没有空隙的密封剂274。替换地,半导体晶片120在真空辅助下利用密封剂274在开槽铸模272中压缩成型。密封剂274可以是聚合物复合材料,诸如,具有填充物的环氧树脂、具有填充物的环氧丙烯酸酯或具有适合的填充物的聚合物。密封剂274是不导电的,提供物理支持并且在环境方面保护半导体管芯124免受外部要素、污染物和湿气的影响。密封剂274还保护半导体管芯124以免由于暴露于光而退化。在密封剂274设置在半导体晶片120的有源表面130上方和沟槽144中的情况下,将半导体晶片120从开槽铸模272中移除。在图6d中,研磨机282移除过量的密封剂274,以使密封剂平面化和暴露导电层132的表面264。
相应地,设置在有源表面130上方和到沟槽144中的绝缘材料可以是如图6a或6b中的绝缘材料260,或者如图6d中的密封剂274。下面的描述是根据绝缘材料260而提供的,但也适用于具有密封剂274的实施例。返回到图6a,使用锯片或激光切割工具287、DRIE或其它合适的切割工艺,在沟槽144中的绝缘材料260的中心区域中部分地但不完全地穿过绝缘材料形成沟槽286,如图6e所示的那样。在一个实施例中,对于深度为210 μm的沟槽144,沟槽286具有例如100-150μm的深度。替换地,沟槽286具有沟槽144的深度的0.10-0.50倍的深度。
在图6f中,净化导电层132的表面264,并且将导电层288形成在导电层132的表面264上方和到绝缘材料260上方的沟槽286中。在一个实施例中,利用Ag墨印刷导电层288,以减小寄生电容以及提供改进的表面安装质量。导电层288的印刷允许形成任何形状电极。替换地,导电层288可以是以下各项中的一个或多个层:Al、Cu、Sn、Ni、Au、Ag、Ti、SnAg、SnAgCu、CuNi、CuNiAu、CuSnAg、CuNiPdAu或利用光刻工艺形成的其它合适的导电材料。在一个实施例中,导电层288是Ni、Au或Ni/Au合金。导电层288在沟槽144上方在沟槽144的相对侧上的导电层132的部分之间延伸并且延伸到沟槽286中。导电层288在绝缘材料260或密封剂274上方延伸并且抑制导电层132的氧化。
在图6g中,通过化学刻蚀、机械剥离、CMP、机械研磨、热烘、UV光、激光扫描或湿法脱模来移除载体140和界面层142。图6g还示出了含有牺牲基底材料的载体或临时衬底290的一部分的横截面视图,牺牲基底材料诸如是硅、聚合物、氧化铍、玻璃或用于结构支撑的其它合适的低成本刚性材料。在载体290上方形成界面层或双面胶带292,作为临时粘合剂接合膜、刻蚀停止层或热释放层。在有源表面130和导电层132和288朝向载体定向的情况下,半导体晶片120定位在载体290的界面层292上方并且安装到载体290的界面层292。
在图6h中,研磨机294移除衬底材料122的一部分,下至沟槽144中的绝缘材料260。替换地,通过刻蚀工艺移除衬底材料122的一部分,以暴露沟槽144中的绝缘材料260。半导体晶片120和相应的是半导体管芯124在厚度上减小被移除的衬底材料122的量。在一个实施例中,通过光学传感器或光学成像器296来控制研磨机294,以实现半导体晶片120的期望厚度或最佳厚度,例如210 μm。光学传感器296监测半导体晶片120的研磨后的厚度并且调节研磨机294以维持平面的、均匀的和准确的研磨操作。尽管已经将衬底材料122移除到沟槽144,但是半导体管芯124仍然通过沟槽中的固化的绝缘材料260保持在一起。
在图6i中,使用PVD、CVD、印刷、层压、旋转涂覆或喷雾涂覆在半导体晶片120的背表面128和侧表面302上方形成绝缘层300。绝缘层300含有以下各项中的一个或多个层:SiO2、Si3N4、SiON、Ta2O5、Al2O3或具有类似的绝缘性质和结构性质的其它材料。在一个实施例中,绝缘层300是用于保护和加固背表面128和侧表面302的LC类型的背面涂覆的胶带。
在图6j中,通过化学刻蚀、机械剥离、CMP、机械研磨、热烘、UV光、激光扫描或湿法脱模来移除载体290和界面层292,从而使半导体晶片120完全被绝缘材料260或密封剂274和绝缘层300包围,即所有侧表面262和302、背表面128和有源表面130被绝缘材料260或密封剂274和绝缘层300包围,其中导电层288暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在另一实施例中,取代图6i中施加绝缘层300,将具有绝缘材料260的半导体晶片120放置在开槽铸模312的腔体310中,如图6k所示的那样。大量的密封剂或模制化合物314在升高的温度和压强下例如通过入口316在背表面128上方并且在半导体晶片120的侧表面302周围注入到腔体310中。在自动成型工艺期间在端口320上抽取真空318,以实现均匀分散的、一致分布的、基本上没有空隙的密封剂314。替换地,半导体晶片120在真空辅助下利用密封剂314在开槽铸模312中压缩成型。密封剂314可以是聚合物复合材料,诸如,具有填充物的环氧树脂、具有填充物的环氧丙烯酸酯或具有适合的填充物的聚合物。密封剂314是不导电的,提供物理支持并且在环境方面保护半导体管芯124免受外部要素、污染物和湿气的影响。密封剂314还保护半导体管芯124以免由于暴露于光而退化。如图6l所示,在密封剂314在半导体晶片120的背表面128上方和侧表面302周围的情况下,从开槽铸模312中移除半导体晶片120。类似于图2j,研磨机移除过量的密封剂314,以使密封剂平面化。相应地,半导体晶片120完全被绝缘材料260或密封剂274以及绝缘层300或密封剂314包围,即所有侧表面262和302、背表面128和有源表面130被绝缘材料260或密封剂274以及绝缘层300或密封剂314包围,其中导电层288暴露以用于电气互连。此外,半导体管芯124可以被激光标刻。
在图6m中,将半导体晶片120放置在切片胶带322上,并且使用锯片或激光切割工具324穿过沟槽144中的绝缘材料260和导电层288的中心将半导体晶片120单体化成个体的半导体管芯124。锯片或激光切割工具324的宽度小于沟槽286的宽度,从而使导电层288和绝缘材料260或密封剂274在侧表面262和有源表面130上,以及绝缘层300或密封剂314在每个半导体管芯124的侧表面302和背表面128上,以保护半导体管芯的侧表面、有源表面和背表面。使用超声工具将单体化的半导体管芯124从切片胶带322分离并且进行质量保证和功能测试。
图7示出单体化之后的半导体管芯124。半导体管芯124的有源表面130上的电路电连接到导电层132和288,以用于外部互连。在一个实施例中,半导体管芯124是倒装芯片类型管芯。绝缘材料260或密封剂274保护半导体管芯124的侧表面262和有源表面130。绝缘层300或密封剂314覆盖半导体管芯124的侧表面302和背表面128。相应地,每个半导体管芯124完全被绝缘材料260或密封剂274以及绝缘层300或密封剂314包围,即所有侧表面262和302、背表面128和有源表面130被绝缘材料260或密封剂274以及绝缘层300或密封剂314包围,其中导电层174暴露以用于电气互连。可以在单体化之后使用适合于焊接的电镀工艺在导电层288上方形成另外的金属层,例如Ni、Au或Cu。
虽然已经详细地说明本发明的一个或多个实施例,但是本领域技术人员将领会到,在不脱离如在所附的权利要求书中所阐述的本发明的范围的情况下,可以对这些实施例进行修改和适配。
Claims (15)
1.一种制作半导体器件的方法,包括:
提供半导体晶片,所述半导体晶片包括在所述半导体晶片的第一表面上方形成的多个接触焊盘;
将第一沟槽形成到所述半导体晶片的所述第一表面中;
将绝缘材料设置在所述半导体晶片的所述第一表面上方和到所述第一沟槽中,其中使所述接触焊盘从所述绝缘材料中暴露,并且所述绝缘材料包括平面部分,所述平面部分横跨所述第一沟槽从所述多个接触焊盘的第一接触焊盘延伸到所述多个接触焊盘的第二接触焊盘;
形成导电层,所述导电层在所述绝缘材料的平面部分上从所述第一接触焊盘延伸到所述第二接触焊盘;
对半导体晶片的第二表面进行背面研磨以暴露所述第一沟槽中的绝缘材料;
将绝缘层形成在所述半导体晶片的侧表面和所述第二表面上方;以及
穿过所述第一沟槽单体化所述半导体晶片以将所述半导体晶片分成多个半导体管芯。
2.根据权利要求1所述的方法,其中所述绝缘材料和绝缘层包围所述半导体管芯。
3.根据权利要求1所述的方法,还包括通过印刷工艺形成所述导电层。
4.根据权利要求1所述的方法,还包括:
在所述第一沟槽中的绝缘材料中形成第二沟槽;
将导电层形成到所述第二沟槽中;以及
穿过所述第二沟槽中的导电层和所述绝缘材料单体化所述半导体晶片。
5.根据权利要求1所述的方法,还包括:
通过第一成型工艺将所述绝缘材料设置在所述半导体晶片的所述第一表面上方和到所述第一沟槽中;以及
通过第二成型工艺将所述绝缘层形成在所述半导体晶片的所述侧表面和所述第二表面上方。
6.根据权利要求1所述的方法,还包括在对所述半导体晶片进行背面研磨之后穿过所述第一沟槽中的所述绝缘材料单体化所述半导体晶片。
7.一种制作半导体器件的方法,包括:
提供半导体晶片,所述半导体晶片包括在所述半导体晶片上形成的具有平的上表面的第一接触焊盘;
将第一沟槽形成到所述半导体晶片的第一表面中;
将绝缘材料设置在所述半导体晶片的所述第一表面上方和到所述第一沟槽中,其中所述绝缘材料覆盖所述第一接触焊盘的平的上表面;
使所述绝缘材料平面化以暴露所述第一接触焊盘的平的上表面;
形成导电层,所述导电层在所述绝缘材料上从所述第一接触焊盘延伸到第二接触焊盘;以及
将绝缘层形成在所述半导体晶片的第二表面和侧表面上方。
8.根据权利要求7所述的方法,还包括通过印刷工艺形成所述导电层。
9.根据权利要求7所述的方法,还包括:
在所述第一沟槽中的绝缘材料中形成第二沟槽;
将导电层形成到所述第二沟槽中;以及
穿过所述第二沟槽中的导电层和所述绝缘材料单体化所述半导体晶片。
10.根据权利要求7所述的方法,还包括:
移除所述半导体晶片的、与所述半导体晶片的第一表面相对的一部分,下至所述第一沟槽中的绝缘材料;以及
穿过所述第一沟槽中的绝缘材料单体化所述半导体晶片。
11.一种半导体器件,包括:
半导体晶片,包括在所述半导体晶片的第一接触焊盘和第二接触焊盘之间从所述半导体晶片的第一表面到所述半导体晶片中形成的第一沟槽;
绝缘材料,设置在所述半导体晶片的所述第一表面上方和到所述第一沟槽中,其中所述绝缘材料包括平面部分,所述平面部分横跨所述第一沟槽从所述第一接触焊盘延伸到所述第二接触焊盘;
导电层,所述导电层在所述绝缘材料的平面部分上从所述第一接触焊盘延伸到所述第二接触焊盘;以及
绝缘层,形成在所述半导体晶片的侧表面和第二表面上方并且接触所述绝缘材料。
12.根据权利要求11所述的半导体器件,其中所述绝缘材料或绝缘层包括密封剂。
13.根据权利要求11所述的半导体器件,其中所述第一接触焊盘和第二接触焊盘包括与所述绝缘材料的平面部分共面的镍镀层。
14.根据权利要求11所述的半导体器件,其中所述导电层包括平的表面,所述平的表面延续所述导电层的整个布局。
15.根据权利要求14所述的半导体器件,其中所述平的表面朝向所述半导体晶片定向。
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KR101948409B1 (ko) | 2019-02-14 |
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