CN110085526B - 用于施加接合层的方法 - Google Patents

用于施加接合层的方法 Download PDF

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CN110085526B
CN110085526B CN201910183859.3A CN201910183859A CN110085526B CN 110085526 B CN110085526 B CN 110085526B CN 201910183859 A CN201910183859 A CN 201910183859A CN 110085526 B CN110085526 B CN 110085526B
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aluminum
base material
layer
group
bonding
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CN110085526A (zh
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M.温普林格
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EV Group E Thallner GmbH
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EV Group E Thallner GmbH
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
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    • B81C3/00Assembling of devices or systems from individually processed components
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Abstract

用于施加接合层的方法。本发明涉及一种用于将由基本层及保护层组成的接合层施加到基板上的方法,其具有以下方法步骤:将可氧化的基本材料作为基本层施加到该基板的接合侧上,用可至少部分地溶解于该基本材料中的保护材料作为保护层来至少部分地覆盖该基本层。另外,本发明涉及一种相应的基板。

Description

用于施加接合层的方法
本申请是申请日为2013年9月13日、申请号为201380079527.1、国际申请号为PCT/EP2013/069003、发明名称为“用于施加接合层的方法”的专利申请的分案申请。
技术领域
本发明涉及用于将第一基板与第二基板接合的方法。
背景技术
在现有技术中,存在将不同材料相互连接的多种方法。在半导体工业中,近年来,主要是将两个基板暂时地或永久地相互连接的接合技术得到了认可。很多时候,接合过程在基板上的(若干)半导体和/或金属结构之间发生。近来最为熟知的金属接合技术是铜接合。基板是用于功能组件、如微芯片、内存芯片或MEMS组件的载体。近年来,增多地尝试在布置在不同的基板上的组件之间建立连接,以便回避所述组件之间的成本高的、昂贵且易出现缺陷的导线接合过程。另外,直接接合方案具有提高的组件密度的巨大优点。组件不必再并排地定位并经由导线连接,而是相叠地堆叠并通过不同的技术相互垂直地连接。通常通过接触点产生垂直连接。不同基板的接触点必须彼此相同且在实际接合过程之前彼此对齐。
另一较少流行的方法是铝接合。在该工艺中,基板的表面上的镀铝点应该与处于第二基板上的材料接合。在此,可以是铝或适合的不同材料。铝的缺点是其极端的氧亲和性。即使对于铜,氧亲和性亦是高的,使得通常必须在接合过程之前移除氧化铜。对于铝,氧亲和性高多倍。对此,铝还形成难以移除的相对厚的钝化氧化铝层。与铜相比,铝因此更少用于接合连接,因为现在由于十分稳定的氧化层而不能以合理的花费实现可靠的接合结果。然而,铝广泛用于半导体领域中,以便在芯片表面上在横向方向上建立金属连接。在此,铝的特征在于,铝在硅中比例如铜或金具有明显更慢的扩散行为。扩散至硅中的金属将影响晶体管的特性或使晶体管完全丧失功能。基于该有利的扩散行为,伴随着低成本及相对优良的导电性,多年来铝已成为用于在半导体芯片上横向地建立电连接的主要使用的材料。近来,在最新一代芯片中,虽然铜由于其更优选的导电性而日益取代铝,然而尽管如此,铝主要地在用稍老生产技术在200mm基板上生产芯片的情形中一如既往地具有重要作用。具体地,这些生产周边区/工厂近来已发现用于生产MEMS(微机电系统)部件的增强用途。这些MEMS部件的生产又频繁地需要接合过程,使得对可靠的铝接合过程的需求增加。除了半导体工业之外,铝由于其质轻、便宜且主要地可硬化而亦是有需求市场的结构材料。在半导体工业中,基于上述的原因,较长时间以来已尝试开发可将铝用作结构材料且特别是用于接合连接的材料的工艺。
在使用氧亲和性材料、如铜及铝时的最大问题是避免在接合面上的氧化以及在接合过程之前从接合面完全移除氧化物。此外,极端氧亲和性材料、如铝产生强力且难以还原的氧化物。用于氧化物移除的设备是昂贵的、花费高的且可能是危险的(有毒物质)。
发明内容
因此,本发明的任务是说明一种方法以及一种配备有接合层的基板,借助该方法可氧化的材料、如特别是铝可以用于接合。
该任务借助根据本发明的用于将第一基板与第二基板接合的方法来解决。在说明书和/或附图中说明的特征中的至少两个的所有组合亦落在本发明的范围内。在所说明的值范围中,处于所述的范围内的值也应该被公开为边界值且可以任何组合予以主张。
本发明的基本理念是在基板上特别是作为扩散对设置由基本层与保护层组成的接合层,其中该基本层的基本材料是可氧化的,而该保护层的保护材料可至少较不容易氧化。
因此,本发明特别是关于一种工艺,在该工艺中从一开始便防止氧亲和性材料、如特别是铝(优选的)或铜的氧化。根据本发明,特别是通过沉积至少部分地、特别是占大部分地、优选地完全地覆盖基本材料的保护材料来实现对氧亲和性基本材料的保护。
元素关于其氧亲和性的目标分解可最简单地由电化学电压序列定义。氧亲和性元素、如锂不是极端昂贵的,容易氧化,且因此充当还原剂,容易释放电子,且因此具有极端负性的标准电极电位。而具有低氧亲和性的元素被称为贵重元素,因为其可容易地被还原且因此充当氧化剂,接纳电子,且具有极其正性的标准电极电位。特别是,使用具有小于2.00V、优选地小于1.00V、更优选地小于0.0V、最优选地小于-1.0V、极其优选地小于-2.0V且最最优选地小于-3.0V的标准电极电位的材料作为基本材料。铜具有大约0.16V的标准电极电位,铝具有大约-1.66V的标准电极电位。最贵重的金属是具有大约1.69V(针对第一氧化等级)的标准电极电位的金。
在一种特别优选的方案中,基本材料及保护材料作为彼此分离的靶材位于涂布室中且在真空下连续地被涂敷,使得不产生基本材料与含氧气氛的接触。
本发明的一种实施方式在于:在接合过程期间将保护材料施于基本材料上并且保护材料由于其化学物理特性在接合过程期间至少部分地、特别是占大部分地、优选地完全溶解于基本材料中。实现基本材料-保护材料组合的选择,使得该选择允许固体溶解过程。与基本材料溶解于保护材料中相比,保护材料优选地更好地溶解于基本材料中。
特别是,保护材料在确定的过程条件下溶解于基本材料中。因此,基本材料对保护材料具有边界溶解度和/或基本材料可与基本材料至少部分地、特别是占大部分地、优选地完全地混合。在保护材料在基本材料中的现有边界溶解度的情形中,在室温下的边界溶解度特别是是足够大的,以便保持一定量的保护材料被溶解。以此方式,保护材料根据本发明可以作为极薄的层被涂敷,以便在保护材料至基本材料中的扩散过程期间避免可导致(不期望的)沉淀的局部浓度过高。
本发明的另一根据本发明的并且有利的方面在于:特别是通过用保护层至少占大部分地覆盖基本层的未由基板覆盖的面来防止氧亲和性基本材料与含氧或富氧气氛的接触。
保护材料本身优选地特别是至少在室温下是固体。因此,该固体是非液态的且允许所保护的基本材料穿过含氧气氛的传输。
在本发明的一种有利实施方式中,选择保护材料,使得该保护材料具有比基本材料小的氧亲和性,或可以比移除形成于基本材料上的氧化物的情形更简单的手段移除形成于保护材料上的可能的氧化物。有利地选择用于保护层的氧化物形成材料,使得除简单移除氧化物以外,在氧化物移除之后还仅又缓慢形成新氧化物。特别是,在至少2分钟、优选地至少5分钟、更优选地至少10分钟且最优选地至少15分钟过去后形成小于0.3nm的氧化物,优选地小于0.1nm的氧化物。
根据本发明,特别是至少主要地防止形成于保护层上的可能的氧化物被吸收到基本材料中。为此,特别是紧接在接合过程之前移除保护材料的氧化物。在较小量的所形成氧化物的情形中,亦可设想在稍后所期望的接合过程期间破坏氧化物且直接构建到边界层中。优选地使用具有下文提及的特性中的一个或多个的保护材料:
˙低氧亲和性,特别是由大于0V、优选地大于1.00V、更优选地大于2.00V的标准电极电位来定义,且优选地小于基本材料的氧亲和性,
˙在基本材料中的高溶解度,特别是大于10-5mol%、优选地大于10-3mol%、更优选地大于1mol%、最优选地大于10mol%且最最优选地大于40mol%,
˙基本材料的特性不受负面影响,因此在所期望的高电导率的情况下不削弱该电导率及在所期望的高强度的情况下不减小该强度,
˙相对于气氛是气密的,
˙成本适宜的,
˙高的可用性,
˙低毒的,特别是无毒的,和/或
˙良好的接合特性。
因此,本发明特别是涉及一种用第二材料、即保护材料覆盖、特别是涂布易于氧化的第一材料、即基本材料、特别是金属或半导体的方法。保护材料特别是在另一工艺步骤中通过溶解过程而至少部分地、特别是占大部分地、优选地完全地被基本材料溶解和/或在相当特定的扩展的实施方式中部分地、特别是占大部分地、优选地完全地形成沉淀。根据本发明优选的实施方式包括保护材料在基本材料中的完全溶解,其中在此情形中无沉淀产生。由保护材料形成的保护层的任务特别是在于防止基本材料氧化。保护材料本身可在与含氧气氛的接触中氧化,且在根据本发明的溶解过程在基本材料中开始之前必要时移除氧化物。在一种相当特别的实施方式中,在设计决定地防止保护层在去往接合器的路程中重新氧化的设备中执行移除保护层上的该氧化物。例如可设想的是,在相应的真空丛中使用氧化物移除模块及接合室,该真空丛使所述模块与周边含氧的气氛分离。这样的丛对于专业人员所最佳熟知。
根据本发明的工艺的优选目标主要在于:保护在另一工艺步骤中应该被接合的氧亲和的基本材料、特别是铝以及铜,直至氧化之前的实际的接合步骤。优选地具有比要保护的基本材料低得多的氧亲和性的保护材料的可能的氧化物的移除是显著地更简单、更快速且主要地更可靠的,使得可加速该工艺。
根据一种优选实施方式,保护材料特别是在移除保护材料的氧化物之后紧接着与特别是根据本发明形成的另一基板接合。优选地,保护材料在接合过程期间还至少部分地、特别是占大部分地、优选地完全地溶解于基本材料中,使得在理想情形中直至接合,在基本材料与富氧气氛之间没有形成接触。
因此,根据本发明的方法主要适于在涂布于基板上之后立即用保护材料暂时保护氧亲和性基本材料、特别是铝或铜。
只要基本材料不整面地而是特别是以结构化方式和/或仅以部分区域(例如铜触点或铝边界,其应该成为MEMS部件的气密密封空间的部分)施加于基板上,保护材料作为厚度尽可能均匀的、特别是密封的膜来施加。根据本发明重要的主要是,基本材料的(特别是平均的)层厚度与保护材料的层厚度的比率。另外,基本材料与保护材料的化学的、物理的和/或冶金的行为根据本发明发挥作用。
基本材料优选地是固体溶剂。特别是,基本材料可以是多相多组分系统。在多相材料的情形中,对于溶解过程的所有考虑至少适用于一相,在理想情形中适用于所有相。作为基本材料,优选地选择单独的化学元素,特别是金属、半金属或非金属,特别是硅、镓、铝、镍、钛或铜。这些金属是在半导体工业最经常地用于生产导电连接、接触或结构部件(例如MEMS组件)的材料。
为尽可能简单地揭示根据本发明的工艺,通过举例方式而非限制方式关于基本材料、铝来阐述根据本发明的工艺。铝根据本发明是尤其适合的,因为其是高度可用的、成本适宜的结构材料。
保护材料特别是同样可以是多相多组分系统,但优选地是简单的化学元素,该化学元素优选地仅以一相存在。在此,其优选地是金属、半金属、碱金属或碱土金属。根据本发明也可设想使用非金属元素、如碳,只要化学物理特性在根据本发明的工艺的意义上在非金属与基本材料之间对应即可。
根据本发明,原则上考虑以下材料作为基本材料和/或保护材料。在此,根据本发明的工艺的前提是,保护材料可至少部分地、特别是占大部分地、优选地完全地溶解于基本材料中。
●金属,特别是
○Cu、Ag、Au、Al、Fe、Ni、Co、Pt、W、Cr、Pb、Ti、Te、Sn、Zn、Ga
●碱金属,特别是
○Li、Na、K、Rb、Cs
●碱土金属,特别是
○Mg、Ca、Sr、Ba
●合金
●半导体,特别是配备有相应掺杂的半导体
○元素半导体,特别是
■Si、Ge、Se、Te、B、Sn
○化合物半导体,特别是
■GaAs、GaN、InP、InxGa1-xN、InSb、InAs、GaSb、AlN、InN、GaP、BeTe、ZnO、CuInGaSe2、ZnS、ZnSe、ZnTe、CdS、CdSe、CdTe、Hg(1-x)Cd(x)Te、BeSe、HgS、AlxGa1-xAs、GaS、GaSe、GaTe、InS、InSe、InTe、CuInSe2、CuInS2、CuInGaS2、SiC、SiGe。
对于移除保护材料的氧化层,优选地以下工艺是适合的:
●化学的氧化物移除,特别是通过
○气体还原剂和/或
○液体还原剂
●物理的氧化物移除,特别是利用等离子体
●离子辅助化学蚀刻,特别是
○快速离子轰击(FAB,溅镀)
○研磨,和/或
○抛光。
对于基本材料和/或保护层的沉积及因此合成,考虑以下工艺:
●物理气相沉积(英文:physical vapor deposition,PVD)
●化学气相沉积(英文:chemical vapor deposition,CVD)
●电镀方法
●溶胶-凝胶方法。
根据本发明的由基本层及保护层构成的系统被设计为层系统且特别是表示不处于热动态平衡中的系统。因此,在相对于室温提高的温度下,相互扩散优选地至少主要地、特别是排他地导致基本材料与保护材料之间的扩散、保护材料至基本材料中的扩散。
根据本发明的系统特别是被设计为扩散对。所阐述的相图以及上述材料组合的可能的相图表示不同温度及浓度下的多个相的平衡状态。可关于动力学过程、如扩散从平衡图、如相图中得出的结论是十分有限的。原则上,平衡图不允许关于动力学过程的结论。因此相图仅仅用于做出在一般情形中保护材料是否能够在一定温度下溶解于基本材料中的估计。只要在保护材料至基本材料中的扩散过程期间发生局部浓度积聚(其超过保护材料在基本材料中的可溶性且因此导致可能的离析、相形成或类似的),则这在以下阐述中被忽略。在进一步的流程中,原则上从以下出发,保护材料至基本材料中的扩散快速地进行,使得在给定温度下,在任何时候在基本材料的任何地方皆不超过保护材料的最大溶解度。这特别是根据本发明被实现,在给定温度下保护材料在基本材料中的溶解度越大,保护材料在基本材料中越快速地扩散和/或在保护材料-基本材料界面中的保护材料至基本材料中的过渡越小。
所描绘及阐述的相图是通过冶金学确定。许多组分在各第二组分中具有极低的溶解度,使得几乎不可基于该图示来辨识溶解度极限。
为了能够更好地阐述根据本发明的理念,关于尽可能简单的数个系统阐述根据本发明的理念。使用技术上极重要且迄今极难以接合的材料(铝)作为基本材料。因此,在沉积于基板的接合侧上之后的基本材料是单组分单相系统。
作为用于保护层的保护材料,下文通过举例方式呈现四种重要材料(亦即锗、镓、锌及镁),所述材料具有根据本发明必需的特性。因此,保护材料在沉积之后同样是单组分单相系统。上述的材料组合根据本发明是优选的,其中关于个别材料组合参考下文阐述的具有所提及的优点的实例。
接合层的基本材料-保护材料系统因此是层系统,其优选地在接合过程期间通过溶解过程转化成二组分单相系统。在此,优选地产生由基本材料及保护材料构成的混合晶体。接合过程本身或者在惰性气体气氛中但更优选地在真空中发生。
在本发明的一种有利实施方式中,特别是通过在(成功的)接合过程之后进行至少一个热处理来期望得到沉淀,以便通过保护材料从基本材料中的至少部分的、特别是占大部分的、优选地完全的沉淀来产生二组分二相系统。
随后借助有利的实施例阐释本发明,其中实施例可以分别是本身视作独立的发明方面,所述发明方面应该揭示为单独发明且可特别是以与上文一般性揭示内容组合形式而予以主张。
第一实施例
可应用根据本发明的理念的第一系统是铝-锗(简称为Al-Ge)系统。二元Al-Ge系统是具有锗在铝中的部分边界溶解度及铝在锗中的微不足道地低的边界溶解度的纯共晶系统。因此选择铝作为基本材料。
为保护铝免受氧化,铝在成功沉积于基板上之后立即用作为保护层的锗层来覆盖。锗因此是根据本发明的保护材料。
锗层特别是小于10μm,优选地小于1μm,更优选地小于100nm,最优选地小于10nm,最最优选地小于1nm。
在尽可能低的温度下进行沉积,以便防止或至少抑制锗在提高的温下至铝中的部分或甚至完全的扩散。
在沉积锗的情形中,铝的温度小于600℃,优选地小于500℃,更优选地小于400℃,最优选地小于300℃,最最优选地小于200℃,终极优选地小于100℃。在特定情形中,铝甚至可主动被冷却以便使温度进一步降低。通过尽可能低的温度,沉积于铝上的锗在其热运动中立即被阻碍,且优选地保留在表面上,因此不扩散至铝中。
另外,通过低温下锗在铝中的尤其低的溶解度来使锗至铝中的扩散变难。自该时刻开始,锗用作铝的保护材料。如果该系统曝露于含氧气氛中,则锗至少占大部分地、优选地完全地氧化,且因此锗通过以下方式保护铝免受氧化,即铝相对于该气氛是密封的。
在此要注意的是,锗的标准电极电位是大约0.12V,铝的标准电极电位是大约-1.66V。因此锗比铝更贵重且因此不能作为牺牲阳极来化学上保护铝。
与此相应地,紧密地施加锗层,以便在铝与气氛之间建立物理势垒。
为实施铝与所期望的第二材料之间的接合,首先从锗上移除可能形成的氧化锗。通过物理和/或化学手段进行氧化锗的移除。可设想氧化物的溅射去除、通过还原性酸的湿式化学移除或通过氢或其他气体还原剂的还原。在移除氧化锗之后,尽可能快地进行纯锗表面与待接合表面(特别是,特别是根据本发明类似地构造的基板)的接触。
在相对于室温提高的接合温度下进行接合过程。在此,接合温度特别是大于25℃,优选地大于100℃,更优选地大于200℃,最优选地大于300℃,最最优选地大于400℃,终极优选地约426℃。根据相图,铝在大约426℃下具有对锗的大约2.5mol%的最大溶解度。根据本发明,在优选实施方案中,通过优选接合温度低于共晶温度、特别是在400℃至420℃之间来防止在边界区域中形成液态共晶相。在此温度范围中,锗在铝中的溶解度仍总是足够高的,以便奠定锗在铝中溶解的基础。根据本发明,接合温度在接合过程期间直至在该温度下锗在铝中的至少占大部分的、优选地完全的溶解都保持恒定。
可通过已知锗在铝中的扩散常数下解一维扩散方程来计算该溶解所需的时间。然而,可能必需的并且有意义的是,更短或更长地维持该温度。根据本发明将锗溶解于铝中的时间长度设定为特别是大于1分钟,优选地大于10分钟,更优选地大于30分钟,最优选地大于1小时,最最优选地大于2小时,终极优选地大于5小时。
在溶解过程期间,优选地维持或增加要彼此接合的基板上的压力。作用于接合层上的压力特别是大于1Pa,优选地大于100Pa,更优选地大于10000Pa,最优选地大于1MPa,最最优选地大于10MPa,终极优选地大于100MPa。特别是相对于标准晶圆所使用的力是大于10N,优选地大于100N,最优选地大于1000N,最最优选地大于10000N,终极优选地大于100000N。
在溶解过程期间,锗优选地溶解于全部铝中。由于要溶解的锗的量是极低的而同时进行溶解的铝的量是极大的的事实,锗在铝中的总浓度是极小的。锗在铝中的总浓度特别是小于1mol%,优选地小于10-3mol%,优选地小于10-5mol%,最优选地小于10-7mol%。优选地,锗不仅仅只是溶解于铝的表面附近的区域中,而是尽可能深地扩散至铝中,优选地如此深,使得在一定时间之后,已实现锗在铝中的均匀分布。
在根据本发明的第一程序中负责,在冷却过程期间不发生超过锗在铝中的边界溶解度,使得锗总是保持完全溶解于铝中。因此,在整个温度范围中防止锗在铝基质中的沉淀。这根据本发明通过以下方式实现:选择铝层厚度对锗层厚度的根据本发明的比率,且扩散过程运行确定的时间,直至锗特别是占大部分地、优选地完全地并且特别是在整个可用的空间上分布于铝中。锗层厚度与铝层厚度之间的比率在此小于1,优选地小于10-3,更优选地小于10-5,最优选地小于10-7,最最优选地小于10-9,终极优选地小于10-11
在根据本发明的一种替代程序中,设定锗层厚度,使得在较高温度下实现锗的特别是至少占大部分的、优选地完全的溶解,但在冷却期间产生导致锗沉淀的过饱和混合晶体。所述锗沉淀可积极地影响铝的强度特性。所述锗沉淀优选地特别是以与额外热处理组合的方式造成铝的强度增加。
第二实施例
可应用根据本发明的理念的第二系统是铝-镓(简称为Al-Ga)。二元铝-镓系统是具有极强降级的纯共晶系统。共晶体浓度极接近于纯镓的浓度。
镓在铝中的边界溶解度是格外高的且在约125℃温度下达到其大约7.5mol%至8.0mol%的最大值。而铝在镓中的边界溶解度是极小的。
因此,根据本发明选择铝作为基本材料。为了保护铝免受氧化,铝在成功沉积之后立即用镓层覆盖。形成特别是小于10μm,优选地小于1μm,更优选地小于100nm,最优选地小于10nm,最最优选地小于1nm的镓层。
在尽可能低的温度下进行沉积,以便防止或至少抑制镓在提高的温度下至铝中的部分或甚至完全扩散。镓具有大约30℃的极低熔点。为了防止施加于铝上的镓层液化,设定低于30℃的温度。然而,根据本发明也可设想的是,镓在提高的温度下在铝上保持液态形式,而没有使整个晶圆的操作变难。原因应该主要在于极其少量的经沉积的镓,其具有足够高的表面张力及至铝的足够高的黏着力,以便继续作为液态金属膜存在。
在第二实施方式中,根据本发明规定,镓在适当的温度下扩散至铝中。因此,在用保护层覆盖基本层之后尽可能短地执行后续接合过程。
在沉积镓的情形中,铝的温度小于300℃,优选地小于200℃,更优选地小于100℃,最优选地小于50℃,最最优选地小于30℃,终极优选地小于0℃。在特定情形中,甚至可主动地冷却铝,以便进一步降低温度。如果该系统曝露于含氧气氛中,则镓优选地氧化且因此保护铝。
在此要注意的是,镓的标准电极电位是大约-0.53V,铝的标准电极电位是大约-1.66V。因此,锗比铝更贵重且因此不能作为牺牲阳极来化学上保护铝。与此相应地,紧密地施加镓层以便在铝与气氛之间建立物理势垒。
镓在铝中的边界溶解度即使在室温下仍是极其高的,若非甚至几乎略低于已述及的7.5mol%至8.0mol%的最大值。镓在铝中的边界溶解度在低于室温处才又降低。在本发明的该实施方案中,因此可用避免在铝中溶解的镓的沉淀。
通过特别是即使在室温下镓在铝中的还尤其高的溶解度,材料镓尤其适合溶解于铝中。
根据本发明,设定过程参数,使得在任何时候镓在铝中的浓度小于边界溶解度,因此否则可以由具有镓的铝混合晶体及液相产生二相系统。这将导致,不能再实施接合,因为即使在室温下仍存在液相。
另一方面,低熔点及在极其低温下液化的可能性恰好是对后续接合过程的最优前提。通过最小的温度增加,镓在铝的表面上液化且因此作为液相匹配要彼此连接的两个表面的轮廓。虽然本发明的实际根据本发明的理念是将镓溶解于铝中,但就此作为独立的发明方面揭示在实际溶解过程之前为支持接合过程在低温下的液化能力。
为了实施铝与所期望的第二材料之间的接合,首先从镓上移除可能形成的氧化镓。就像铝一样,镓被紧密的氧化层覆盖且因此被钝化。镓与水形成氢氧化镓层。通过物理和/或化学手段进行氧化镓的移除。
可设想氧化物的溅射去除、通过还原性酸和/或碱液的湿式化学移除、通过氢或其他气体还原剂的还原。在移除氧化镓之后,尽可能快地执行纯镓表面与要接合表面(特别是,特别是根据本发明类似地构造的基板)的接触。
在相对于室温提高的温度下进行接合过程。在此,接合温度特别是大于25℃,优选地大于100℃,更优选地大于200℃,最优选地大于300℃,最最优选地大于400℃,终极优选地约426℃。根据相图,铝在77℃与177℃之间具有对锗的大约8mol%的最大溶解度。
在Al-Ga扩散对的情形中,极难防止在边界区域中形成液态共晶相。因为根据本发明将镓溶解于铝中是优选的且尽可能快地发生扩散,所以根据本发明短暂存在液相是可接受的。根据本发明,接合温度在接合过程期间直至在该温度下镓在铝中的至少占大部分的、优选地完全的溶解都保持恒定。
可通过已知镓在铝中的扩散常数的情况下解一维扩散方程来计算所需时间。然而,可能必需的并且有意义的是,更短或更长地维持该温度。使镓溶解于铝中的时间长度在此大于1分钟,优选地大于10分钟,更优选地大于30分钟,最优选地大于1小时,最最优选地大于2小时,终极优选地大于5小时。
在溶解过程期间,优选地维持或甚至增加彼此要接合的基板上的压力。起作用的压力特别是大于1Pa,优选地大于100Pa,更优选地大于10000Pa,最优选地大于1MPa,最最优选地大于10MPa,终极优选地大于100MPa。特别是相对于标准晶圆所使用的力大于10N,优选地大于100N,最优选地大于1000N,最最优选地大于10000N,终极优选地大于100000N。
在溶解过程期间,镓优选地溶解于全部铝中。由于要被溶解的镓的量是极小的,然而进行溶解的铝的量是极大的的事实,镓在铝中的总浓度是极小的。镓在铝中的总浓度特别是小于10mol%,优选地小于5mol%,优选地小于1mol%,最优选地小于10-3mol%。优选地,镓不仅仅只是溶解于铝的表面附近的区域中,而是尽可能深地扩散至铝中,优选地如此深,使得在一定时间之后,已实现镓在铝中的均匀分布。
在根据本发明的程序中,现在确保在冷却过程期间,从不超过镓在铝中的边界溶解度,使得镓总是保持完全地溶解于铝中。因此,在整个温度范围中防止镓在铝基质中的沉淀。在Al-Ga系统中,其在技术上可以极简单地实现,因为镓在铝中的边界溶解度的改变在大约130℃与室温之间的温度范围中是边际性的,因此不特别强烈地改变。因此,在冷却过程期间,实际上不存在发生镓在铝中(明显)沉淀的危险。镓层厚度与铝层厚度之间的比率在此小于1,优选地小于10-3,更优选地小于10-5,最优选地小于10-7,最最优选地小于10-9,终极优选地小于10-11
第三实施例
可应用根据本发明的理念的第三系统是铝-锌(简称为Al-Zn)系统。二元铝-锌系统是具有富锌共晶体及富锌共析体的二元系统。对于根据本发明的理念,特别是系统伙伴的边界溶解度是重要的。根据Al-Zn相图,铝具有对锌的边界溶解度,且锌具有对铝的边界溶解度(即使其是小的)。因为铝优选地用作基本材料且锌优选地用作保护层,所以仅仅相图的富铝侧是重要的。
为了保护铝免受氧化,铝在成功沉积于基板上之后立即用作为保护层的锌层来覆盖。锌因此是用于保护基本层免受氧化的保护材料。
锌层特别是小于10μm,优选地小于1μm,更优选地小于100nm,最优选地小于10nm,最最优选地小于1nm。
在尽可能低的温度下进行沉积,以便防止或至少抑制锌在提高的温度下至铝中的部分或甚至完全扩散。
在沉积锌的情形中,铝的温度小于600℃,优选地小于500℃,更优选地小于400℃,最优选地小于300℃,最最优选地小于200℃,终极优选地小于100℃。在特定情形中,甚至可主动冷却铝,以便使温度进一步降低。通过尽可能低的温度,沉积于铝上的锌在其热运动中立即被阻碍,且优选地保留在表面上,因此不扩散至铝中。
另外,通过低温下锌在铝中的尤其低的溶解度,使锌至铝中的扩散变难。自该时刻起,锌用作铝的保护材料。如果该系统曝露于含氧气氛中,则锌至少占大部分地、优选地完全地氧化,且其因此特别是通过铝相对于该气氛密封来保护铝免受氧化。
在此要注意的是,锌的标准电极电位是大约-0.76V,铝的标准电极电位是大约-1.66V。因此,锌比铝更贵重且因此不能作为牺牲阳极来化学上保护铝。与此相应地,紧密地施加锌层,以便在铝与周边区(特别是气氛)之间建立物理势垒。
为了实施铝与所期望的第二材料之间的接合,首先从锌上移除可能形成的氧化锌。特别是,通过物理和/或化学手段进行氧化锌的移除。根据本发明可设想氧化物的溅射去除、通过还原性酸的湿式化学移除或通过氢或其他气体还原剂(特别是一氧化碳)的还原。
在移除氧化锌之后,尽可能快地进行纯锌表面与待接合的表面的接触。在相对于室温提高的温度下进行接合过程。在此,接合温度大于25℃,优选地大于100℃,更优选地大于200℃,最优选地大于300℃,最最优选地大于400℃,终极优选地约380℃。根据相图,锌在大约350℃与大约380℃之间具有关于锌在铝中的高溶解度的极大区域。
根据本发明,将所沉积的锌的量设定为低的,使得在锌在铝中完全且主要地均匀分布之后,设定任何区域中的浓度不高于1mol%锌,更不必说50mol%至60mol%锌。大溶解度范围良好地适用于避免可能的局部浓度过高,而不离开根据本发明所期望的混合晶体的浓度范围。通过相应地长的热处理,又通过锌在铝中的均匀分布来降低锌在铝中的可能的浓度过高,使得在冷却过程之前达到的、锌在铝中的最终的结尾浓度优选地低于在室温下锌在铝中的边界溶解度。
根据本发明,优选地在接合过程期间,因此在将全部锌溶解于铝中所需的时间长度内将该系统维持在此温度范围内。然而,即使在大约280℃处,锌在铝中的边界溶解度是足够高得来实施根据本发明的方法。可通过已知锌在铝中的扩散常数的情况下解一维扩散方程来计算所需时间。然而,根据本发明可能有意义的是,更短或更长地保持该温度。
将锌溶解于铝中的时间长度设定为特别是大于1分钟,优选地大于10分钟,更优选地大于30分钟,最优选地大于1小时,最最优选地大于2小时,终极优选地大于5小时。
在溶解过程期间,优选地维持或增加彼此要接合的基板上的压力。起作用的压力特别是大于1Pa,优选地大于100Pa,更优选地大于10000Pa,最优选地大于1MPa,最最优选地大于10MPa,终极优选地大于100MPa。特别是相对于标准晶圆所使用的力大于10N,优选地大于100N,最优选地大于1000N,最最优选地大于10,000N,终极优选地大于100000N。
在溶解过程期间,锌优选地溶解于全部铝中。由于要被溶解的锌的量是极小的而进行溶解的铝的量是极大的的事实,锌在铝中的总浓度是极小的。优选地,锌不仅仅只是溶解于铝的表面附近的区域中,而是尽可能深地扩散至铝中,优选地如此深,使得在一定时间之后,已实现锌在铝中的均匀分布。
在根据本发明的第一程序中,现在确保在冷却过程期间,不超过锌在铝中的边界溶解度,使得锌总是保持完全地溶解于铝中。因此,在整个根据本发明的温度范围中防止锌在铝基质中的沉淀。这根据本发明通过以下方式实现:选择铝层厚度对锌层厚度的根据本发明的比率,且扩散过程运行确定的时间,直至锌特别是在整个可用的空间中完全地分布于铝中。锌层厚度与铝层厚度之间的比率在此小于1,优选地小于10-3,更优选地小于10-5,最优选地小于10-7,最最优选地小于10-9,终极优选地小于10-11
根据另一种根据本发明的程序中,设定锌层厚度,使得在较高温度下实现锌在铝中的特别是至少占大部分的、优选地完全的溶解,但在冷却期间,产生造成锌沉淀的过饱和混合晶体。所述锌沉淀可积极地影响铝的强度特性。所述锌沉淀优选地特别是以与热处理组合的方式造成铝的强度增加。
第四实施例
可应用根据本发明的理念的第四系统是铝-镁(简称为Al-Mg)系统。二元Al-Mg系统是具有镁在铝中的边界溶解度以及铝在镁中的边界溶解度的由两个共晶体组成的二元系统。优选地选择铝作为基本材料。
为了保护铝免受氧化,在成功沉积镁材料之后立即用镁层覆盖铝。镁特别是在其纯的形式下是极具反应性的碱土金属。
镁层特别是小于10μm,优选地小于1μm,更优选地小于100nm,最优选地小于10nm,最最优选地小于1nm。
在尽可能低的温度下进行沉积,以便防止或至少抑制在提高的温度下镁到铝中的部分或甚至完全扩散。
在沉积镁的情形中,铝的温度小于600℃,优选地小于500℃,更优选地小于400℃,最优选地小于300℃,最最优选地小于200℃,终极优选地小于100℃。在特定情形中,甚至可主动地冷却铝,以便使温度进一步降低。通过尽可能低的温度,沉积于铝上的镁在其热运动中立即被阻碍,且优选地保留在表面上,因此不扩散至铝中。
另外,通过低温下镁在铝中的尤其低的溶解度来使镁至铝中的扩散变难。自该时刻开始,镁用作铝的保护材料。如果该系统曝露于含氧气氛中,则镁优选地氧化且因此保护铝。
在此要注意的是,镁的标准电极电位是大约-2.36V,铝的标准电极电位是大约-1.66V。因此,镁没有铝贵重且因此能够作为牺牲阳极来化学上保护铝。或许甚至可设想,经沉积的镁直接用作已经至少部分地形成或非完全地移除的氧化铝的还原剂。还原过程可通过特有的额外的热处理步骤来执行且优选地在形成氧化镁的情况下将覆盖有镁的氧化铝还原成纯铝。在这一点上,特别是发现独立的发明方面,其应该与所揭示的任意其他方法特征组合地有效且可予以主张。
为了实施铝与所期望的第二材料之间的接合,必须首先从镁上移除可能形成的氧化镁。通过物理和/或化学手段进行氧化镁的移除。根据本发明可设想氧化物的溅射去除、通过还原性酸的湿式化学移除或通过氢或其他气体还原剂的还原。就此要考虑的是,氧化镁应是仅通过湿式化学手段可能很难完全地移除的相当稳定的结构,因此根据本发明物理方法是更适合的。
在移除氧化镁之后,尽可能快地进行纯镁表面与待接合的表面的接触。在提高的温度下进行接合过程。在此,接合温度大于25℃,优选地大于100℃,更优选地大于200℃,最优选地大于300℃,最最优选地大于400℃,终极优选地约426℃。
根据相图,铝在大约452℃下具有对镁的大约16mol%的最大溶解度。然而,如果期望在边界区域中防止形成液相且仅负责固态镁溶解于固态铝中,则优选接合温度低于所述的452℃。在此温度范围中,镁在铝中的溶解度仍总是足够高的以引起镁在铝中的明显的溶解。根据本发明,在镁在铝中特别是占大部分地、优选地完全地溶解所需的时间内维持该温度。可通过已知镁在铝中的扩散常数的情况下解一维扩散方程来计算所需时间。根据本发明可能有意义的是,更短或更长地维持该温度。
将镁溶解于铝中的时间长度设定为特别是大于1分钟,优选地大于10分钟,更优选地大于30分钟,最优选地大于1小时,最最优选地大于2小时,终极优选地大于5小时。
在溶解过程期间,优选地维持或增加彼此要接合的基板上的压力。起作用的压力特别是大于1Pa,优选地大于100Pa,更优选地大于10000Pa,最优选地大于1MPa,最最优选地大于10MPa,终极优选地大于100MPa。作用于晶圆上的所使用的力大于10N,优选地大于100N,最优选地大于1000N,最最优选地大于10000N,终极优选地大于100000N。
在溶解过程期间,镁优选地溶解于全部铝中。由于要被溶解的镁的量是极低的且进行溶解铝的量是极大的的事实,镁在铝中的总浓度是极小的。优选地,镁不仅仅只是溶解于铝的表面附近的区域中,而是尽可能深地扩散至铝中,优选地如此深,使得在一定时间之后,已实现镁在铝中的均匀分布。
在根据本发明的第一程序中负责,在冷却过程期间,不发生超过镁在铝中的边界溶解度,使得镁保持完全溶解于铝中。因此,在整个根据本发明的温度范围中防止在铝基质中的化学计量的铝-镁相的沉淀。这根据本发明通过以下方式实现:选择铝层厚度对镁层厚度的根据本发明的比率,以及为扩散过程提供足够时间,直至镁完全地并且特别是在整个可用的空间上分布于铝中。镁层厚度与铝层厚度之间的比率被选择为特别是小于1,优选地小于10-3,更优选地小于10-5,最优选地小于10-7,最最优选地小于10-9,终极优选地小于10-11
在根据本发明的替代程序中,设定镁层厚度,使得在提高的温度下虽然实现镁的特别是占大部分的、优选地完全的溶解,但在冷却期间,产生导致化学计量的铝-镁相的沉淀的过饱和混合晶体。铝-镁相沉淀可积极地影响铝的强度特性。铝-镁相沉淀优选地特别是以与热处理组合的方式造成铝的强度增加。
在相当特定的实施方式中,在沉积保护材料之前研磨和/或抛光基本材料。在此,其造成表面的平坦化,该平坦化对稍后的接合过程具有决定性的重要性。平均粗糙度和/或二次粗糙度小于100μm,优选地小于10μm,更优选地小于1μm,最优选地小于100nm,最最优选地小于10nm,终极优选地小于1nm。抛光可通过纯机械和/或化学手段来实现。最优选是化学机械抛光(英文:chemical mechanical polishing,CMP)。
如果氧化层已形成于基本材料上,则优选地已通过所述的工艺移除了该氧化层。如果通过所述的工艺不足以移除氧化物,则可附加地使用已述及的用于氧化物移除的工艺、诸如溅镀、使用还原气体和/或酸。在氧化物的平面化及可能的清洁之后,然后进行保护层的涂布。
根据本发明的一种有利实施方式,适用于根据本发明的所有实施方式的是,稍后发生的第二热处理过程与接合过程可特别是空间上分离地发生。在接合设备中,优选地仅执行实际的接合过程。接合过程特别是持续小于5小时,优选地小于1小时,更优选地小于30分钟,最优选地小于15分钟,最最优选地小于5分钟。
一旦接合步骤完成且在两个基板之间存在足够高的黏着力,便可自接合器上取下经接合的基板对,以便在另一设备中进一步处理、特别是热处理。这样的热处理设备优选地是批量设备,因此是可同时、或许甚至连续地容纳大量晶圆的设备。根据本发明,在这样的热处理设备中的热处理达特别是长于5分钟,优选地长于30分钟,更优选地长于1小时,最优选地长于5小时。在这样的热处理设备中的温度优选地是可调整的,优选地可沿着路径和/或作为时间的函数进行调整,使得经处理的基板可经过准确的温度分布曲线。所使用的温度特别是大于25℃,优选地大于100℃,更优选地大于300℃,更优选地大于500℃,最优选地大于800℃。热处理可优选地在惰性气体气氛中发生,以便保护基板的裸露表面免受不必要的或不期望的氧化。
在这样的热处理设备中,可执行所有可设想的热处理步骤。特别是可设想,在热处理设备中才进行根据本发明的保护层在基本材料中的实际溶解。热处理设备可将多个基板对同时带至比接合设备中的情形更高的温度。在连续工作的于一侧上容纳基板对的热处理设备的情况下,例如通过传送带将该基板对连续地传送穿过设备,且又将该基板对于另一端上释放,甚至可以关于路径设想温度梯度的设定,且因此特别是在恒定传送带速度的情形中关于时间设想温度梯度的设定。然而,根据本发明,只有当为了制造基板之间的相应固态接合不需要压力时,才应该在接合设备外部进行保护材料至基本材料中的扩散。
在基板之间的成功接触及成功接合之后,特别是在保护材料根据本发明溶解于基本材料中之后,力求组织的尽可能在两个基本材料层的整个厚度上作用的再结晶。该再结晶可在热处理设备中发生,只要该过程在实际接合过程期间还没有发生。
再结晶导致颗粒的特别是超过接合界面的重新构造,且因此产生沿着整个厚度穿过的、机械稳定的、固态并且永久的基本材料层。通过再结晶形成的新的微结构具有最优选的实际所期望的组织,因为在该组织中不再存在接合界面。优选地使用组织的至少部分地可控制的再结晶的方法。属于此的特别是位错密度的增加和/或相应高的温度。
在最优选的实施方式中,在特别是与接合器分离的外部热处理设备中进行保护材料在基本材料中的根据本发明的溶解以及组织的再结晶。因此,接合器能够尽可能快地用于下一基板接合。在相当特定的实施方式中,根据本发明的溶解过程以及再结晶同时发生。
附图说明
从优选实施例的后续阐述以及借助附图得出本发明的其他优点、特征及细节。其中:图1示出二元Al-Ge相图的图示,
图2示出二元Al-Ga相图的图示,
图3示出二元Al-Zn相图的图示,
图4示出二元Al-Mg相图的图示,
图5a示出根据本发明的基板的一种实施方式的示意性剖面图,该基板具有由基本材料构成的整面的基本层以及由保护材料构成的经由对准的整面的保护层,
图5b示出在接触/接合步骤中的根据图5a的示意性剖面图,以及
图5c示出在接合步骤之后的根据图5a的示意性剖面图。
具体实施方式
图1示出示例性的第一二元Al-Ge系统。相图中的根据本发明重要的部分是混合晶体区7。混合晶体区7通过边界溶解度8与二相区9、10分离。锗的边界溶解度自共晶温度或共晶体11开始随着温度降低而降低。锗的边界溶解度自共晶温度或共晶体11开始随着温度增加而同样降低。
图2示出示例性的第二二元Al-Ga系统。相图中的根据本发明重要部分是混合晶体区7。混合晶体区7通过边界溶解度8与二相区9、10分离。镓的边界溶解度自共晶温度或共晶体11开始随着温度降低而降低。镓的边界溶解度自共晶温度或共晶体11开始随着温度增加而同样降低。特点是共晶体通过非常靠近纯锗浓度处的共晶点6的降级。
图3示出示例性的第三二元Al-Zn系统。相图中的根据本发明重要部分是混合晶体区7。混合晶体区7在此很有特点。在约370℃温度处,混合晶体区达到直至大于65mol%锌。混合晶体区7通过边界溶解度8'与二相区10分离。锌的边界溶解度自共析温度或共析体11'开始随着温度降低而降低。
图4示出示例性的第四二元Al-Mg系统。相图中的根据本发明重要部分是混合晶体区7。混合晶体区7通过边界溶解度8与二相区9、10分离。镁的边界溶解度自共晶温度或共晶体11开始随着温度降低而降低。镁的边界溶解度自共晶温度或共晶体11开始随着温度增加而同样降低。
图5a示出根据本发明的尽可能简单的系统,该系统由第一基板4及第二基板5组成。两个基板4及5涂布有基本材料1及保护材料2。在一种根据本发明的实施方式中,基本材料1及保护材料2不必整面地施加在第一基板4上,而是在接合之前经受一定的结构化。在此步骤中,已移除保护材料2的可能的氧化层。
图5b示出两个基板4及5的接触或接合步骤。如果两个基板经结构化,则之前的对准步骤必须在进行实际接触或接合步骤之前将两个基板彼此对准。
最后,图5c示出所产生的混合晶体12,其通过保护层材料2扩散至基本材料1中来实现。
附图标记列表
1 基本材料
2 保护材料
3 氧化层
4 第一基板
5 第二基板
6 共晶点
7 混合晶体区
8 边界溶解度
9 二相区液态,固态
10 二相区固态,固态
11,11’ 共晶体,共析体
12 混合晶体

Claims (20)

1.用于将第一基板与第二基板接合的方法,所述方法包括:
将可氧化基本材料作为基本层施加在第一基板的接合侧上,
用具有小于100nm的厚度的保护层至少部分地覆盖所述基本层,所述保护层由包含非金属化学元素的保护材料组成;以及
接合所述第一和第二基板,
其中所述保护材料在低于共晶温度的接合温度下接合期间完全溶解于基本材料中而不形成液相,
其中所述非金属化学元素包括Si、Se、C、O、Te和B。
2.根据权利要求1所述的方法,其中所述基本材料是氧亲和性的并且由铝和/或铜组成。
3.根据权利要求1所述的方法,其中施加基本材料作为基本层和/或用保护层覆盖所述基本层的步骤通过沉积来实现。
4.根据权利要求1所述的方法,其中通过所述保护层相对于气氛至少占大部分地密封被覆盖的基本层。
5.根据权利要求1所述的方法,此外包括:
在接合步骤之前利用以下工艺中的一个或多个处理所述保护层:
(a)化学氧化物移除;
(b)物理氧化物移除;以及
(c)离子辅助化学蚀刻。
6.根据权利要求5所述的方法,其中物理氧化物移除利用等离子体执行。
7.根据权利要求1所述的方法,其中基本材料和/或保护材料是选自以下组的一种或多种材料,该组包括金属、和配备有相应掺杂的半导体。
8.根据权利要求7所述的方法,其中所述金属包括碱金属、碱土金属、合金。
9.根据权利要求1所述的方法,其中配备有相应掺杂的半导体被选择作为所述保护材料。
10.根据权利要求5所述的方法,其中所述化学氧化物移除工艺包括气体还原剂和/或液体还原剂。
11.根据权利要求5所述的方法,其中所述离子辅助化学蚀刻工艺包括快速离子轰击、研磨、和/或抛光。
12.根据权利要求7所述的方法,其中所述金属选自包括Cu、Ag、Au、Al、Fe、Ni、Co、Pt、W、Cr、Pb、Ti、Te、Sn、Zn、和Ga的组。
13.根据权利要求8所述的方法,其中所述碱金属选自包括Li、Na、K、Rb、和Cs的组。
14.根据权利要求8所述的方法,其中所述碱土金属选自包括Mg、Ca、Sr、和Ba的组。
15.根据权利要求7所述的方法,其中所述半导体选自包括元素半导体和化合物半导体的组。
16.根据权利要求9所述的方法,其中所述半导体选自包括元素半导体和化合物半导体的组。
17.根据权利要求15所述的方法,其中所述元素半导体选自包括Si、Se、Te、和B的组。
18.根据权利要求16所述的方法,其中所述元素半导体选自包括Si、Se、Te、和B的组。
19.根据权利要求15所述的方法,其中所述化合物半导体选自包括GaAs、GaN、InP、InSb、InAs、GaSb、AlN、InN、GaP、BeTe、ZnO、CuInGaSe2、ZnS、ZnSe、ZnTe、CdS、CdSe、CdTe、BeSe、HgS、GaS、GaSe、GaTe、InS、InSe、InTe、CuInSe2、CuInS2、CuInGaS2、SiC、和SiGe的组。
20.根据权利要求16所述的方法,其中所述化合物半导体选自包括GaAs、GaN、InP、InSb、InAs、GaSb、AlN、InN、GaP、BeTe、ZnO、CuInGaSe2、ZnS、ZnSe、ZnTe、CdS、CdSe、CdTe、BeSe、HgS、GaS、GaSe、GaTe、InS、InSe、InTe、CuInSe2、CuInS2、CuInGaS2、SiC、和SiGe的组。
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US8736081B2 (en) * 2005-08-26 2014-05-27 Innovative Micro Technology Wafer level hermetic bond using metal alloy with keeper layer
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DE102008040775A1 (de) * 2008-07-28 2010-02-04 Robert Bosch Gmbh Verkapselung, MEMS sowie Verfahren zum selektiven Verkapseln
EP2363373A1 (en) 2010-03-02 2011-09-07 SensoNor Technologies AS Bonding process for sensitive micro-and nano-systems
EP2544169A4 (en) * 2010-03-03 2015-04-22 Sharp Kk DISPLAY DEVICE, ITS CONTROL METHOD, AND LIQUID CRYSTAL DISPLAY DEVICE
JP2012079935A (ja) * 2010-10-01 2012-04-19 Fujikura Ltd 複合基板の製造方法、及び複合基板
US8377798B2 (en) 2010-11-10 2013-02-19 Taiwan Semiconductor Manufacturing Co., Ltd Method and structure for wafer to wafer bonding in semiconductor packaging
US20120145308A1 (en) * 2010-12-08 2012-06-14 Jiangwei Feng Methods for anodic bonding material layers to one another and resultant apparatus
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US9054121B2 (en) * 2011-10-24 2015-06-09 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS structures and methods for forming the same
EP2600389B1 (en) 2011-11-29 2020-01-15 IMEC vzw Method for bonding semiconductor substrates
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Patent Citations (1)

* Cited by examiner, † Cited by third party
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