JP2004111935A - 電子部品の実装方法 - Google Patents
電子部品の実装方法 Download PDFInfo
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- JP2004111935A JP2004111935A JP2003298056A JP2003298056A JP2004111935A JP 2004111935 A JP2004111935 A JP 2004111935A JP 2003298056 A JP2003298056 A JP 2003298056A JP 2003298056 A JP2003298056 A JP 2003298056A JP 2004111935 A JP2004111935 A JP 2004111935A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/8182—Diffusion bonding
- H01L2224/81825—Solid-liquid interdiffusion
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
【解決手段】 回路基板10上に形成された回路電極11と、電子部品20上に形成された素子電極21を接合して、電子部品20を回路基板10上に実装する方法において、回路電極11、素子電極21上に、低融点金属層31、32をあらかじめ形成した後、電極同士を対向させて加熱加圧して溶融させ、回路電極11、素子電極21中へ固液拡散させることによって接合する。
【選択図】 図1
Description
前記回路電極及び/又は前記素子電極上に、低融点金属層をあらかじめ形成した後、前記回路電極及び前記素子電極を対向させて、少なくとも低融点金属が溶融する温度で加熱加圧し、前記低融点金属層を、前記回路電極及び前記素子電極中へ固液拡散させることによって、前記回路電極と前記素子電極とを接合することを特徴とする。
図1に示す方法を用いて電子部品を回路基板上に実装した。
蒸着による低融点金属層の形成において、上記の(16)式における蒸気圧比と活量係数比の積(γApA/γBpB)=0.98となるように制御しながら成膜を行った以外は実施例1と同様の条件で、半導体チップと回路基板との接合を行った。
図1に示す方法を用いて電子部品を回路基板上に実装した。
11:回路電極
20:電子部品
21:素子電極
30、31、32:低融点金属層
35:接合電極
36:中間合金層
36a:はみ出し部
40:ヘッド部
Claims (10)
- 回路基板上に形成された金属からなる回路電極と、電子部品上に形成された金属からなる素子電極とを接合して、前記電子部品を前記回路基板上に実装する方法において、
前記回路電極及び/又は前記素子電極上に、低融点金属層をあらかじめ形成した後、前記回路電極及び前記素子電極を対向させて、少なくとも低融点金属が溶融する温度で加熱加圧し、前記低融点金属層を、前記回路電極及び前記素子電極中へ固液拡散させることによって、前記回路電極と前記素子電極とを接合することを特徴とする電子部品の実装方法。 - 前記低融点金属層が、SnIn、In、Bi、SnBiより選択される一種を少なくとも含有する請求項1に記載の電子部品の実装方法。
- 前記接合時の加熱温度が、前記低融点金属の融点より0〜100℃高い温度である請求項2に記載の電子部品の実装方法。
- 前記回路電極及び前記素子電極の材質が、Cu、Ni、Auより選択される一種又はそれらの合金である請求項1〜3のいずれか1つに記載の電子部品の実装方法。
- 前記回路電極及び前記素子電極表面の表面粗さRaが0.4〜10μmの粗面であって、前記接合時に前記粗面同士が塑性変形して接合可能となるように加圧する請求項1〜4のいずれか1つに記載の電子部品の実装方法。
- 前記加熱加圧は、前記低融点金属層が、前記回路電極及び前記素子電極中に完全に固液拡散するまで行なう請求項1〜5のいずれか1つに記載の電子部品の実装方法。
- 前記加熱加圧は、前記低融点金属層が、前記回路電極と前記素子電極との間に中間合金層を形成するまで行なう請求項1〜5のいずれか1つに記載の電子部品の実装方法。
- 前記低融点金属層は、合金を形成できる少なくとも2種類以上の金属を2層以上に積層し、該積層した金属層を予備加熱して反応させて合金層とすることにより形成する請求項1〜7のいずれか1つに記載の電子部品の実装方法。
- 前記低融点金属層は、合金を蒸発源として蒸着することにより形成し、前記蒸着時に、前記合金の各金属成分の反応過程における蒸気圧比を制御することによって、目標とする合金組成となるように成膜する請求項1〜7のいずれか1つに記載の電子部品の実装方法。
- 前記低融点金属層は、合金を蒸発源として蒸着することにより形成し、前記蒸着時に、前記合金の各金属成分の反応過程における蒸気圧比及び活量係数比の積を制御することによって、目標とする合金組成となるように成膜する請求項1〜7のいずれか1つに記載の電子部品の実装方法。
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Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005086221A1 (ja) * | 2004-03-02 | 2005-09-15 | Fuji Electric Holdings Co., Ltd. | 電子部品の実装方法 |
JP2008072006A (ja) * | 2006-09-15 | 2008-03-27 | Toyota Central R&D Labs Inc | 接合体 |
US7670879B2 (en) | 2002-08-30 | 2010-03-02 | Fuji Electric Holdings Co., Ltd. | Manufacturing method of semiconductor module including solid-liquid diffusion joining steps |
JP2011127776A (ja) * | 2009-12-15 | 2011-06-30 | Fuji Koki Corp | 可溶栓 |
JP2011216813A (ja) * | 2010-04-02 | 2011-10-27 | Fujitsu Ltd | はんだ接合方法、半導体装置及びその製造方法 |
CN102275043A (zh) * | 2010-06-10 | 2011-12-14 | 中国科学院金属研究所 | 一种消除SnBi焊料与铜基底连接界面脆性的方法 |
US8293370B2 (en) | 2006-08-04 | 2012-10-23 | Panasonic Corporation | Bonding material, bonded portion and circuit board |
KR20130020565A (ko) * | 2011-08-17 | 2013-02-27 | 소니 주식회사 | 반도체 장치, 반도체 장치의 제조 방법 및 전자 기기 |
US8658914B2 (en) | 2008-08-21 | 2014-02-25 | Murata Manufacturing Co., Ltd. | Electronic component device and method for manufacturing the same |
JP2015037809A (ja) * | 2005-08-12 | 2015-02-26 | アンタヤ・テクノロジーズ・コープ | 多層はんだ製品とその製作方法 |
CN105517947A (zh) * | 2013-09-13 | 2016-04-20 | Ev集团E·索尔纳有限责任公司 | 用于施加接合层的方法 |
CN110233138A (zh) * | 2018-03-06 | 2019-09-13 | 夏普株式会社 | 半导体发光装置 |
WO2022050186A1 (ja) * | 2020-09-04 | 2022-03-10 | 株式会社新菱 | Sn-In系低融点接合部材およびその製造方法ならびに半導体電子回路およびその実装方法 |
-
2003
- 2003-08-22 JP JP2003298056A patent/JP4136844B2/ja not_active Expired - Fee Related
Cited By (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7670879B2 (en) | 2002-08-30 | 2010-03-02 | Fuji Electric Holdings Co., Ltd. | Manufacturing method of semiconductor module including solid-liquid diffusion joining steps |
WO2005086221A1 (ja) * | 2004-03-02 | 2005-09-15 | Fuji Electric Holdings Co., Ltd. | 電子部品の実装方法 |
JP2015037809A (ja) * | 2005-08-12 | 2015-02-26 | アンタヤ・テクノロジーズ・コープ | 多層はんだ製品とその製作方法 |
US8293370B2 (en) | 2006-08-04 | 2012-10-23 | Panasonic Corporation | Bonding material, bonded portion and circuit board |
US8679635B2 (en) | 2006-08-04 | 2014-03-25 | Panasonic Corporation | Bonding material, bonded portion and circuit board |
JP2008072006A (ja) * | 2006-09-15 | 2008-03-27 | Toyota Central R&D Labs Inc | 接合体 |
US8658914B2 (en) | 2008-08-21 | 2014-02-25 | Murata Manufacturing Co., Ltd. | Electronic component device and method for manufacturing the same |
JP2011127776A (ja) * | 2009-12-15 | 2011-06-30 | Fuji Koki Corp | 可溶栓 |
JP2011216813A (ja) * | 2010-04-02 | 2011-10-27 | Fujitsu Ltd | はんだ接合方法、半導体装置及びその製造方法 |
CN102275043A (zh) * | 2010-06-10 | 2011-12-14 | 中国科学院金属研究所 | 一种消除SnBi焊料与铜基底连接界面脆性的方法 |
KR20130020565A (ko) * | 2011-08-17 | 2013-02-27 | 소니 주식회사 | 반도체 장치, 반도체 장치의 제조 방법 및 전자 기기 |
KR101996676B1 (ko) * | 2011-08-17 | 2019-07-04 | 소니 주식회사 | 반도체 장치, 반도체 장치의 제조 방법 및 전자 기기 |
KR20160053937A (ko) * | 2013-09-13 | 2016-05-13 | 에베 그룹 에. 탈너 게엠베하 | 접합 레이어 도포 방법 |
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US9911713B2 (en) | 2013-09-13 | 2018-03-06 | Ev Group E. Thallner Gmbh | Method for applying a bonding layer |
CN105517947A (zh) * | 2013-09-13 | 2016-04-20 | Ev集团E·索尔纳有限责任公司 | 用于施加接合层的方法 |
CN110085526A (zh) * | 2013-09-13 | 2019-08-02 | Ev 集团 E·索尔纳有限责任公司 | 用于施加接合层的方法 |
CN110085526B (zh) * | 2013-09-13 | 2023-11-28 | Ev 集团 E·索尔纳有限责任公司 | 用于施加接合层的方法 |
US10438925B2 (en) | 2013-09-13 | 2019-10-08 | Ev Group E. Thallner Gmbh | Method for applying a bonding layer |
JP2016532312A (ja) * | 2013-09-13 | 2016-10-13 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | ボンディング層を施与する方法 |
KR20200023525A (ko) * | 2013-09-13 | 2020-03-04 | 에베 그룹 에. 탈너 게엠베하 | 접합 레이어 도포 방법 |
KR102184239B1 (ko) | 2013-09-13 | 2020-11-30 | 에베 그룹 에. 탈너 게엠베하 | 접합 레이어 도포 방법 |
KR20200133836A (ko) * | 2013-09-13 | 2020-11-30 | 에베 그룹 에. 탈너 게엠베하 | 접합 레이어 도포 방법 |
KR102306976B1 (ko) | 2013-09-13 | 2021-09-30 | 에베 그룹 에. 탈너 게엠베하 | 접합 레이어 도포 방법 |
CN110233138B (zh) * | 2018-03-06 | 2023-06-30 | 夏普株式会社 | 半导体发光装置 |
CN110233138A (zh) * | 2018-03-06 | 2019-09-13 | 夏普株式会社 | 半导体发光装置 |
WO2022050186A1 (ja) * | 2020-09-04 | 2022-03-10 | 株式会社新菱 | Sn-In系低融点接合部材およびその製造方法ならびに半導体電子回路およびその実装方法 |
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