CN109860203B - 阵列基板及其制造方法及显示屏 - Google Patents

阵列基板及其制造方法及显示屏 Download PDF

Info

Publication number
CN109860203B
CN109860203B CN201711240599.6A CN201711240599A CN109860203B CN 109860203 B CN109860203 B CN 109860203B CN 201711240599 A CN201711240599 A CN 201711240599A CN 109860203 B CN109860203 B CN 109860203B
Authority
CN
China
Prior art keywords
inorganic film
flexible substrate
film layer
groove
array substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711240599.6A
Other languages
English (en)
Other versions
CN109860203A (zh
Inventor
李瑶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Govisionox Optoelectronics Co Ltd
Original Assignee
Kunshan Govisionox Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Govisionox Optoelectronics Co Ltd filed Critical Kunshan Govisionox Optoelectronics Co Ltd
Priority to CN201711240599.6A priority Critical patent/CN109860203B/zh
Priority to US16/342,197 priority patent/US11227877B2/en
Priority to PCT/CN2018/092036 priority patent/WO2019105014A1/zh
Priority to TW107126042A priority patent/TWI662534B/zh
Publication of CN109860203A publication Critical patent/CN109860203A/zh
Application granted granted Critical
Publication of CN109860203B publication Critical patent/CN109860203B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本发明涉及一种阵列基板，其包括显示区、以及位于显示区外侧的非显示区；非显示区包括：柔性衬底，表面设有若干凹槽；柔性衬底上相邻凹槽之间的区域为走线区；无机膜层，包括同时形成于走线区的第一无机膜层，以及形成于所述凹槽的底壁的第二无机膜层；所述第二无机膜层与所述第一无机膜层之间被凹槽的侧壁断开；以及外围金属走线，形成于所述第一无机膜层的表面。上述阵列基板，柔性衬底表面设有凹槽，可以在无机膜层沉积时将无机膜层分隔成为若干个相互独立的部分，有效避免了无机膜层的断裂，进而有效避免外围金属走线的断裂。本发明还提供一种显示屏和一种阵列基板的制造方法。

Description

阵列基板及其制造方法及显示屏
技术领域
本发明涉及显示技术领域，特别是一种阵列基板及其制造方法及显示屏。
背景技术
显示屏包括显示区(AA区)以及非显示区(非AA区)，为了达到某些功能，会要求非显示区能够弯折。例如为了实现窄边框化，将非显示区弯折到屏体的背面，从而减少边框宽度。
但是，目前的显示屏，在非显示区的弯折过程中，非显示区中的外围金属走线易断裂，从而造成屏体不良。
发明内容
基于此，有必要提供一种能够有效防止外围金属走线断裂的阵列基板。
一种阵列基板，包括显示区、以及位于所述显示区外侧的非显示区；
所述非显示区包括：
柔性衬底，表面设有若干凹槽；所述柔性衬底上相邻所述凹槽之间的区域为走线区；
无机膜层，包括同时形成于所述走线区的第一无机膜层，以及形成于所述凹槽的底壁的第二无机膜层；所述第二无机膜层与所述第一无机膜层之间被凹槽的侧壁断开；
以及外围金属走线，形成于所述第一无机膜层的表面。
上述阵列基板，柔性衬底表面设有凹槽，从而可以将无机膜层断开形成第一无机膜层和第二无机膜层，其中第一无机膜层位于走线区，第二无机膜层位于凹槽的底壁，即可以在无机膜层沉积时将无机膜层分隔成为若干个相互独立的部分，从而在非显示区弯折时减小无机膜层的弯曲应力，有效避免了无机膜层的断裂，进而有效避免外围金属走线的断裂，提高阵列基板的可靠性。
在其中一个实施例中，所述凹槽的侧壁与所述凹槽的底壁的夹角小于90度。
在其中一个实施例中，所述凹槽的截面呈等腰梯形。
在其中一个实施例中，所述凹槽的深度大于1微米。
在其中一个实施例中，相邻两所述金属走线之间具有若干个所述凹槽。
在其中一个实施例中，还包括形成于所述外围金属走线表面的保护层。
在其中一个实施例中，所述柔性衬底包括柔性衬底主体层和柔性衬底表层；所述凹槽贯穿所述柔性衬底表层。
本发明还提供一种显示屏。
一种显示屏，包括本发明提供的阵列基板。
上述显示屏包括本发明提供的阵列基板，阵列基板的非显示区的结构可以有效防止外围金属走线的断裂，从而能够更好的保证讯号的传递，延长显示屏的使用寿命。
本发明还提供一种阵列基板的制造方法。
一种阵列基板的制造方法，所述阵列基板的非显示区的制造方法包括：
在柔性衬底上形成凹槽；
沉积无机膜层；以在所述柔性衬底的表面形成若干个第一无机膜层和若干个第二无机膜层；
在所述第一无机膜层表面形成外围金属走线。
在其中一个实施例中，在柔性衬底上形成凹槽的操作为：
提供柔性衬底主体层；
在所述柔性衬底主体层上形成图案化的柔性衬底表层，以使柔性衬底表层的镂空区域与所述柔性衬底主体层构成所述凹槽。
通过上述阵列基板的制造方法制得的阵列基板，可以在沉积无机膜层时直接将无机膜层分隔成为若干个相互独立的部分，从而在非显示区弯折时减小无机膜层的弯曲应力，有效避免了无机膜层的断裂，进而有效避免外围金属走线的断裂。
附图说明
图1为本发明实施例一的阵列基板的结构示意图。
图2为图1所示阵列基板的非显示区的截面示意图。
图3为本发明实施例二的阵列基板的非显示区的截面示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
需要说明的是，当元件被称为“设置于”另一个元件，它可以直接在另一个元件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件或者可能同时存在居中元件。本文所使用的术语“垂直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的，并不表示是唯一的实施方式。
除非另有定义，本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
如图1至图2所示，本发明实施例一提供的阵列基板300，包括显示区310、以及位于显示区外侧的非显示区320。
其中，显示区310(即AA区)为阵列基板100中与像素单元对应的区域，在显示区310中设有薄膜晶体管以及电容器等用于驱动像素单元的电子元件。本发明对于显示区310的具体结构没有特殊限制，可以采用本领域技术人员认为合适的各种结构，在此不再赘述。
本实施例中，非显示区320(即非AA区)位于显示区310的一侧。当然，非显示区320也可以存在于显示区310外侧的其他位置。
非显示区320包括柔性衬底321、无机膜层323以及外围金属走线325。
具体的，柔性衬底321包括一层或多层柔性基板。柔性衬底321表面设有若干凹槽3211，柔性衬底321上相邻凹槽3211之间的区域为走线区3213。
无机膜层323包括同时形成于所述走线区3213的第一无机膜层3231，以及形成于凹槽3211的底壁的第二无机膜层3233。第二无机膜层3233与第一无机膜层3231之间被凹槽3211的侧壁断开。外围金属走线325形成于第一无机膜层3231表面。
第二无机膜层3233与第一无机膜层3231之间被凹槽3211的侧壁断开。即将无机膜层323分隔成为若干个相互独立的部分，从而在非显示区320弯折时减小无机膜层323的弯曲应力，有效避免了无机膜层323的断裂，进而有效避免外围金属走线325的断裂，提高阵列基板300的可靠性。
凹槽3211的侧壁具有向凹槽3211外侧凹的壁段，如凹槽3211的侧壁为斜壁或凹槽3211侧壁的截面呈圆弧状等。此种结构，使得第一无机膜层3231和第二无机膜层3233可以通过一次无机物沉积工序完成，且使得无机物沉积时在凹槽3211的边沿处产生爬坡断裂现象，使得第一无机膜层3231和第二无机膜层3233相互独立。
优选的，本实施例中，凹槽3211的侧壁与凹槽3211的底壁的夹角小于90 度，即凹槽3211的侧壁为向凹槽3211外侧凹陷的斜壁。此种结构结构简单，便于实现。更优选的，凹槽3211的截面呈等腰梯形，即凹槽3211在垂直于凹槽3211延伸方向的截面呈等腰梯形。使得非显示区320弯曲时的弯曲应力均匀，避免产生应力集中的现象。
凹槽3211的深度大于无机膜层323的厚度，从而使得无机膜层323沉积时，第一无机膜层3231与第二无机膜层3233之间被凹槽3211的侧壁断开。优选的，凹槽3211的深度大于1微米，从而能够释放足够多的无机膜层的弯曲应力，确保防止无机膜层的断裂。
本实施例中，凹槽3211分布均匀，且凹槽3211的大小相同，便于加工。当然，根据需要，凹槽3211的分布可以不均匀，且凹槽3211的大小也可以不完全相同。
进一步地，第一无机膜层3231的宽度大于等于外围金属走线325的宽度，从而使得外围金属走线325能够完全位于第一无机膜层3231上，且不经过凹槽 3211处，从而不会导致外围金属走线325的爬坡断裂现象，即能防止外围金属走线325断裂，保证信号传输的可靠性。
本实施例中，相邻外围金属走线325之间仅具有一个凹槽3211。需要说明的是，相邻两所述金属走线325之间还可以具有若干个所述凹槽3211，能更多的释放无机膜层323的弯曲应力，防止无机膜层323的断裂，进而防止外围金属走线325的断裂。
在另外一个实施例中，阵列基板300的非显示区320还包括形成于外围金属走线325表面的保护层，用以防止外围金属走线325与水氧接触，导致外围金属走线325被氧化。
如图3所示，本发明实施例二提供的阵列基板，与阵列基板300不同的是，柔性衬底331包括柔性衬底主体层3315和柔性衬底表层3317。凹槽3311贯穿柔性衬底表层3317。柔性衬底主体层3315包括一层或多层柔性基板，柔性衬底表层3317包括一层或多层柔性基板。优选的，可以控制柔性衬底表层3317的厚度等于凹槽3311的深度，从而可以通过在柔性衬底主体层3315表面形成图案化的柔性衬底表层3317的方式，以使柔性衬底表层3317的镂空区域与柔性衬底主体层3315构成凹槽3311。
可以理解的是，凹槽3311的深度还可以大于或小于柔性衬底表层3317的厚度，只要精确控制刻蚀深度即可。但要保证凹槽3311的深度大于无机膜层的厚度，从而使得无机膜层沉积时，走线区的第一无机膜层与凹槽3311底壁的第二无机膜层之间被凹槽3311的侧壁断开。
本发明提供一种显示屏，包括本发明提供的阵列基板。
需要说明的是，显示屏除了阵列基板，还包括其它器件，其它器件的具体结构以及器件之间的连接关系均可以采用本领域技术人员所公知的结构，此处不再赘述。
本发明提供的阵列基板的非显示区的结构可以有效防止外围金属走线的断裂，从而能够更好的保证讯号的传递，延长显示屏的使用寿命。
本发明提供了一种阵列基板的制造方法。阵列基板的非显示区的制造方法具体的包括如下步骤：
S1，在柔性衬底上形成凹槽。
具体的，可以通过刻蚀等方式直接在柔性衬底的表面形成凹槽。
在另外一个实施例中，柔性衬底包括柔性衬底主体层和柔性衬底表层。柔性衬底主体层包括至少一层柔性基板；柔性衬底表层包括至少一层柔性基板。在柔性衬底的表面形成若干个凹槽的操作为：
提供柔性衬底主体层；
在柔性衬底主体层上形成图案化的柔性衬底表层，以使柔性衬底表层的镂空区域与柔性衬底主体层构成凹槽。
具体的，可以通过掩膜板等方式在柔性衬底主体层上形成图案化的柔性衬底表层。
S2，沉积无机膜层，以在所述柔性衬底的表面形成若干个第一无机膜层和若干个第二无机膜层。
具体的，在柔性衬底的走线区形成第一无机膜层，在凹槽的底壁上形成第二无机膜层。
S3，在第一无机膜层表面形成外围金属走线。
需要说明的是，阵列基板包括显示区和非显示区，显示区的制造方法可采用本领域技术人员所公知的制造方法，此处不再赘述。
通过上述阵列基板的制造方法制得的阵列基板，可以在沉积无机膜层时直接将无机膜层分隔成为若干个相互独立的部分，从而在非显示区弯折时减小无机膜层的弯曲应力，有效避免了无机膜层的断裂，进而有效避免外围金属走线的断裂。
上述阵列基板，柔性衬底表面设有凹槽，从而可以将无机膜层断开形成第一无机膜层和第二无机膜层，其中第一无机膜层位于走线区，第二无机膜层位于凹槽的底壁，即可以在无机膜层沉积时将无机膜层分隔成为若干个相互独立的部分，从而在非显示区弯折时减小无机膜层的弯曲应力，有效避免了无机膜层的断裂，进而有效避免外围金属走线的断裂，提高阵列基板的可靠性。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (10)

1.一种阵列基板，其特征在于，包括显示区、以及位于所述显示区外侧的非显示区；
所述非显示区包括：
柔性衬底，表面设有若干凹槽，所述凹槽的侧壁具有向所述凹槽外侧凹的壁段；所述柔性衬底上相邻所述凹槽之间的区域为走线区；
无机膜层，沉积形成于所述柔性衬底具有所述凹槽的表面，包括同时形成于所述走线区的第一无机膜层，以及形成于所述凹槽的底壁的第二无机膜层；所述第一无机膜层与所述第二无机膜层之间被凹槽的侧壁断开；
以及外围金属走线，形成于所述第一无机膜层的表面。
2.根据权利要求1所述的阵列基板，其特征在于，所述凹槽的侧壁与所述凹槽的底壁的夹角小于90度。
3.根据权利要求2所述的阵列基板，其特征在于，所述凹槽的截面呈等腰梯形。
4.根据权利要求1所述的阵列基板，其特征在于，所述凹槽的深度大于1微米。
5.根据权利要求1所述的阵列基板，其特征在于，相邻两所述金属走线之间具有若干个所述凹槽。
6.根据权利要求1所述的阵列基板，其特征在于，还包括形成于所述外围金属走线表面的保护层。
7.根据权利要求1所述的阵列基板，其特征在于，所述柔性衬底包括柔性衬底主体层和柔性衬底表层；所述凹槽贯穿所述柔性衬底表层。
8.一种显示屏，其特征在于，包括权利要求1至7任一项所述的阵列基板。
9.一种权利要求1的阵列基板的制造方法，其特征在于，所述阵列基板的非显示区的制造方法包括：
在柔性衬底上形成凹槽；
沉积无机膜层，以在所述柔性衬底的表面形成若干个第一无机膜层和若干个第二无机膜层；
在所述第一无机膜层表面形成外围金属走线。
10.根据权利要求9所述的阵列基板的制造方法，其特征在于，在柔性衬底上形成凹槽的操作为：
提供柔性衬底主体层；
在所述柔性衬底主体层上形成图案化的柔性衬底表层，以使柔性衬底表层的镂空区域与所述柔性衬底主体层构成所述凹槽。
CN201711240599.6A 2017-11-30 2017-11-30 阵列基板及其制造方法及显示屏 Active CN109860203B (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201711240599.6A CN109860203B (zh) 2017-11-30 2017-11-30 阵列基板及其制造方法及显示屏
US16/342,197 US11227877B2 (en) 2017-11-30 2018-06-20 Array substrates and manufacturing methods thereof and display screens
PCT/CN2018/092036 WO2019105014A1 (zh) 2017-11-30 2018-06-20 阵列基板及其制造方法及显示屏
TW107126042A TWI662534B (zh) 2017-11-30 2018-07-27 陣列基板及其製造方法及顯示屏

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711240599.6A CN109860203B (zh) 2017-11-30 2017-11-30 阵列基板及其制造方法及显示屏

Publications (2)

Publication Number Publication Date
CN109860203A CN109860203A (zh) 2019-06-07
CN109860203B true CN109860203B (zh) 2020-11-17

Family

ID=64797041

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711240599.6A Active CN109860203B (zh) 2017-11-30 2017-11-30 阵列基板及其制造方法及显示屏

Country Status (4)

Country Link
US (1) US11227877B2 (zh)
CN (1) CN109860203B (zh)
TW (1) TWI662534B (zh)
WO (1) WO2019105014A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110634418B (zh) * 2019-11-05 2022-11-11 京东方科技集团股份有限公司 驱动背板及其制备方法、驱动背板母板、显示面板和液晶天线的制备方法
CN113451329A (zh) * 2020-03-25 2021-09-28 深圳市柔宇科技有限公司 柔性基板及可拉伸电子装置
CN113206136B (zh) * 2021-04-29 2024-05-28 Oppo广东移动通信有限公司 显示面板及其制备方法、电子设备

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106716642A (zh) * 2014-09-30 2017-05-24 乐金显示有限公司 具有分开的配线图案的显示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003222898A (ja) 2002-01-30 2003-08-08 Kyocera Corp 液晶表示装置
US7242398B2 (en) 2002-02-18 2007-07-10 Ignis Innovation Inc. Flexible display device
KR102463838B1 (ko) 2015-08-24 2022-11-04 삼성디스플레이 주식회사 가요성 표시 장치와 이의 제조 방법
KR102611499B1 (ko) 2015-12-15 2023-12-06 엘지디스플레이 주식회사 플렉서블 표시장치
KR102446889B1 (ko) * 2015-12-28 2022-09-26 삼성디스플레이 주식회사 플렉서블 기판 및 이를 포함하는 플렉서블 표시 장치
KR102400022B1 (ko) 2015-12-30 2022-05-19 엘지디스플레이 주식회사 측부 구부림 구조를 갖는 플렉서블 유기발광 다이오드 표시장치
JP6756508B2 (ja) 2016-04-04 2020-09-16 株式会社ジャパンディスプレイ 表示装置
CN106206615B (zh) * 2016-08-26 2020-01-03 深圳市华星光电技术有限公司 阵列基板的制作方法
JP2018054675A (ja) * 2016-09-26 2018-04-05 株式会社ジャパンディスプレイ 表示装置
TWI621050B (zh) 2017-06-16 2018-04-11 友達光電股份有限公司 顯示裝置及其製造方法
CN109216576A (zh) * 2017-06-30 2019-01-15 京东方科技集团股份有限公司 一种有机电致发光显示面板、其制作方法及显示装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106716642A (zh) * 2014-09-30 2017-05-24 乐金显示有限公司 具有分开的配线图案的显示装置

Also Published As

Publication number Publication date
CN109860203A (zh) 2019-06-07
US11227877B2 (en) 2022-01-18
TWI662534B (zh) 2019-06-11
US20210327919A1 (en) 2021-10-21
WO2019105014A1 (zh) 2019-06-06
TW201837892A (zh) 2018-10-16

Similar Documents

Publication Publication Date Title
WO2019105012A1 (zh) 阵列基板及其制造方法及显示屏
CN109860203B (zh) 阵列基板及其制造方法及显示屏
US11398504B2 (en) Display panel and method for manufacturing same
US10748937B2 (en) Substrate and manufacturing method thereof and display device
WO2019105011A1 (zh) 阵列基板及显示屏
CN106684243B (zh) 一种柔性显示面板及显示装置
CN107579081B (zh) 一种显示面板和显示装置
US11609656B2 (en) Touch module, display panel and display apparatus
CN107818992B (zh) 一种显示面板和显示装置
US10886340B2 (en) Display panel and display device with reduced frame width
CN109560086A (zh) 显示面板
CN110442259B (zh) 触控基板及显示面板
US10923548B2 (en) Display panel and method for manufacturing same
US20200176484A1 (en) Curved array substrate and method of manufacturing thereof
CN110265460A (zh) Oled显示基板及其制作方法、显示装置
CN112669706B (zh) 柔性显示面板及其制作方法和电子设备
US11695015B2 (en) Array substrate, method of manufacturing the same, and display panel
CN110518020B (zh) 一种显示面板及其制作方法
CN112216681A (zh) 具有监测侧刻量功能的显示面板及其制作方法、监测方法
CN108695358B (zh) 一种显示面板及显示装置
US9466625B2 (en) Display panel, display device, and method for manufacturing display panel
US9679924B2 (en) Array substrate and manufacturing method thereof, display device
US10825887B2 (en) Flexible display panel, flexible display device and method of manufacturing the flexible display panel
CN111106129A (zh) 一种阵列基板、显示面板及阵列基板的制造方法
WO2017121089A1 (zh) 显示基板及其制作方法和显示装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant