CN109727932B - 功率半导体模块 - Google Patents

功率半导体模块 Download PDF

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CN109727932B
CN109727932B CN201811253311.3A CN201811253311A CN109727932B CN 109727932 B CN109727932 B CN 109727932B CN 201811253311 A CN201811253311 A CN 201811253311A CN 109727932 B CN109727932 B CN 109727932B
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solder
insulating substrate
power semiconductor
semiconductor module
brazing material
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CN109727932A (zh
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川村大地
增田彻
楠川顺平
樱井直树
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Hitachi Power Semiconductor Device Ltd
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Abstract

提供功率半导体模块，在绝缘基板下产生空隙时抑制电晕放电、提高绝缘性。以硬钎焊料(8‑2)的端部(8‑2e)与绝缘基板(2)侧面的下方延长线之间距离为a，以助焊剂(11)的软钎焊料(9‑2)侧的端部(11e)与绝缘基板(2)侧面的下方延长线之间距离为b，则a小于b。软钎焊料(9‑2)的端部位置被助焊剂(11)限制，硬钎焊料(8‑2)的绝缘基板(2)的侧面一侧端部(8‑2e)的位置，相比于软钎焊料(9‑2)的绝缘基板(2)侧面一侧的端部位置，更接近绝缘基板(2)侧面一侧。即使硬钎焊料(8‑2)与软钎焊料(9‑2)之间产生空隙，因硬钎焊料(8‑2)及软钎焊料(9‑2)同为接地电势而抑制电晕放电。

Description

功率半导体模块
技术领域
本发明涉及抑制电晕放电且提高绝缘可靠性的功率半导体模块。
背景技术
搭载功率半导体模块的电源转换器(变流器、逆变器)，广泛应用于铁路和汽车工业以及电力、社会基础设施等各领域，处理高电压的功率半导体模块要求具有高绝缘可靠性。
功率半导体模块的外周部由于空气/绝缘物的沿面(沿面)而被绝缘，通过标准(例如IEC60664)限定空间距离、沿面距离以在预定的环境中不会发生短路、放电。
另外，在以高密度组装有功率半导体芯片、绝缘基板、接合线等的模块内部，通过增加空间距离或沿面距离来确保绝缘性是困难的，因此在内部安装部件的周围通过绝缘树脂进行密封来实现各部件间的绝缘。
作为对模块内部进行密封的绝缘树脂材，例如，在额定电流100安培以上的大容量功率半导体模块中通常使用硅胶等软质树脂。
对于功率半导体模块，在金属底座上依次搭载有软钎焊料(半田)、背面电极、硬钎焊料(ロウ材)、绝缘基板及半导体芯片，并配置在绝缘壳体内。并且，在绝缘壳体内填充绝缘树脂以实现各部件的绝缘。
此处，虽然绝缘基板与金属底座之间距离狭小，但软钎焊料倾向于在金属底座面上润湿扩散，产生软钎焊料流淌，从而在绝缘基板与软钎焊料之间形成狭小的空隙。虽然绝缘基板与金属底座之间距离狭小，但是绝缘基板与软钎焊料之间更加狭小。
因此，存在绝缘基板与软钎焊料之间未填充绝缘树脂从而产生空隙的情况，在此空隙处有发生电晕放电的可能性。
为此，专利文献1中记载的技术中，对金属底座上表面进行激光照射从而形成金属氧化膜，以抑制软钎焊料流淌。
现有技术文献
专利文献
专利文献1
日本特开2008-207207号公报
发明内容
发明所要解决的课题
然而，在专利文献1所记载的技术中，考虑到对于金属底座上的绝缘基板的组装位置精度(与绝缘基板的表面平行方向的位置精度)的变动，要在从对应绝缘基板搭载区域的位置以预定距离来形成金属氧化膜。因此，常见产生软钎焊料流淌，直至金属氧化膜，从而在绝缘基板与软钎焊料之间显著存在窄幅区域，在该窄幅区域内未填充绝缘树脂从而形成空隙。因而会有在此空隙处发生电晕放电的可能性的问题。
本发明是鉴于上述现有技术的问题而完成的，其目的在于，提供一种即使在绝缘基板下产生空隙的情况下，也能够抑制电晕放电发生、提高绝缘可靠性的功率半导体模块。
解决课题的手段
为了达成上述目的，本发明为如下构成。
一种功率半导体模块，其包括绝缘基板、表面电极及背面电极、功率半导体芯片、背面软钎焊料、金属底座、软钎焊料流淌阻挡部、绝缘壳体以及绝缘树脂；所述表面电极及背面电极分别介隔着表面硬钎焊料及背面硬钎焊料固定在所述绝缘基板的表面及背面；所述功率半导体芯片介隔着表面软钎焊料与所述表面电极相连；所述背面软钎焊料形成在所述背面电极的与所述绝缘基板侧的相反侧的面上；所述金属底座上配置有所述背面软钎焊料，介隔着所述背面软钎焊料固定有所述背面电极；所述软钎焊料流淌阻挡部形成于所述金属底座的配置有所述背面软钎焊料的表面；所述绝缘壳体内容纳有所述绝缘基板、所述表面电极、所述背面电极、所述功率半导体芯片及所述金属底座；所述绝缘树脂填充在所述绝缘壳体内；其中，所述绝缘基板、所述表面软钎焊料、所述表面电极、所述背面硬钎焊料、所述背面电极以及所述背面软钎焊料在上下方向上层叠，所述背面硬钎焊料的端部的左右方向位置与所述绝缘基板的端部的左右方向位置之间的差，小于所述软钎焊料流淌阻挡部的对着所述背面软钎焊料左右方向端部的端部位置与所述绝缘基板的端部的左右方向位置之间的差。
发明效果
根据本发明，能够实现即使在绝缘基板下产生空隙的情况下，也能够抑制电晕放电的发生且提高绝缘可靠性的功率半导体模块。
附图说明
图1是实施例1的功率半导体模块的要部说明图。
图2是实施例2的功率半导体模块的要部说明图。
图3是实施例3的功率半导体模块的要部说明图。
图4是实施例4的功率半导体模块的要部说明图。
图5是实施例5的功率半导体模块的要部说明图。
图6是实施例6的功率半导体模块的要部说明图。
图7是本发明的功率半导体模块的第7实施例。
图8是显示适用了本发明的功率半导体模块的结构示意图。
图9是未适用本发明的情况下的功率半导体模块的构成例的图，是用于与本发明进行比较的图。
附图标记说明
1：功率半导体芯片，2：绝缘基板，2e：侧面，3：金属底座，4：接合线， 5：绝缘壳体，6：硅胶，7-1：表面电极，7-2：背面电极，8-1：表面硬钎焊料， 8-2：背面硬钎焊料，8-1e、8-2e：端部，9-1：表面软钎焊料，9-2：背面软钎焊料，10：空隙，11：助焊剂，11e：端部，12：金属氧化膜，12e：端部， 13：镀覆未处理部，13e：端部，14：金属底座凹部，14e：端部，15：背面电极锥形部分，16：导电膏，16e：端部，300、400、500、600、700、800、900：功率半导体模块。
具体实施方式
以下，基于图示的实施例对本发明的功率半导体模块进行说明。需要说明的是，各实施例中，对于同一构成部件使用相同附图标记。
实施例
(实施例1)
图1是实施例1的功率半导体模块的要部说明图。
在说明实施例1之前，对于适用了本发明的功率半导体模块进行说明。
图8是显示适用了本发明的功率半导体模块的结构示意图。在图8中，功率半导体模块由IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极晶体管) 或MOS(MetalOxide Semiconductor，金属氧化物半导体)等功率半导体芯片 1、绝缘基板2、金属底座3、接合线4、绝缘壳体5、作为绝缘密封材料的硅胶6等构成。
在绝缘基板2的一侧表面上通过硬钎焊料8-1连接有表面电极7-1，在绝缘基板2的另一侧表面上通过硬钎焊料8-2连接有背面电极7-2。在表面电极 7-1上通过软钎焊料9-1连接有功率半导体芯片1，背面电极7-2与金属底座3 通过软钎焊料9-2连接。金属底座3的周围通过粘结剂与绝缘壳体5相连，在绝缘壳体5内密封有硅胶6。
接着，对于实施例1参考图1进行说明。
图1中，实施例1的功率半导体模块300由功率半导体芯片1、绝缘基板 2、金属底座3、接合线4、绝缘壳体5、作为绝缘密封材料的硅胶6、助焊剂 11构成。在绝缘基板2的上方侧的一侧表面上通过表面硬钎焊料8-1连接有表面电极7-1，在绝缘基板2的下方侧的一侧表面(另一侧表面)上通过背面硬钎焊料8-2连接有背面电极7-2。在表面电极7-1上通过表面软钎焊料9-1连接有功率半导体芯片1，在背面电极7-2的与绝缘基板2侧相反侧的表面上通过软钎焊料9-2连接有金属底座3。
功率半导体芯片1与绝缘基板2的表面电极7-1通过接合线4相连，在金属底座3的周围通过粘结剂(未图示)与绝缘壳体5相连，在绝缘壳体5内密封有硅胶6。绝缘壳体5内至少容纳有绝缘基板2、表面电极7-1、背面电极 7-2、功率半导体芯片1及金属底座3。
金属底座3的上表面中，在绝缘基板搭载区域的外周形成有助焊剂11。此处，硬钎焊料8-2及软钎焊料9-2的电势同为GND电势(接地电势)。
将绝缘基板2与绝缘基板背面电极7-2进行连接的硬钎焊料8-2的端部 8-2e，相比于助焊剂11的背面软钎焊料9-2侧的端部11e(也是软钎焊料9-2 的端部)，向着绝缘基板2的侧面2e的方向(与绝缘基板2的表面(背面)平行的方向)突出。
也就是说，以硬钎焊料8-2的端部8-2e与绝缘基板2的侧面2e的下方延长线之间的距离为a，以助焊剂11的软钎焊料9-2侧的端部11e与绝缘基板2 的侧面的下方延长线之间的距离为b的情况下，处于a小于b(a＜b)的位置关系。
换言之，构成为如下关系：绝缘基板2、硬钎焊料8-2、背面电极7-2以及软钎焊料9-2，在图1的上下方向层叠，硬钎焊料8-2的端部8-2e的左右方向位置与绝缘基板2的端部(侧面2e)的左右方向位置之间的差a，小于软钎焊料9-2的端部11e的左右方向位置与绝缘基板2的端部(侧面2e)的左右方向位置之间的差b(背面硬钎焊料8-2的端部的左右方向位置与绝缘基板2的端部的左右方向位置之间的差a，小于作为软钎焊料流淌阻挡部的助焊剂11的相对背面软钎焊料7-2的左右方向端部的端部位置与绝缘基板2的端部的左右方向位置之间的差b)。
将绝缘基板2的背面电极7-2与金属底座3进行连接的软钎焊料9-2，向着绝缘基板2的侧面方向(图1的左方向)流淌，当到达形成有助焊剂11的位置处，软钎焊料9-2的流淌被抑制。相比于该助焊剂11的软钎焊料9-2侧的端部11e，硬钎焊料8-2的端部8-2e向着绝缘基板2的侧面方向突出，因此构成为，相对于软钎焊料9-2的端部而硬钎焊料8-2的端部8-2e向着绝缘基板 2的侧面方向突出。
由于软钎焊料9-2与绝缘基板2的上下方向之间为窄幅，在软钎焊料9-2 与绝缘基板2的上下方向之间的区域内就有可能形成空隙10。
在本发明中，构成为：空隙10的上下由同为GND电势的硬钎焊料8-2 与软钎焊料9-2所夹持。因此，对空隙10不施加电压。因此，即使在形成空隙10的情况下也能够抑制该处的电晕放电。
与实施例1不同，在助焊剂11的软钎焊料9-2侧的端部11e，相比于硬钎焊料8-2的绝缘基板2的侧面方向的端部8-2e，更向着绝缘基板2的侧面方向突出的情况下(a＞b)，不再介隔着硬钎焊料8-2，而在绝缘基板2与软钎焊料 9-2之间形成空隙，在该空隙可能发生电晕放电。
需要说明的是，图1所示的硬钎焊料8-2与助焊剂11之间的位置关系，可以在功率半导体模块300的制造工艺中进行调节。
如上所述，根据实施例1，可以构成为，软钎焊料9-2的端部位置由助焊剂11所限制，硬钎焊料8-2的绝缘基板2侧面一侧端部8-2e的位置，相比于软钎焊料9-2的绝缘基板2侧面一侧端部的位置，位于更靠近绝缘基板2的侧面一侧的位置。
因此，即使在硬钎焊料8-2与软钎焊料9-2之间产生空隙，由于硬钎焊料 8-2及软钎焊料9-2的电势同为接地电势，能够抑制电晕放电的发生。
也就是说，即使在绝缘基板下产生空隙的情况下，也能够抑制电晕放电的发生，能够实现提高了绝缘可靠性的功率半导体模块。
(实施例2)
接下来，对实施例2进行说明。
图2是实施例2的功率半导体模块400的要部说明图。
图2中，与实施例1的功率半导体模块300相比，实施例2的功率半导体模块400中，抑制用于将绝缘基板背面电极7-2与金属底座3进行连接的软钎焊料9-2的软钎焊料流淌的部分，不是实施例1的助焊剂11，而是金属氧化膜 12。其他结构实施例1与实施例2大致相同。
在金属底座3的上表面上，形成有金属氧化膜12，其包含绝缘基板2的侧面的延长线之外的外周区域。金属底座3的基材使用AlSiC或Cu，为了具有良好的软钎焊料润湿性，金属底座3的基材例如使用Ni等进行镀覆处理。镀覆材料例如进行激光照射等使其氧化从而形成金属氧化膜12。
如上所述，软钎焊料9-2将绝缘基板2的背面电极7-2与金属底座3进行连接。在功率半导体模块400制造时，该软钎焊料9-2会向着绝缘基板2的侧面方向流淌，当到达形成金属氧化膜12的位置处，其流淌被抑制。
硬钎焊料8-2的端部8-2e，相比于金属氧化膜12的软钎焊料9-2侧的端部12e，向着绝缘基板2的侧面方向(与绝缘基板2的表面(背面)相平行的方向)突出。
也就是说，与实施例1同样地，在以硬钎焊料8-2的端部8-2e与绝缘基板2的侧面的下方延长线之间的距离为a，以金属氧化膜12的软钎焊料9-2 侧的端部12e与绝缘基板2的侧面的下方延长线之间的距离为b的情况下，处于a小于b(a＜b)的位置关系。
在软钎焊料9-2与绝缘基板2的上下方向之间的区域有可能形成空隙10，但是，实施例2与实施例1同样地，空隙10的上下由同为GND电势的硬钎焊料8-2与软钎焊料9-2所夹持，因此在空隙10上不施加电压。因此，即使在形成空隙10的情况下，也能够抑制在该处的电晕放电。
如上所述，根据实施例2，能够获得与实施例1同样的效果，此外，由于金属氧化膜12是使用激光来形成的，还具有金属氧化膜12的位置精度较高的效果。
(实施例3)
接下来，对实施例3进行说明。
图3是实施例3的功率半导体模块500的要部的图。
图3中，与实施例1的功率半导体模块300相比较，实施例3的功率半导体模块500中，抑制将绝缘基板背面电极7-2与金属底座3进行连接的软钎焊料9-2的软钎焊料流淌的部分，不是实施例1的助焊剂11，而是镀覆未处理部 13。其他构成，实施例1与实施例3大致相同。
如上所述，金属底座3的基材使用AlSiC或Cu，为了获得良好的软钎焊料润湿性，金属底座3的基材，例如使用Ni等进行镀覆处理，但是在金属底座3的上表面中形成有镀覆未处理部13，其包含绝缘基板2的侧面的延长线之外的外周区域。该镀覆未处理部13，在对金属底座3的表面进行镀覆处理后，进行去除镀覆层的处理，形成镀覆未处理部13。
在功率半导体模块500制备时，软钎焊料9-2会向着绝缘基板2的侧面方向流淌，但由于镀覆未处理部13的软钎焊料润湿性差，由镀覆未处理部13 的端部13e抑制软钎焊料9-2的流淌。
硬钎焊料8-2的端部8-2e，相比于镀覆未处理部13的软钎焊料9-2侧的端部13e，向着绝缘基板2的侧面方向(与绝缘基板2的表面(背面)相平行的方向)突出。
也就是说，与实施例1同样地，在以硬钎焊料8-2的端部8-2e与绝缘基板2的侧面的下方延长线之间的距离为a，以镀覆未处理部13的软钎焊料9-2 侧的端部13e与绝缘基板2的侧面的下方延长线之间的距离为b的情况下，处于a小于b(a＜b)的位置关系。
虽然软钎焊料9-2与绝缘基板2的上下方向之间的区域内有可能形成空隙 10，但是，实施例3与实施例1同样地，在空隙10的上下由同为GND电势的硬钎焊料8-2与软钎焊料9-2所夹持，因此在空隙10上不施加电压。因此，即使在形成有空隙10的情况下，也能够抑制在该处的电晕放电。
如上所述，根据实施例3，能够获得与实施例1同样的效果。
(实施例4)
接下来，对实施例4进行说明。
图4是实施例4的功率半导体模块600的要部说明图。
图4中，相比于实施例1的功率半导体模块300，实施例4的功率半导体模块600中，抑制将绝缘基板背面电极7-2与金属底座3进行连接的软钎焊料 9-2的软钎焊料流淌的部分，不是助焊剂11，而是金属底座凹部14。其他构成，实施例1与实施例4大致相同。金属底座凹部14可以通过机械加工来形成。
在金属底座3上形成有金属底座凹部14，其包含绝缘基板2的侧面的延长线之外的外周区域。功率半导体模块600在制造时，软钎焊料9-2会向绝缘基板2的侧面方向流淌，但是通过金属底座凹部14来抑制软钎焊料流淌。
硬钎焊料8-2的端部8-2e，相比于金属底座凹部14的软钎焊料9-2侧的端部14e，向着绝缘基板2的侧面方向(与绝缘基板2的表面(背面)相平行的方向)突出。
也就是说，与实施例1同样地，在以硬钎焊料8-2的端部8-2e与绝缘基板2的侧面的下方延长线之间的距离为a，以金属底座凹部14的端部14e与绝缘基板2的侧面的下方延长线之间的距离为b的情况下，处于a小于b(a ＜b)的位置关系。
由于软钎焊料9-2与绝缘基板2之间为狭幅，在该区域有可能形成空隙10，但是，本实施例4与实施例1同样地，在空隙10的上下由均为GND电势的硬钎焊料8-2与软钎焊料9-2所夹持，因此在空隙10不施加电压。因此，即使在形成空隙10的情况下，也能够抑制在该处的电晕放电。
(实施例5)
接下来，对实施例5进行说明。
图5是实施例5的功率半导体模块的要部说明图。
图5中，实施例5的功率半导体模块700，与实施例1同样地，在金属底座3的上表面上形成有助焊剂11。在实施例5中，背面电极7-2的端部形成为锥形部15，其为相对于助焊剂11的端部11e而向着绝缘基板2的侧面方向延伸的锥形。
实施例5中硬钎焊料8-2的端部8-2e与助焊剂11的软钎焊料9-2侧的端部11e之间的位置关系，与实施例1同样地，为a小于b。
虽然软钎焊料9-2与绝缘基板2之间为窄幅，由于背面电极7-2的端部形成为锥形的锥形部15，绝缘树脂6变得易于填充，但可能会形成空隙10。但是，实施例5，在空隙10的上下由同为接地电势的背面电极7-2的锥形部15 与软钎焊料9-2所夹持，因此在空隙10不施加电压。
因此，即使在形成空隙10的情况下，也能够抑制在该空隙的电晕放电，实施例5能够获得与实施例1相同的效果。
需要说明的是，实施例5中的锥形部15也可以形成于实施例2～4中的背面电极7-2上。
(实施例6)
接下来，对于实施例6进行说明。
图6是实施例6的功率半导体模块800的要部说明图。
图6中，实施例6的功率半导体模块800中，在硬钎焊料8-2的端部还追加有导电膏16，导电膏16涂布在绝缘基板2的背面。另外，与实施例1同样助焊剂11形成在金属底座3上。并且，导电膏16的端部16e涂布为相比于助焊剂11的端部11e，位于绝缘基板2的侧面方向上。
也就是说，在以导电膏16的端部16e与绝缘基板2的侧面的下方延长线之间的距离为a，以助焊剂11的端部11e与绝缘基板2的侧面的下方延长线之间的距离为b的情况下，处于a小于b(a＜b)的位置关系。
由于软钎焊料9-2与导电膏16之间为窄幅，在该区域有形成空隙10的可能性，但是，与实施例1同样，由于在空隙10的上下由均为GND电势的导电膏16与软钎焊料9-2所夹持，因此在空隙10上不施加电压。
因此，即使在形成空隙10的情况下也能抑制在该处的电晕放电，实施例 6能够获得与实施例1同样的效果。
需要说明的是，实施例6中的导电膏16也能够适用于实施例2～4。
(实施例7)
接下来，对实施例7进行说明。
图7是实施例7的功率半导体模块900的要部说明图。
图7中，实施例7的功率半导体模块900，与实施例1的功率半导体模块300进行比较，构成为将绝缘基板2与绝缘基板表面电极7-1进行连接的硬钎焊料8-1的端部8-1e的位置，相对于将绝缘基板2与绝缘基板背面电极7-2进行连接的硬钎焊料8-2的端部8-2e的位置，向着绝缘基板2的侧面方向突出。其他结构，实施例1与实施例7大致相同。
以硬钎焊料8-1的端部8-1e与绝缘基板2的侧面的上方延长线之间的距离为c，则关系为c小于a，a小于b(c＜a＜b)。也就是说，表面硬钎焊料8-1 的端部8-1e的左右方向位置与绝缘基板2的端部2e的左右方向位置之间的差 c，小于背面硬钎焊料8-2的端部8-2e的左右方向位置与绝缘基板2的端部2e 的左右方向位置之间的差。
功率半导体模块900中，将绝缘基板2与绝缘基板表面电极7-1进行连接的硬钎焊料8-1的端部电场增加，容易产生以该部位作为介电击穿的起点的介电击穿。
该处的电场可以通过远离与GND之间的距离来降低。
实施例7中构成为，通过将硬钎焊料8-2(GND电势)的端部8-2e转移到绝缘基板2的中央侧(图7的左侧)，来增加从硬钎焊料8-1的端部8-1e开始所测的距离GND的距离，来使得该部位的电场得到缓和从而提高绝缘耐性。
硬钎焊料8-2与软钎焊料9-2之间的位置关系，与实施例1同样，硬钎焊料8-2的端部8-2e相比于助焊剂11的端部11e，向着绝缘基板2的侧面方向突出，因此即使在软钎焊料9-2与绝缘基板2之间产生空隙10的情况下也能够抑制该处的电晕放电。
根据实施例7的结构，能够实现介电强度得到提高且能够抑制绝缘基板下方空隙处的电晕放电的功率半导体模块900。
(与本发明不同的例)
图9是显示未适用本发明的情况下的功率半导体模块200的构成例的图，是用于与本发明进行比较的图。
图9中，将绝缘基板2的背面电极7-2与金属底座3进行连接的软钎焊料 9-2，向着绝缘基板2的侧面方向润湿蔓延。绝缘基板2与金属底座3之间的距离变为500μm左右的窄幅，绝缘基板2与软钎焊料9-2之间变得更加窄幅。
因此，绝缘基板2与软钎焊料9-2，在两者的端部付近，构成为彼此相对，在绝缘基板2与软钎焊料9-2之间未填充有作为绝缘树脂的硅胶6，从而产生空隙10。由于软钎焊料9-2的电势为接地电势，绝缘基板2不是接地基板，因此在该空隙10产生电晕放电。
相对于此，实施例1～7，如上所述，即使硬钎焊料8-2与软钎焊料9-2之间产生空隙10，由于硬钎焊料8-2与软钎焊料9-2都为接地电势，因此能够抑制在空隙10的电晕放电的发生。
需要说明的是，助焊剂11、金属氧化膜12、镀覆未处理部13以及金属底座凹部14，可以统称为软钎焊料流淌阻挡部。

Claims (6)

1.一种功率半导体模块，其特征在于，包括：
绝缘基板，
表面电极及背面电极，所述表面电极及背面电极分别介隔着表面硬钎焊料及背面硬钎焊料固定在所述绝缘基板的表面及背面，
功率半导体芯片，所述功率半导体芯片介隔着表面软钎焊料与所述表面电极相连，
背面软钎焊料，所述背面软钎焊料形成在所述背面电极的与所述绝缘基板侧的相反侧的面上，
金属底座，所述金属底座上配置有所述背面软钎焊料，介隔着所述背面软钎焊料固定有所述背面电极，
软钎焊料流淌阻挡部，所述软钎焊料流淌阻挡部形成于所述金属底座的配置有所述背面软钎焊料的表面，
绝缘壳体，所述绝缘壳体内容纳有所述绝缘基板、所述表面电极、所述背面电极、所述功率半导体芯片及所述金属底座，以及
绝缘树脂，所述绝缘树脂填充在所述绝缘壳体内；
其中，所述绝缘基板、所述表面软钎焊料、所述表面电极、所述背面硬钎焊料、所述背面电极以及所述背面软钎焊料在上下方向上层叠，所述背面硬钎焊料的端部的左右方向位置与所述绝缘基板的端部的左右方向位置之间的差，小于所述软钎焊料流淌阻挡部的对着所述背面软钎焊料左右方向端部的端部位置与所述绝缘基板的端部的左右方向位置之间的差。
2.根据权利要求1所述的功率半导体模块，其特征在于，所述软钎焊料流淌阻挡部是助焊剂。
3.根据权利要求1所述的功率半导体模块，其特征在于，所述软钎焊料流淌阻挡部是金属氧化膜。
4.根据权利要求1所述的功率半导体模块，其特征在于，所述软钎焊料流淌阻挡部是镀覆未处理部。
5.根据权利要求1所述的功率半导体模块，其特征在于，所述软钎焊料流淌阻挡部是金属底座凹部。
6.根据权利要求1至5中任一项所述的功率半导体模块，其特征在于，所述表面硬钎焊料的端部的左右方向位置与所述绝缘基板的端部的左右方向位置之间的差，小于所述背面硬钎焊料的端部的左右方向位置与所述绝缘基板的端部的左右方向位置之间的差。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716578A (zh) * 2004-06-14 2006-01-04 三菱电机株式会社 半导体装置及其制造方法
WO2008032365A1 (fr) * 2006-09-12 2008-03-20 Fujitsu Limited Dispositif électronique et procédé pour la fabrication de celui-ci
CN101379344A (zh) * 2006-01-31 2009-03-04 3M创新有限公司 具有适形箔结构的led照明组件
CN103137576A (zh) * 2011-11-30 2013-06-05 株式会社日立制作所 功率半导体装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3849381B2 (ja) * 1999-12-20 2006-11-22 株式会社日立製作所 絶縁回路基板の製造方法
JP4345066B2 (ja) 2005-05-24 2009-10-14 日立金属株式会社 セラミックス回路基板及びこれを用いたパワー半導体モジュール
JP5145729B2 (ja) * 2007-02-26 2013-02-20 富士電機株式会社 半田接合方法およびそれを用いた半導体装置の製造方法
JP5117270B2 (ja) * 2008-04-25 2013-01-16 シャープ株式会社 配線基板、半導体装置、ならびに半導体装置の製造方法
EP2337070A1 (en) * 2009-12-17 2011-06-22 ABB Technology AG Electronic device with non-linear resistive field grading and method for its manufacturing
WO2013002407A1 (ja) * 2011-06-30 2013-01-03 日立金属株式会社 ろう材、ろう材ペースト、セラミックス回路基板、セラミックスマスター回路基板及びパワー半導体モジュール
JP5665786B2 (ja) 2012-03-26 2015-02-04 三菱電機株式会社 半導体装置
JP6094413B2 (ja) * 2013-07-18 2017-03-15 三菱電機株式会社 半導体モジュール及びその製造方法
JP6500567B2 (ja) * 2015-04-01 2019-04-17 富士電機株式会社 半導体装置
JP2017135144A (ja) * 2016-01-25 2017-08-03 三菱電機株式会社 半導体モジュール
JP6724449B2 (ja) * 2016-03-18 2020-07-15 富士電機株式会社 半導体装置および半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716578A (zh) * 2004-06-14 2006-01-04 三菱电机株式会社 半导体装置及其制造方法
CN101379344A (zh) * 2006-01-31 2009-03-04 3M创新有限公司 具有适形箔结构的led照明组件
WO2008032365A1 (fr) * 2006-09-12 2008-03-20 Fujitsu Limited Dispositif électronique et procédé pour la fabrication de celui-ci
CN103137576A (zh) * 2011-11-30 2013-06-05 株式会社日立制作所 功率半导体装置

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