CN114008775A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
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- CN114008775A CN114008775A CN202080045792.8A CN202080045792A CN114008775A CN 114008775 A CN114008775 A CN 114008775A CN 202080045792 A CN202080045792 A CN 202080045792A CN 114008775 A CN114008775 A CN 114008775A
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- insulating layer
- conductor
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- bonding
- semiconductor
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Abstract
本发明的半导体装置(100)包括:半导体元件(10),其具有具备开口部(15a)的第一绝缘层(15)以及从第一绝缘层(15)的开口部(15a)露出的源极电极(12);中继导体(21),其与源极电极(12)相接合;接合层(41),其将源极电极(12)与中继导体(21)相接合;第二绝缘层(31),其覆盖第一绝缘层(15a)的至少一部分,至少与接合层(41)的周围相接地进行设置;表面侧导体(22),其与中继导体(21)相连接;以及密封树脂(32),其填充在表面侧导体(22)与第二绝缘层(31)之间。由此,提供如下半导体装置:即使存在孔隙,局部放电的产生也得到抑制。
Description
技术领域
本发明涉及半导体装置及其制造方法。
背景技术
作为具有驱动电动机等的功率转换部的功率半导体装置,具有如下构造:利用一对金属板夹住功率半导体元件,在金属板间填充树脂来密封半导体元件。更详细而言,将金属块接合到半导体元件的一个电极,将该金属块连接到一个金属板,并将半导体元件的另一个电极连接到另一个金属板。各金属板的面积形成得比半导体元件的表面和背面的面积要大,在该一对金属板间利用传递模塑法等模塑法填充树脂来密封半导体元件(例如,参照专利文献1)。
现有技术文献
专利文献
专利文献1:日本专利特开2011-114176号公报
发明内容
发明所要解决的技术问题
利用模塑法形成的密封树脂容易产生孔隙(空隙)等缺陷部。功率半导体装置中,对功率半导体元件施加高电压,因此,如果密封树脂存在孔隙等缺陷部,则电场在该缺陷部集中,有可能产生局部放电。若产生局部放电的状态持续,则密封树脂有可能劣化,最终发生绝缘破坏而导致功率半导体装置发生故障。
解决技术问题所采用的技术方案
根据本发明的第一方式,半导体装置包括:半导体元件,该半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;中继导体,该中继导体与所述表面电极相接合;接合层,该接合层将所述表面电极与所述中继导体相接合;第二绝缘层,该第二绝缘层覆盖所述第一绝缘层的至少一部分,至少与所述接合层的周围相接地进行设置;导体,该导体与所述中继导体相连接;以及密封树脂,该密封树脂填充在所述导体与所述第二绝缘层之间。
根据本发明的第二方式,半导体装置包括:多个半导体元件,该多个半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;中继导体,该中继导体与所述各半导体元件的所述表面电极相接合;接合层,该接合层将所述各表面电极与所述各中继导体相接合;第二绝缘层,该第二绝缘层覆盖所述各第一绝缘层的至少一部分,至少与所述各接合层的周围相接地进行设置;以及导体,该导体连接所述各中继导体。
根据本发明的第三方式,半导体装置的制造方法包含:准备半导体元件,该半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;利用接合层将所述表面电极与中继导体相接合;设置第二绝缘层,该第二绝缘层覆盖所述第一绝缘层的至少一部分,至少与所述接合层的周围相接;将导体与所述中继导体相连接;以及在所述导体与所述第二绝缘层之间填充密封树脂。
发明效果
根据本发明,即使存在孔隙,也能抑制局部放电的产生。
附图说明
图1是本发明的半导体装置的实施方式1的剖视图。
图2的(A)、(B)是用于说明图1所图示的半导体装置100的制造方法的各工序中的半导体装置的剖视图。
图3的(A)、(B)是图2之后的各工序中的半导体装置的剖视图。
图4是本发明的半导体装置的实施方式2的剖视图。
图5是用于说明对存在于密封树脂的孔隙施加高电场并产生局部放电的作用的剖视图,(A)是比较例的半导体装置100R的剖视图,(B)是本实施方式的半导体装置的剖视图。
图6是本发明的半导体装置的实施方式3的分解立体图。
图7是图6所图示的半导体装置的放大分解立体图。
图8是图6所图示的半导体装置的剖视图,(A)是树脂密封前的剖视图,(B)是树脂密封后的剖视图。
具体实施方式
下面,参照附图,对本发明的实施方式进行说明。以下记载和附图是用于说明本发明的例示,为了清楚说明,适当地进行了省略和简化。本发明能够利用其他各种方式来实施。除非特别限定,各结构要素可以是单个,也可以是多个。
为了容易理解发明,附图中所示的各结构要素的位置、大小、形状、范围等有时并不表示实际的位置、大小、形状、范围等。因此,本发明不一定限于附图中所公开的位置、大小、形状、范围等。
-实施方式1-
以下,参照图1至图3,对本发明的实施方式1进行说明。
图1是本发明的半导体装置的实施方式1的剖视图。
半导体装置100包括半导体元件10。半导体元件10例如是SiC(碳化硅)MOS FET(Metal-Oxide-Semiconductor Field effecttransistor:金属氧化物半导体场效应晶体管)。半导体元件10具有半导体基板11、源极电极12、漏极电极13、内部布线14和第一绝缘层15。另外,图1中虽未图示,但半导体元件10具有栅极电极17(参照图7)。半导体装置100具有半导体元件10、中继导体21、表面侧导体22、背面侧导体23、第二绝缘层31和密封树脂32。
第一绝缘层15是为了保护形成在半导体基板11内部的半导体元件形成用的杂质区域和内部布线14而设置的绝缘膜,由氧化硅或氮化硅等无机材料所形成。第一绝缘层15设有开口部15a(也参照图2的(B))。源极电极12形成得比第一绝缘层15的开口部15a稍大,源极电极12的周缘部的内侧从第一绝缘层15的开口部15a露出。第一绝缘层15例如由聚酰亚胺或聚苯并恶唑等树脂所形成。第一绝缘层15由半导体元件制造商形成,其厚度一般为数μm左右。
中继导体21具有比第一绝缘层15的开口部15a稍小的面积,通过接合层41,与源极电极12的从第一绝缘层15的开口部15a露出的部分的整个表面相接合。接合层41具有与中继导体21大致相同的面积。因此,在接合层41的周缘部与第一绝缘层15的开口部15a的周缘部之间形成有间隙G(参照图2的(B))。中继导体21可以由铜类金属形成。此外,中继导体21可以使用CIC(Copper Invar Copper:铜-殷瓦-铜)等覆盖材料来形成。殷瓦(注册商标)是铁和镍的合金,是低热膨胀率的材料,因此,通过用包含殷瓦的材料来形成中继导体21,从而即使在驱动时半导体元件10成为高温,也能抑制与密封树脂32的剥离。
第二绝缘层31形成在第一绝缘层15上。第二绝缘层31并未形成在第一绝缘层15的整个表面,第一绝缘层15的周缘部侧从第二绝缘层31露出。第二绝缘层31也填充到接合层41的周缘部与第一绝缘层15的开口部15a的周缘部之间的间隙G内,并与接合层41的周缘部和中继导体21的接合层41侧附近区域的周缘部相接。第二绝缘层31如后述那样,由使用了灌封法或印刷法等的涂布所形成。第二绝缘层31例如是由聚酰胺酰亚胺、聚酰亚胺、聚醚酰胺酰亚胺、聚醚酰胺等树脂形成。第一绝缘层15与第二绝缘层31可以由相同的树脂形成。第二绝缘层31为数十μm左右,优选为比第一绝缘层15的厚度要厚。
表面侧导体22具有比半导体元件10的表面面积、即第一绝缘层15的俯视下的面积要大的面积。表面侧导体22通过接合层42与中继导体21相接合。接合层42具有与中继导体21大致相同的面积。表面侧导体22可以由铜类金属或铝类金属所形成。
背面侧导体23通过接合层43与漏极电极13相接合,该漏极电极13设置在与半导体基板11的源极电极12相对的背面侧。背面侧导体23具有与表面侧导体22相同的面积。密封树脂32填充在表面侧导体22与背面侧导体23之间。即,半导体元件10的周侧面、第二绝缘层31、中继导体21的周侧面被密封树脂32所密封。背面侧导体23可以由铜类金属或铝类金属所形成。
作为接合层41~43,可以使用焊料、烧结金属材料。
作为密封树脂32,可以使用环氧树脂等。基于密封树脂32的密封应用了传递模塑法等模塑法等,但也可以使用灌封法、丝印、密封印刷、喷墨印刷、热转印印刷等印刷法。
接着,对上述实施方式的半导体装置100中的伴随着孔隙的存在的密封树脂的劣化抑制作用进行说明。
图5是用于说明对存在于密封树脂的孔隙施加高电场并产生局部放电的作用的剖视图。图5的(A)是示出比较例的半导体装置100R的密封树脂中产生的孔隙的剖视图,图5的(B)是示出本实施方式的半导体装置100的密封树脂中产生的孔隙的剖视图。
图5的(A)所图示的比较例的半导体装置100R不具有本实施方式的半导体装置100的中继导体21。
半导体装置100R中,表面侧导体22R具有与源极电极12的从第一绝缘层15的开口部15a露出的部分相对的突出部25。突出部25与表面侧导体22R一体成形。即,在通过接合层41将突出部25与源极电极12接合后,第一绝缘层15的开口部15a的内周缘部与接合层41之间的间隙G的周边区域经由密封树脂32被表面侧导体22R所覆盖。
因此,在表面侧导体22R与背面侧导体23之间填充密封树脂32前,在第一绝缘层15上涂布第二绝缘层31R的情况下,表面侧导体22R成为障碍,难以将第二绝缘层31R形成为与接合层41的周缘部、突出部25的周缘部相接。即,第一绝缘层15的开口部15a的内周缘部与接合层41之间的间隙G成为既不被第一绝缘层15所覆盖、也不被第二绝缘层31R所覆盖的状态。
另外,图5的(A)中,在将表面侧导体22R接合到源极电极12前填充第2绝缘层31R的情况下,需要使得接合源极电极12的表面侧导体22R的区域(表面侧导体接合区域中,第2绝缘层31R)不侵入的工序。此外,该工序中,需要在源极电极12的表面侧导体结合区域与第1绝缘层15的开口15a的内周缘部之间设置微小的间隙G,该微小的间隙G无法被绝缘材料充分填充,不能避免因孔隙AV的高电场而导致的密封树脂劣化。
MOS FET等中,在源极电极12周边部产生高电场。特别地,在SiC MOS FET中,产生Si MOS FET的10倍左右的绝缘破坏电场强度的高电场。如果在源极电极12周边的密封树脂32中存在孔隙AV,则高电场集中于孔隙AV,有可能发生局部放电。若产生局部放电的状态持续,则密封树脂32发生劣化,最终产生绝缘破坏而导致半导体元件10发生故障。
特别地,在突出部25与源极电极12相接合的狭窄空间中,基于模塑法的密封树脂难以进行填充,产生孔隙AV的概率较高。
本实施方式的半导体装置100如图5的(B)所图示的那样,具有设置在源极电极12与表面侧电极22之间的中继导体21。因此,在利用接合层41将中继导体21接合到源极电极12的状态下,在将表面侧导体22接合到中继导体21前,能够将第二绝缘层31填充到第一绝缘层15的周缘部与接合层41之间的间隙G内。如果在利用第二绝缘层31覆盖了第一绝缘层15的周缘部与接合层41之间的间隙G的状态下在密封树脂32中存在孔隙AV,则源极电极12周边部所产生的高电场被分压为施加到孔隙AV的电压以及施加到第二绝缘层31的电压。
施加到作为空气层的孔隙AV的电压与第二绝缘层31相对于空气层的介电常数的相对介电常数、以及孔隙AV的厚度和第二绝缘层31的厚度之比相关联。如果第二绝缘层31的厚度变大、孔隙AV的厚度变小,则集中于孔隙AV的电压变小。因此,通过将第二绝缘层31的厚度设为规定的厚度以上,从而能使施加于孔隙AV的电压比局部放电开始电压要小。因此,如果将第二绝缘层31设为规定的厚度以上,则在之后利用接合层42将表面侧导体22与中继导体21相接合、并在表面侧导体22与背面侧导体23之间填充了密封树脂32的情况下,即使密封树脂32产生孔隙AV,也能抑制局部放电的产生。
接着,对半导体装置100的制造方法进行说明。
图2的(A)、图2的(B)是用于说明图1所图示的半导体装置100的制造方法的各工序中的半导体装置的剖视图,图3的(A)、图3的(B)是图2之后的各工序中的半导体装置的剖视图。
首先,准备半导体元件10。如上所述,半导体元件10具有半导体基板11、源极电极12、漏极电极13、内部布线14和第一绝缘层15。
然后,如图2的(A)所图示的那样,利用接合层43将半导体元件10的漏极电极13与背面侧导体23相接合。作为接合层43,如上述那样,可以使用焊料或烧结金属材料。烧结金属材料具有粉末或糊状,通过加热成为烧结金属。作为烧结金属材料,优选使用包含铜、银的烧结金属接合糊料。使接合层介于半导体元件10的漏极电极13与背面侧导体23之间,并通过热压接来接合。
接着,如图2的(B)所图示的那样,利用接合层41将半导体元件10的源极电极12与中继导体21相接合。作为接合层41,使用与接合层43相同的材料。
使接合层41介于半导体元件10的源极电极12与中继导体21之间,并通过热压接来接合。将半导体元件10的源极电极12与中继导体21接合的接合层41设置在半导体元件10的第一绝缘层15的开口部15a内。即,接合层41比半导体元件10的第一绝缘层15的开口部15a要小。因此,在第一绝缘层15的周缘部与接合层41之间形成间隙G。
图2的(A)的工序与图2的(B)的工序可以设为相反的步骤。此外,也可以在同一行程中进行。在同一工序中进行的情况下,使接合层43介于半导体元件10的漏极电极13与背面侧导体23之间,并使接合层41介于半导体元件10的源极电极12与中继导体21之间,在该状态下对全体进行热压接。
接着,如图3的(A)所图示的那样,在第一绝缘层15上涂布第二绝缘层31。第二绝缘层31被填充到接合层41的周缘部与第一绝缘层15的开口部15a的周缘部之间的间隙G(参照图2的(B))内,以使得与接合层41的周缘部相接。第二绝缘层31设置为与中继导体21的下端部侧、换言之与接合层41侧的周缘部相接。第二绝缘层31的形成可以使用利用了分配器的灌封法、或使用印刷法。作为印刷法,可以应用丝印、密封印刷、喷墨印刷、热转印印刷等。
接着,如图3的(B)所图示的那样,利用接合层42将表面侧导体22与中继导体21相接合。作为接合层42,使用与接合层41、43相同的材料。使接合层42介于中继导体21与表面侧导体22之间,并利用热压接来进行接合。
之后,在表面侧导体22与背面侧导体23之间填充密封树脂32。由此,形成半导体元件10的周侧面、第二绝缘层31、中继导体21的周侧面被密封树脂32所密封的图1所图示的半导体装置100。密封树脂32的形成如上述那样,应用了传递模塑法,但也可以使用灌封法、印刷法。
根据上述实施方式1,发挥以下效果。
(1)半导体装置100包括:半导体元件10,该半导体元件10具有具备开口部15a的第一绝缘层15以及从第一绝缘层15的开口部15a露出的源极电极(表面电极)12;中继导体21,该中继导体21与源极电极12相接合;接合层41,该接合层41将源极电极12与中继导体21相接合;第二绝缘层31,该第二绝缘层31覆盖第一绝缘层15的至少一部分,至少与接合层41的周围相接地进行设置;表面侧导体(导体)22,该表面侧导体22与中继导体21相连接;以及密封树脂32,该密封树脂32填充在表面侧导体22与第二绝缘层31之间。由此,从第一绝缘层15的开口部15a露出的源极电极12被与接合层41的周围相接地设置的第二绝缘层31所覆盖。因此,即使密封树脂32存在孔隙AV,也能抑制局部放电的产生,能抑制密封树脂32的劣化。
-实施方式2-
图4是本发明的半导体装置的实施方式2的剖视图。
实施方式2的半导体装置100具有如下构造:第二绝缘层31a延伸到半导体元件10的外周侧面,并与背面侧导体23相接。
实施方式1中,第二绝缘层31仅形成在半导体元件10的表面侧,并未延伸为与背面侧导体23相接。该构造中,当利用接合层42将表面侧导体22与中继导体21接合时,接合层41因热压接时的加热而熔融,有可能引起中继导体21的位置偏移。实施方式2中,第二绝缘层31a延伸到与背面侧导体23相接的位置。第二绝缘层31a与中继导体21相接,因此,即使接合层41因热压接时的加热而熔融,中继导体21的移动也被与背面侧导体23相接的第二绝缘层31a所限制。
实施方式2的其它结构与实施方式1相同,对于对应的结构标注相同的标号并省略说明。
在实施方式2中也能起到与实施方式1同样的效果。
此外,根据实施方式2,能抑制将表面侧导体22接合到中继导体21时的中继导体21的位置偏移。
-实施方式3-
参照图6至图8,对本发明的实施方式3进行说明。
图6是本发明的半导体装置的实施方式3的分解立体图。
半导体装置200包括4个半导体装置300、外侧表面侧导体222和外侧背面侧导体223。4个半导体装置300相互隔开,在左右方向上排列成2行、在上下方向上排列成2列而成为矩阵状。外侧表面侧导体222和外侧背面侧导体223分别具有覆盖排列成矩阵状的4个半导体装置300的所有区域的大小。4个半导体装置300均具有相同的构造。
2个半导体装置300分别具有上臂电路,剩下的2个半导体装置300分别具有下臂电路。此外,具有上臂电路的半导体装置300和具有下臂电路的半导体装置300串联连接,构成上下臂串联电路。可以构成从上臂电路和下臂电路的连接部得到相位不同的交流输出的功率转换装置。
图7是图6所图示的半导体装置的放大分解立体图,图8是图6所图示的半导体装置的剖视图,图8的(A)是树脂密封前的剖视图,图8的(B)是树脂密封后的剖视图。
半导体装置300包括4个半导体元件10、表面侧导体122和背面侧导体123。4个半导体元件10相互隔开,在左右方向上排列成2行、在上下方向上排列成2列而成为矩阵状。即,半导体装置300构成为4in1封装。表面侧导体122和背面侧导体123分别具有覆盖排列成矩阵状的4个半导体元件10的所有区域的大小。
4个半导体元件10均具有与实施方式1的半导体元件相同的构造。即,如图8所图示的那样,半导体元件10具有半导体基板11、源极电极12、漏极电极13、内部布线14和第一绝缘层15。如图8所图示的那样,中继导体21经由接合层41与各半导体元件10的源极电极12相接合。此外,各半导体元件10的第一绝缘层15上形成有与接合层41的周缘部和中继导体21的接合层41侧附近区域周缘部相接的第二绝缘层31。
如图7所图示的那样,表面侧导体122具有覆盖4个半导体元件10的矩形形状的主体、从该矩形形状的主体的4个角部分别延伸的脚部的前端、以及向着背面侧导体123侧突出的感测连接部131。感测连接部131具有方形柱状,与接合线相比具有更大的截面积。感测连接部131具有较大的截面积的理由在于为了确保能够承受作用于表面侧导体122和背面侧导体123的负荷的强度,并且为了使电感变小。
背面侧导体123是与实施方式1的背面侧导体23对应的构件,但在实施方式3中,具有经由接合层43接合4个半导体元件10的尺寸。在背面侧导体123中,在除去接合4个半导体元件10的区域的所有表面设有绝缘层151。绝缘层151可以使用树脂、陶瓷。
在形成在背面侧导体123上的绝缘层151上设有栅极布线152和感测布线153。栅极布线152和感测布线153连接到未图示的控制部。
未图示的控制部以与经由感测布线153的半导体元件10的源极电极12之间的连接作为接地、即作为基准电位,经由栅极布线152向半导体元件10的源极电极12施加电压。作为使感测连接部131的截面积变大的理由,举出了使电感变小,但准确而言,是为了减少与经由感测布线153的半导体元件10的源极电极12之间的连接中的电感。
参照图7,栅极布线152在设置在背面侧导体123上的绝缘层151上,在左右分离的两对半导体元件10之间、换言之在背面侧导体123的左边与右边的中央沿着背面侧导体123的上下方向延伸地形成。各半导体元件10的栅极电极17通过接合线161连接到栅极布线152。感测布线153与栅极布线152隔开微小的间隙并包围栅极布线152的外侧而形成。感测布线153具有沿背面侧导体123的上下方向延伸的部分、以及沿背面侧导体123的上边侧的侧面和下边侧的侧面延伸到背面侧导体123的角部附近的部分。
感测布线153在各角部附近具有接合表面侧导体122的感测连接部131的下端面的感测接触区域153a。感测接触区域153a是感测布线153的一部分,实际上并不是表示区域的分隔线,但在图7中,为了易于理解,用矩形形状的实线来图示感测接触区域153a。表面侧导体122通过接合层42(参照图8的(a)、(b))与各半导体元件10的源极电极12相接合。因此,感测布线153经由表面侧导体122连接到各半导体元件10的源极电极12。
若使4个半导体元件10接近地配置,则从各半导体元件10释放的热集中在狭窄的区域中,背面侧导体123成为高温。因此,如图7所示,使4个半导体元件10隔开规定宽度以上来配置,以使得热不集中。然而,如果使半导体元件10隔开规定宽度以上来配置,则背面侧导体123、换言之半导体装置300的面积变大。因此,通过将栅极布线152与感测布线153绕回隔开半导体元件10的中央的空间,从而可实现空间的有效利用,并可实现背面侧导体123的面积的缩小化。
如图7和图8所图示的那样,接合表面侧导体122的感测连接部131的下端面的感测接触区域153a配置在排列有4个半导体元件10的矩形的外周区域的外侧。因此,能使与经由感测布线153的半导体元件10的源极电极12之间的连接中的电感变小。
构成图6所图示的半导体装置200的4个半导体装置300如图8的(a)所图示的那样,配置在外侧表面侧导体222与外侧背面侧导体223之间。
各半导体装置300的表面侧导体122通过接合层44与外侧表面侧导体222相接合。各半导体装置300的背面侧导体123通过接合层45与外侧背面侧导体223相接合。接合层44、45可以使用与接合层41~43相同的材料来形成。
图8的(a)所图示的状态是构成半导体装置200的4个半导体装置300未填充有密封树脂32的状态。即,各半导体元件10和第二绝缘层31等未被密封树脂32所密封。然而,各半导体元件10的第一绝缘层15上形成有与接合层41的周缘部和中继导体21的接合层41侧附近区域周缘部相接的第二绝缘层31。因此,该状态下,能进行对源极电极12施加高电场的高电场施加试验。通过对源极电极12施加高电场,来检测是否产生局部放电、半导体元件10是否损伤、特性是否发生劣化,从而能去除不良品或进行修理。由此,与在树脂密封后进行检查相比,能提高生产性。
在高电场施加试验后,在外侧表面侧导体222与外侧背面侧导体223之间填充密封树脂32,并用密封树脂32密封各半导体元件10的周侧面、第二绝缘层31、中继导体21的周侧面。由此,能形成图8的(b)所图示的半导体装置200。
高电场施加试验可以在图8的(b)的状态下进行,可以在图8的(a)的状态下进行,也可以再次在图8的(b)的状态下进行。
实施方式3中,例示出如下构造:感测布线153与源极电极12通过一体设置于表面侧导体122的感测连接部131相连接。然而,感测布线153与源极电极12也可以通过接合线来连接。
实施方式3中,半导体装置300作为一体化有4个臂电路的4in1封装来例示。然而,半导体装置300是一体化有多个臂电路的封装即可,能广泛应用于N(N≥2)in1封装。
另外,上述各实施方式中,将开关用元件设为MOS FET进行了例示。
但也可以使用IGBT(Insulated Gate Bipolar Transistor:绝缘栅双极型晶体管)等其它半导体元件来代替MOS FET。
上述各实施方式中,作为开关用元件,优选为SiC(碳化硅)MOS FET。然而,本发明中,除了碳化硅以外,也可以应用于以氮化镓、氧化稼、金刚石为母材的半导体元件。此外,本发明也能应用于通常的Si MOS FET。
另外,虽然在上述中说明了各种实施方式和变形例,但是本发明并不限定于这些内容。在本发明的技术构思的范围内考虑到的其他方式也包括在本发明的范围内。
标号说明
10 半导体元件
12 源极电极(表面电极)
13 漏极电极(背面电极)
15 第一绝缘层
15a 开口部
21 中继导体
22 表面侧导体(导体)
23 背面侧导体(相对导体)
31、31a 第二绝缘层
32 密封树脂
41~45 接合层
100 半导体装置
122 表面侧导体(导体)
123 背面侧导体
200 半导体装置
222 外侧表面侧导体(外侧导体)
223 外侧背面侧导体
300 半导体装置
AV 孔隙
G 间隙。
Claims (14)
1.一种半导体装置,其特征在于,包括:
半导体元件,该半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;
中继导体,该中继导体与所述表面电极相接合;
接合层,该接合层将所述表面电极与所述中继导体相接合;
第二绝缘层,该第二绝缘层覆盖所述第一绝缘层的至少一部分,至少与所述接合层的周围相接地进行设置;
导体,该导体与所述中继导体相连接;以及
密封树脂,该密封树脂填充在所述导体与所述第二绝缘层之间。
2.如权利要求1所述的半导体装置,其特征在于,
在所述开口部的周缘部与所述接合层的周围之间设有间隙,
所述第二绝缘层填充到所述间隙内。
3.如权利要求1所述的半导体装置,其特征在于,
所述第二绝缘层与所述中继导体的至少所述接合层侧的周围相接。
4.如权利要求1所述的半导体装置,其特征在于,
还具备接合层,该接合层将所述导体与所述中继导体相接合。
5.如权利要求1所述的半导体装置,其特征在于,
所述导体具有覆盖所述半导体元件的所述第一绝缘层整体的面积,
所述密封树脂密封所述半导体元件的周围。
6.如权利要求1所述的半导体装置,其特征在于,
所述第二绝缘层设置得比所述第一绝缘层要厚。
7.如权利要求1所述的半导体装置,其特征在于,
所述中继导体包含逆变器。
8.如权利要求1所述的半导体装置,其特征在于,
所述接合层是金属接合糊料烧结而成的烧结金属。
9.如权利要求1所述的半导体装置,其特征在于,
所述半导体元件在所述表面电极的相对面侧具有背面电极,
还具有连接到所述背面电极的相对导体,
所述第二绝缘层与所述相对导体相接。
10.如权利要求1至9中任一项所述的半导体装置,其特征在于,
所述半导体元件以碳化硅、氮化镓、氧化稼、金刚石中的任一个为母材。
11.一种半导体装置,其特征在于,包括:
多个半导体元件,该多个半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;
中继导体,该中继导体与所述各半导体元件的所述表面电极相接合;
接合层,该接合层将所述各表面电极与所述各中继导体相接合;
第二绝缘层,该第二绝缘层覆盖所述各第一绝缘层的至少一部分,至少与所述各接合层的周围相接地进行设置;以及
导体,该导体连接所述各中继导体。
12.如权利要求11所述的半导体装置,其特征在于,
包括密封树脂,该密封树脂填充在所述导体与所述第二绝缘层之间。
13.一种半导体装置,其特征在于,
具有多个如权利要求11所述的半导体装置,
还具有连接所述各半导体装置的所述导体的外侧导体。
14.一种半导体装置的制造方法,其特征在于,包含:
准备半导体元件,该半导体元件具有具备开口部的第一绝缘层以及从所述第一绝缘层的所述开口部露出的表面电极;
利用接合层将所述表面电极与中继导体相接合;
设置第二绝缘层,该第二绝缘层覆盖所述第一绝缘层的至少一部分,至少与所述接合层的周围相接;
将导体与所述中继导体相连接;以及
在所述导体与所述第二绝缘层之间填充密封树脂。
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