CN109686393B - 闪存设备及其编程方法 - Google Patents
闪存设备及其编程方法 Download PDFInfo
- Publication number
- CN109686393B CN109686393B CN201811156414.8A CN201811156414A CN109686393B CN 109686393 B CN109686393 B CN 109686393B CN 201811156414 A CN201811156414 A CN 201811156414A CN 109686393 B CN109686393 B CN 109686393B
- Authority
- CN
- China
- Prior art keywords
- voltage
- word line
- line voltage
- level
- source line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 20
- 238000001514 detection method Methods 0.000 claims description 33
- 230000008859 change Effects 0.000 claims description 25
- 230000007423 decrease Effects 0.000 claims description 25
- 238000007667 floating Methods 0.000 claims description 25
- 239000000969 carrier Substances 0.000 claims description 13
- 230000004044 response Effects 0.000 claims description 8
- 230000008878 coupling Effects 0.000 description 32
- 238000010168 coupling process Methods 0.000 description 32
- 238000005859 coupling reaction Methods 0.000 description 32
- 239000004065 semiconductor Substances 0.000 description 14
- 238000010586 diagram Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 9
- 230000003247 decreasing effect Effects 0.000 description 8
- 101710146710 2,3-bisphosphoglycerate-independent phosphoglycerate mutase Proteins 0.000 description 7
- 101710171275 Probable 2,3-bisphosphoglycerate-independent phosphoglycerate mutase Proteins 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/02—Structural aspects of erasable programmable read-only memories
- G11C2216/04—Nonvolatile memory cell provided with a separate control gate for erasing the cells, i.e. erase gate, independent of the normal read control gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
- H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170135441A KR102375913B1 (ko) | 2017-10-18 | 2017-10-18 | 플래시 메모리 장치 및 이의 프로그램 방법 |
KR10-2017-0135441 | 2017-10-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109686393A CN109686393A (zh) | 2019-04-26 |
CN109686393B true CN109686393B (zh) | 2023-03-28 |
Family
ID=66096608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811156414.8A Active CN109686393B (zh) | 2017-10-18 | 2018-09-30 | 闪存设备及其编程方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10636491B2 (ko) |
KR (1) | KR102375913B1 (ko) |
CN (1) | CN109686393B (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20200127752A (ko) * | 2019-05-03 | 2020-11-11 | 에스케이하이닉스 주식회사 | 전자 장치 및 전자 장치의 동작 방법 |
CN110660442A (zh) * | 2019-05-23 | 2020-01-07 | 深圳市芯天下技术有限公司 | 一种nor flash的高温应用方法及系统 |
US11170839B2 (en) | 2019-07-17 | 2021-11-09 | Mentium Technologies Inc. | Programming non-volatile memory arrays with automatic programming pulse amplitude adjustment using current-limiting circuits |
WO2021011923A1 (en) * | 2019-07-17 | 2021-01-21 | Mentium Technologies Inc. | Flash memory arrays for computation having digital input and analog output |
CN111462804B (zh) * | 2020-03-27 | 2021-05-28 | 长江存储科技有限责任公司 | 存储器的编程方法及存储器的编程装置 |
CN111370036B (zh) * | 2020-06-01 | 2020-12-25 | 深圳市芯天下技术有限公司 | 一种闪存设备的编程方法 |
US11170849B1 (en) * | 2020-09-17 | 2021-11-09 | Nxp Usa, Inc. | Memory with select line voltage control |
US11404140B2 (en) * | 2021-01-04 | 2022-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and memory device with increased read and write margin |
TWI744199B (zh) * | 2021-03-03 | 2021-10-21 | 力晶積成電子製造股份有限公司 | 靜態隨機存取記憶體及其操作方法 |
KR20230057785A (ko) * | 2021-10-22 | 2023-05-02 | 삼성전자주식회사 | 비휘발성 메모리 장치 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104934068A (zh) * | 2015-07-07 | 2015-09-23 | 合肥恒烁半导体有限公司 | 一种nand型闪存存储器读取操作时的字线电压生成电路 |
CN104995687A (zh) * | 2013-03-14 | 2015-10-21 | 硅存储技术公司 | 低漏电流低阈值电压分离栅闪存单元操作 |
CN107230495A (zh) * | 2016-03-25 | 2017-10-03 | 瑞萨电子株式会社 | 半导体存储器装置 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6205074B1 (en) | 2000-02-29 | 2001-03-20 | Advanced Micro Devices, Inc. | Temperature-compensated bias generator |
KR100476888B1 (ko) | 2002-04-04 | 2005-03-17 | 삼성전자주식회사 | 온도보상기능을 가진 멀티비트 플래쉬메모리 |
CN101180683B (zh) | 2005-09-21 | 2010-05-26 | 株式会社瑞萨科技 | 半导体器件 |
KR100842996B1 (ko) | 2006-02-06 | 2008-07-01 | 주식회사 하이닉스반도체 | 온도에 따라 선택적으로 변경되는 워드 라인 전압을발생하는 워드 라인 전압 발생기와, 이를 포함하는 플래시메모리 장치 및 그 워드 라인 전압 발생 방법 |
US7269092B1 (en) * | 2006-04-21 | 2007-09-11 | Sandisk Corporation | Circuitry and device for generating and adjusting selected word line voltage |
US7391650B2 (en) * | 2006-06-16 | 2008-06-24 | Sandisk Corporation | Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates |
KR101504339B1 (ko) | 2008-11-03 | 2015-03-24 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것을 포함하는 메모리 시스템 |
US7764563B2 (en) | 2008-11-26 | 2010-07-27 | Micron Technology, Inc. | Adjustable voltage regulator for providing a regulated output voltage |
KR100996107B1 (ko) * | 2008-12-08 | 2010-11-22 | 주식회사 하이닉스반도체 | 온도 감지 장치 |
JP2011028827A (ja) | 2009-06-25 | 2011-02-10 | Toshiba Corp | 半導体記憶装置 |
US8917557B2 (en) * | 2011-12-15 | 2014-12-23 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
US8902669B2 (en) | 2012-11-08 | 2014-12-02 | SanDisk Technologies, Inc. | Flash memory with data retention bias |
US9202579B2 (en) | 2013-03-14 | 2015-12-01 | Sandisk Technologies Inc. | Compensation for temperature dependence of bit line resistance |
US9691464B2 (en) * | 2013-03-15 | 2017-06-27 | Avalanche Technology, Inc. | Fast programming of magnetic random access memory (MRAM) |
KR102139323B1 (ko) | 2014-02-03 | 2020-07-29 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
US9390798B2 (en) * | 2014-09-15 | 2016-07-12 | Rambus Inc. | 1T-1R architecture for resistive random access memory |
KR102355580B1 (ko) | 2015-03-02 | 2022-01-28 | 삼성전자주식회사 | 비휘발성 메모리 장치, 그것을 포함하는 저장 장치 및 그것의 동작 방법 |
-
2017
- 2017-10-18 KR KR1020170135441A patent/KR102375913B1/ko active IP Right Grant
-
2018
- 2018-06-08 US US16/003,848 patent/US10636491B2/en active Active
- 2018-09-30 CN CN201811156414.8A patent/CN109686393B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104995687A (zh) * | 2013-03-14 | 2015-10-21 | 硅存储技术公司 | 低漏电流低阈值电压分离栅闪存单元操作 |
CN104934068A (zh) * | 2015-07-07 | 2015-09-23 | 合肥恒烁半导体有限公司 | 一种nand型闪存存储器读取操作时的字线电压生成电路 |
CN107230495A (zh) * | 2016-03-25 | 2017-10-03 | 瑞萨电子株式会社 | 半导体存储器装置 |
Also Published As
Publication number | Publication date |
---|---|
KR102375913B1 (ko) | 2022-03-18 |
US10636491B2 (en) | 2020-04-28 |
KR20190043412A (ko) | 2019-04-26 |
CN109686393A (zh) | 2019-04-26 |
US20190115077A1 (en) | 2019-04-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109686393B (zh) | 闪存设备及其编程方法 | |
US11017859B2 (en) | Sequential write and sequential write verify in memory device | |
US7957215B2 (en) | Method and apparatus for generating temperature-compensated read and verify operations in flash memories | |
US20200066311A1 (en) | Sequential memory operation without deactivating access line signals | |
US8547746B2 (en) | Voltage generation and adjustment in a memory device | |
US20140022853A1 (en) | Memory device, memory system, and method of controlling read voltage of the memory device | |
US8693248B2 (en) | Nonvolatile data storage devices, program methods thereof, and memory systems including the same | |
JP3987715B2 (ja) | 不揮発性半導体メモリおよび不揮発性半導体メモリのプログラム電圧制御方法 | |
US7864614B2 (en) | Semiconductor memory device | |
US9543030B1 (en) | Sense amplifier design for ramp sensing | |
CN110910925A (zh) | 用于减少泄漏电流的存储器装置 | |
US9570188B2 (en) | Semiconductor device | |
US9892791B2 (en) | Fast scan to detect bit line discharge time | |
US7940117B2 (en) | Voltage generation circuit and flash memory device including the same | |
JP2007035179A (ja) | 不揮発性半導体記憶装置 | |
US20070047320A1 (en) | Nor flash memory devices in which a program verify operation is performed on selected memory cells and program verify methods associated therewith | |
US20070121392A1 (en) | Nonvolatile semiconductor memory device and its writing method | |
KR102307216B1 (ko) | 메모리를 프로그래밍하기 위한 방법 및 장치 | |
US10957395B2 (en) | Nonvolatile memory devices and operating methods thereof | |
US10515707B2 (en) | Temperature compensation for unselected memory cells and string select switches in NAND flash memory | |
US20240145021A1 (en) | Flash memory for performing margin read test operation and margin read test system including the same | |
CN115775573A (zh) | 半导体存储装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |