CN109616457B - 连接体 - Google Patents

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Publication number
CN109616457B
CN109616457B CN201811002555.4A CN201811002555A CN109616457B CN 109616457 B CN109616457 B CN 109616457B CN 201811002555 A CN201811002555 A CN 201811002555A CN 109616457 B CN109616457 B CN 109616457B
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conductive particles
electrode
electrode terminal
substrate
electronic device
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CN201811002555.4A
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CN109616457A (zh
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猿山贤一
阿久津恭志
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Dexerials Corp
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Dexerials Corp
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/38—Effects and problems related to the device integration
    • H01L2924/381—Pitch distance

Abstract

即便导电性粒子被咬入基板电极与电极端子的台阶部间，也充分地压入被夹持在基板电极及电极端子的各主面部的导电性粒子，从而确保导通性。经由各向异性导电粘接剂（1）而对电路基板（12）连接有电子部件（18），在电路基板（12）的基板电极（17a）及电子部件（18）的电极端子（19），形成有在各侧缘部互相对接的台阶部（27、28），基板电极（17a）及电极端子（19）在各主面部间及台阶部（27、28）间夹持导电性粒子（4），导电性粒子（4）和台阶部（27、28）满足（1）a＋b＋c≤0.8D[a：电极端子的台阶部高度，b：基板电极的台阶部高度，c：台阶部间间隙，D：导电性粒子的直径]。

Description

连接体
本申请是如下发明专利申请的分案申请：
发明名称：连接体；申请号：201580007053.9；申请日：2015年2月3日。
技术领域
本发明涉及连接电子部件和电路基板的连接体，特别涉及经由含有导电性粒子的粘接剂对电路基板连接电子部件的连接体。本申请以在日本于2014年2月3日申请的日本专利申请号特愿2014－018532为基础主张优先权，通过参照该申请，引用至本申请。
背景技术
一直以来，作为电视机、PC监视器、便携电话、智能手机、便携式游戏机、平板终端、可穿戴终端、或者车载用监视器等的各种显示单元，采用液晶显示装置或有机EL面板。近年来，在这样的显示装置中，出于微细间距化、轻薄型化等的观点，采用将驱动用IC直接安装于显示面板的玻璃基板上的所谓COG(chip on glass，玻璃上覆晶)。
例如采用COG安装方式的液晶显示面板中，如图7（A）（B）所示，在由玻璃基板等构成的透明基板101形成有多个由ITO（氧化铟锡）等构成的透明电极102，在这些透明电极102上连接有液晶驱动用IC103等的电子部件。液晶驱动用IC103在安装面对应于透明电极102形成有多个电极端子104，经由各向异性导电膜105热压接到透明基板101上，从而连接电极端子104与透明电极102。
各向异性导电膜105向粘合剂树脂中混入导电性粒子而制成膜状，在两个导体间通过加热压接而以导电性粒子取得导体间的电导通，以粘合剂树脂保持导体间的机械连接。作为构成各向异性导电膜105的粘接剂，通常，会使用可靠性高的热固化性的粘合剂树脂，但是也可以为光固化性的粘合剂树脂或光热并用型的粘合剂树脂。
经由这样的各向异性导电膜105将液晶驱动用IC103向透明电极102连接的情况下，首先，通过未图示的临时压接单元将各向异性导电膜105临时贴在透明基板101的透明电极102上。接着，经由各向异性导电膜105将液晶驱动用IC103搭载在透明基板101上，形成临时连接体后，通过热压接头106等的热压接单元将液晶驱动用IC103与各向异性导电膜105一起向透明电极102侧加热按压。通过利用该热压接头106进行的加热，各向异性导电膜105引起热固化反应，由此液晶驱动用IC103粘接到透明电极102上。
现有技术文献
专利文献
专利文献1：日本特许第4789738号公报
专利文献2：日本特开2004－214374号公报
专利文献3：日本特开2005－203758号公报。
发明内容
发明要解决的课题
随着近年来液晶显示装置和其他电子设备的小型化、高精密化，也进行电路基板的布线间距或电子部件的电极端子的微细间距化，在利用各向异性导电膜来将IC芯片等的电子部件COG连接在被微细间距化的电路基板上的情况下，为了在窄小化的电极端子与基板电极之间可靠地捕捉导电性粒子，并且防止在窄小化的电极端子间因导电性粒子相连而造成的端子间短路，使用高密度填充小径的导电性粒子的各向异性导电膜。
另外，为了防止物理损伤、短路等而在电路基板的基板表面形成有保护膜。而且，在基板表面形成的基板电极形成有因在侧缘部生成保护膜而造成的台阶部。另外，在IC芯片等的电子部件中，在金属制的电极端子的侧缘部形成有台阶部。由此，基板电极及电极端子在平坦的主面部的周围呈现台阶部隆起的形状。
当对电路基板上连接电子部件时，基板电极的台阶部和电极端子的台阶部对接而连接。此时，若导电性粒子存在于基板电极的台阶部与电极端子的台阶部之间，则由于在两台阶部间咬入导电性粒子，所以在基板电极及电极端子的各主面部间不能充分地压碎导电性粒子，有可能会损害导通性。另外，基板电极的台阶部通过保护膜而形成，因此导电性较低，通过被咬入两台阶部间的导电性粒子是不能确保导通性的。而且，若导电性粒子被小径化，则因为在基板电极及电极端子的各台阶部间咬入导电性粒子而造成导电性粒子的压入不足会变得更加显著。
另外，还提出对应于电路基板的金属线间距或电子部件的电极端子的微细间距化，使导电性粒子规则排列的各向异性导电膜，但是，通过使导电性粒子规则排列，虽然能在基板电极及电极端子的各主面部可靠地捕捉导电性粒子，相反，出现在各台阶部间中也容易发生导电性粒子的咬入的情况。
因此，本发明目的在于提供导电性粒子被咬入基板电极的台阶部与电极端子的台阶部之间的情况下，也能充分地压入夹持在基板电极及电极端子的各主面部的导电性粒子，从而确保导通性的电路基板和电子部件的连接体。
用于解决课题的方案
为了解决上述课题，本发明所涉及的连接体具备：电路基板；以及电子部件，经由各向异性导电粘接剂连接在上述电路基板上，在形成于上述电路基板的基板电极及形成于上述电子部件的电极端子，在各侧缘部形成有台阶部，上述基板电极及上述电极端子在各主面部间及形成在上述各侧缘部的台阶部间夹持在上述各向异性导电粘接剂中含有的导电性粒子，上述导电性粒子与上述基板电极及上述电极端子的各上述台阶部，满足以下的式（1）。
a＋b＋c≤0.8D （1）
[a：电极端子的台阶部高度，b：基板电极的台阶部高度，c：台阶部间间隙，D：导电性粒子的直径]
发明效果
依据本发明，能够使夹持在基板电极及电极端子的两主面部间的导电性粒子至少压缩到粒径的80％，并能够确保充分的导通性。
附图说明
图1是作为连接体的一个例子而示出的液晶显示面板的截面图。
图2是示出液晶驱动用IC和透明基板的连接工序的截面图。
图3是示出液晶驱动用IC的电极端子（凸块）及端子间空间的平面图。
图4是示出各向异性导电膜的截面图。
图5是示出导电性粒子以点阵状规则排列的各向异性导电膜的平面图。
图6是示出夹持导电性粒子的基板电极及电极端子的截面图。
图7是示出对液晶显示面板的透明基板连接IC芯片的工序的截面图，（A）示出连接前的工序，（B）示出连接工序。
具体实施方式
以下，参照附图，对适用本发明的连接体进行详细说明。此外，本发明并不仅限于以下的实施方式，显然在不脱离本发明的主旨的范围内能够进行各种变更。此外，附图是示意性的，各尺寸的比例等有不同于现实的情况。具体尺寸等应该参考以下的说明进行判断。此外，应当理解到附图相互之间也包含彼此尺寸的关系或比例不同的部分。
[液晶显示面板]
以下，作为适用本发明的连接体，以在玻璃基板安装液晶驱动用的IC芯片作为电子部件的液晶显示面板为例进行说明。该液晶显示面板10如图1所示，对置配置由玻璃基板等构成的两块透明基板11、12，并通过框状的密封材料13来互相粘合这些透明基板11、12。而且，液晶显示面板10通过向由透明基板11、12围绕的空间内封入液晶14而形成面板显示部15。
透明基板11、12以使由ITO（氧化铟锡）等构成的条纹状的一对透明电极16、17互相交叉的方式形成在互相对置的两内侧表面。而且，两透明电极16、17成为通过这两透明电极16、17的该交叉部位构成作为液晶显示的最小单位的像素。
两透明基板11、12之中，一个透明基板12形成为平面尺寸大于另一个透明基板11，在该形成为较大的透明基板12的边缘部12a，设有安装液晶驱动用IC18作为电子部件的COG安装部20。此外，在COG安装部20形成有透明电极17的端子部17a以及与设在液晶驱动用IC18的IC侧对准标记22重叠的基板侧对准标记21。
[端子部]
另外，如图2所示，透明基板12为了防止物理损伤、短路等，在基板表面形成由氮化膜或氧化硅膜等的无机膜或有机膜等构成的绝缘性的保护膜23。保护膜23通过公知的成膜手法，形成在除端子部17a、基板侧对准标记21之外的区域。由此，在与保护膜23邻接的端子部17a的侧缘部因保护膜23而形成台阶部28。因而，在截面图中，端子部17a的台阶部28在两侧缘部中隆起，主面部被平坦化。
液晶驱动用IC18通过对像素选择性地施加液晶驱动电压，使液晶的取向局部变化，以能进行既定液晶显示。另外，如图2所示，液晶驱动用IC18在对透明基板12的安装面18a形成有与透明电极17的端子部17a导通连接的多个电极端子19（凸块）。电极端子19适合使用例如铜凸块、金凸块、或者对铜凸块实施镀金的材料等。
[电极端子]
液晶驱动用IC18例如如图3所示，电极端子19（输入凸块）沿着安装面18a的一个侧缘排成一列，且电极端子19（输出凸块）沿着与一个侧缘对置的另一个侧缘以交错状排成多列。电极端子19和设在透明基板12的COG安装部20的端子部17a，分别以同数且同间距形成，并且通过使透明基板12和液晶驱动用IC18对位连接而连接。
此外，随着近年来液晶显示装置和其他电子设备的小型化、高功能化，对液晶驱动用IC18等的电子部件也要求小型化、低矮化，电极端子19的高度也变低（例如6～15μm）。
另外，如图2所示，电极端子19在两侧缘部形成有台阶部27。台阶部27在制造金属制的电极端子19时形成，因此在截面图中，电极端子19的两侧缘部隆起，主面部被平坦化。
液晶驱动用IC18通过对COG安装部20各向异性导电连接，使形成在电极端子19的两侧缘部的台阶部28与形成在端子部17a的两侧缘部的台阶部27对接。此时，端子部17a及电极端子19在两台阶部27、28间咬入导电性粒子4，隔着既定间隙而对置。此外，咬入两台阶部27、28间的导电性粒子4，因热压接头33而被液晶驱动用IC18按压，从而在两台阶部27、28间显著压碎或者破坏。
由此，端子部17a和电极端子19的各主面部，隔着对两台阶部27、28的高度加上夹持在两台阶部27、28间的导电性粒子4按压时（或破坏时）的直径的距离而对置。此外，台阶部27的高度是指端子部17a的主面部的法线方向上的主面部与台阶部27的顶部之间的距离，台阶部28的高度是指电极端子19的主面部的法线方向上的主面部与台阶部28的顶部之间的距离。
另外，液晶驱动用IC18在安装面18a形成有通过与基板侧对准标记21重叠而进行对透明基板12的对准的IC侧对准标记22。此外，由于进行透明基板12的透明电极17的布线间距或液晶驱动用IC18的电极端子19的微细间距化，所以要求液晶驱动用IC18和透明基板12高精度对准调整。
基板侧对准标记21及IC侧对准标记22能够使用通过组合能取得透明基板12和液晶驱动用IC18的对准的各种标记。
形成在COG安装部20的透明电极17的端子部17a上，利用各向异性导电膜1作为电路连接用粘接剂而连接液晶驱动用IC18。各向异性导电膜1含有导电性粒子4，用来经由导电性粒子4电连接液晶驱动用IC18的电极端子19和在透明基板12的边缘部12a形成的透明电极17的端子部17a。该各向异性导电膜1因被热压接头33热压接而粘合剂树脂流动，从而导电性粒子4在端子部17a与液晶驱动用IC18的电极端子19之间压碎，在该状态下粘合剂树脂固化。由此，各向异性导电膜1将透明基板12和液晶驱动用IC18电气、机械地连接。
另外，在两透明电极16、17上，形成有实施了既定摩擦处理的取向膜24，以通过该取向膜24规定液晶分子的初始取向。而且，在两透明基板11、12的外侧配置有一对偏振光板25、26，以通过这两偏振光板25、26规定来自背光灯等的光源（未图示）的透射光的振动方向。
[各向异性导电膜]
接着，对各向异性导电膜1进行说明。各向异性导电膜（ACF：AnisotropicConductive Film）1如图4所示，通常，在成为基体材料的剥离膜2上形成含有导电性粒子4的粘合剂树脂层（粘接剂层）3。各向异性导电膜1为热固化型或者紫外线等的光固化型粘接剂，粘着在液晶显示面板10的在透明基板12形成的透明电极17上并且搭载有液晶驱动用IC18，通过用热压接头33来热加压而流动，从而导电性粒子4在相对置的透明电极17的端子部17a与液晶驱动用IC18的电极端子19之间压碎，通过加热或者紫外线照射，在导电性粒子压碎的状态下固化。由此，各向异性导电膜1连接透明基板12与液晶驱动用IC18，从而能够使之导通。
另外，各向异性导电膜1具有含有膜形成树脂、热固化性树脂、潜伏性固化剂、硅烷偶联剂等的普通粘合剂树脂层3和导电性粒子4。如图4所示，各向异性导电膜1优选在粘合剂树脂层3中以既定图案规则排列导电性粒子4。
支撑粘合剂树脂层3的剥离膜2，例如，在PET（聚对苯二甲酸乙二醇酯：PolyEthylene Terephthalate）、OPP（定向聚丙烯：Oriented Polypropylene）、PMP（聚4－甲基戊烯－1：Poly－4－methylpentene－1）、PTFE（聚四氟乙烯：Polytetrafluoroethylene）等上涂敷硅酮等的剥离剂而成，不仅防止各向异性导电膜1的干燥，而且维持各向异性导电膜1的形状。
作为粘合剂树脂层3中含有的膜形成树脂，优选平均分子量为10000～80000左右的树脂。作为膜形成树脂，能举出环氧树脂、改性环氧树脂、尿烷树脂、苯氧基树脂等的各种树脂。其中，出于膜形成状态、连接可靠性等的观点特别优选苯氧基树脂。
作为热固化性树脂，无特别限定，能够举出例如市售的环氧树脂、丙烯树脂等。
作为环氧树脂，无特别限定，但是能举出例如萘型环氧树脂、联苯型环氧树脂、酚醛清漆型环氧树脂、双酚型环氧树脂、芪型环氧树脂、三酚甲烷型环氧树脂、酚醛芳烷基型环氧树脂、萘酚型环氧树脂、二聚环戊二烯型环氧树脂、三苯基甲烷型环氧树脂等。这些既可以单独也可以组合2种以上而使用。
作为丙烯树脂，无特别限制，能够根据目的适宜选择丙烯化合物、液态丙烯酸酯等。能够举出例如丙烯酸甲酯、丙烯酸乙酯、丙烯酸异丙酯、丙烯酸异丁酯、环氧丙烯酸酯、二丙烯酸乙二醇酯、二丙烯酸二乙二醇酯、三羟甲基丙烷三丙烯酸酯、二羟甲基三环葵烷二丙烯酸酯、1,4－丁二醇四丙烯酸酯、2－羟基－1,3－二丙烯酰氧基丙烷、2,2－双［4－(丙烯酰氧基甲氧基)苯基］丙烷、2,2－双［4－(丙烯酰氧基乙氧基)苯基］丙烷、二环戊烯基丙烯酸酯、三环葵基丙烯酸酯、树状(丙烯酰氧基乙基)异氰脲酸酯、尿烷丙烯酸酯、环氧丙烯酸酯等。此外，也能使用丙烯酸酯为甲基丙烯酸酯的材料。这些既可以单独使用1种，也可以并用2种以上。
作为潜伏性固化剂，无特别限定，但是能举出例如加热固化型、UV固化型等的各种固化剂。潜伏性固化剂通常不会反应，通过热、光、加压等的根据用途而选择的各种引发条件来激活，并开始反应。热活性型潜伏性固化剂的激活方法有：以利用加热的离解反应等生成活性种（阳离子、阴离子、自由基）的方法；在室温附近稳定地分散到环氧树脂中而在高温与环氧树脂相溶/熔化，并开始固化反应的方法；在高温熔出分子筛封入型的固化剂并开始固化反应的方法；利用微囊进行的熔出/固化方法等。作为热活性型潜伏性固化剂，有咪唑类、酰肼类、三氟化硼－胺络合物、锍盐、胺化酰亚胺、聚胺盐、双氰胺等或它们的改性物，这些既可以单独使用，也可为2种以上的混合体。其中，优选微囊型咪唑类潜伏性固化剂。
作为硅烷偶联剂，无特别限定，但是能够举出例如环氧类、氨类、巯基/硫化物类、脲化物类等。通过添加硅烷偶联剂，提高有机材料和无机材料的界面中的粘接性。
[导电性粒子]
作为导电性粒子4，能够举出各向异性导电膜1中使用的公知的任意导电性粒子。作为导电性粒子4，能举出例如镍、铁、铜、铝、锡、铅、铬、钴、银、金等的各种金属或金属合金的粒子；在金属氧化物、碳、石墨、玻璃、陶瓷、塑料等的粒子的表面镀敷金属的粒子；或者，在这些粒子的表面进一步镀敷绝缘薄膜的粒子等。在向树脂粒子的表面镀敷金属的粒子的情况下，作为树脂粒子，能举出例如环氧树脂、酚醛树脂、丙烯树脂、丙烯腈苯乙烯（AS）树脂、苯代三聚氰胺树脂、二乙烯基苯类树脂、苯乙烯类树脂等的粒子。
[导电性粒子的规则排列]
优选各向异性导电膜1中，导电性粒子4在俯视下以既定排列图案有规则地排列，例如如图5所示，以点阵状且均匀地排列。由于在俯视下有规则地排列，所以与导电性粒子4随机分散的情况相比，各向异性导电膜1即便液晶驱动用IC18的邻接的电极端子19间微细间距化、端子间面积窄小化，并且导电性粒子4以高密度填充，也能防止液晶驱动用IC18的连接工序中，导电性粒子4的集聚物造成的电极端子19间的短路。
另外，各向异性导电膜1因导电性粒子4有规则地排列而在粘合剂树脂层3以高密度填充的情况下，也防止导电性粒子4的集聚造成的疏密的发生。因而，依据各向异性导电膜1，在微细间距化的端子部17a、电极端子19中也能捕捉导电性粒子4。导电性粒子4的均匀排列图案能够任意设定，如俯视下点阵形状等。关于液晶驱动用IC18的连接工序，将在后面进行详述。
这样的各向异性导电膜1能够通过例如在可延伸的片上涂敷粘着剂，并在其上单层排列导电性粒子4后，以期望的延伸倍率延伸该片的方法；在基板上以既定排列图案排列导电性粒子4后，对被剥离膜2支撑的粘合剂树脂层3转印导电性粒子4的方法；或者对被剥离膜2支撑的粘合剂树脂层3上，经由设有与排列图案对应的开口部的排列板而供给导电性粒子4的方法等来制造。
此外，各向异性导电膜1的形状没有特别限定，但是能够制成例如如图4所示，能够卷绕到卷取盘（reel）6的长尺带形状，并切断成既定长度而使用。
另外，上述实施方式中，作为各向异性导电膜1，以将在粘合剂树脂层3规则排列导电性粒子4的热固化性树脂组合物成形为膜状的粘接膜为例进行了说明，但本发明所涉及的粘接剂并不局限于此，可以为例如层叠仅由粘合剂树脂3构成的绝缘性粘接剂层和由规则排列导电性粒子4的粘合剂树脂3构成的导电性粒子含有层的结构。另外，各向异性导电膜1只要导电性粒子4在俯视下规则排列，则除了如图4所示那样单层排列之外，也可以使导电性粒子4遍及多个粘合剂树脂层3而排列并且俯视下规则排列。另外，各向异性导电膜1也可以在多层结构的至少一个层内以既定距离单一地分散。
[导电性粒子与基板电极及电极端子的各台阶部的高度的关系]
在此，在使用规则排列导电性粒子4的各向异性导电膜1的情况下，如图6所示，有导电性粒子4被咬入电极端子19及端子部17a的两台阶部27、28间的情况。此时，导电性粒子4、和夹持导电性粒子4的电极端子19及端子部17a的各台阶部27、28，满足以下的式（1）。
a＋b＋c≤0.8D （1）
[a：电极端子19的台阶部高度，b：端子部17a的台阶部高度，c：台阶部间间隙，D：导电性粒子4的直径]
通过满足式（1），液晶显示面板10能够将夹持在端子部17a及电极端子19的两主面部间的导电性粒子4压缩到未压缩时的粒径的至少80％，从而能够确保充分的导通性。
即，液晶显示面板10在经由各向异性导电膜1连接液晶驱动用IC18时，在电极端子19的台阶部27与端子部17a的台阶部28之间咬入导电性粒子4。此时，遍及端子部17a及电极端子19的两主面部间的距离，成为相加电极端子19的台阶部高度a、端子部17a的台阶部高度b、和因咬入导电性粒子4而分离的两台阶部27、28间的间隙c后的距离（a＋b＋c）。因而，遍及端子部17a及电极端子19的两主面部间的距离（a＋b＋c）成为导电性粒子4的直径D的80％以下，从而能够压入至使导电性粒子4被压缩到至少粒径的80％以下。
另一方面，在不满足式（1）的情况下，因为导电性粒子4被咬入电极端子19的台阶部27与端子部17a的台阶部28之间，遍及端子部17a及电极端子19的两主面部间的距离最少也会大于导电性粒子4的粒径的80％，导电性粒子4的压缩率会小于20％，从而压入变得不充分。因此，端子部17a与电极端子19的导通性有可能变差。
而且，在本发明中，满足以下的式（2）也可。
c≤1μm （2）
如式（2）所示，被咬入端子部17a的台阶部27与电极端子19的台阶部28之间的导电性粒子4，被施加比由主面部夹持还大的压力，被压缩到大概1μm以下的粒径。此外，导电性粒子4因压缩而破坏的情况下也成为大概1μm以下的大小。即，两台阶部27、28间的间隙c成为1μm以下。
另一方面，在不满足式（2）的情况下，因为两台阶部27、28间的间隙超过1μm，所以拉开端子部17a与电极端子19的各主面部间的距离，夹持在主面部间的导电性粒子4的压缩会小于20％，从而压入变得不充分。因此，端子部17a与电极端子19的导通性有可能变差。
[连接工序]
接着，对将液晶驱动用IC18连接到透明基板12的连接工序进行说明。首先，在透明基板12的形成有端子部17a的COG安装部20上临时贴各向异性导电膜1。接着，将该透明基板12承载于连接装置的平台上，经由各向异性导电膜1在透明基板12的安装部上配置液晶驱动用IC18。
接着，通过加热到使粘合剂树脂层3固化的既定温度的热压接头33，以既定压力、时间从液晶驱动用IC18上开始热加压。由此，各向异性导电膜1的粘合剂树脂层3显示流动性，从液晶驱动用IC18的安装面18a与透明基板12的COG安装部20之间流出，并且粘合剂树脂层3中的导电性粒子4被夹持在液晶驱动用IC18的电极端子19与透明基板12的端子部17a之间而压碎。
此时，如上所述，导电性粒子4、和夹持导电性粒子4的电极端子19及端子部17a的各台阶部27、28，满足以下的式（1）。
a＋b＋c≤0.8D （1）
[a：电极端子19的台阶部高度，b：端子部17a的台阶部高度，c：台阶部间间隙，D：导电性粒子4的直径]
因而，液晶显示面板10能够将夹持在端子部17a及电极端子19的两主面部间的导电性粒子4压缩到至少粒径的80％，从而能够确保充分的导通性。
特别是，液晶显示面板10在使用对应于端子部17a及电极端子19的微细间距化，使导电性粒子规则排列而高密度填充的各向异性导电膜1的情况下，不仅在端子部17a及电极端子19的各主面部而且在台阶部27、28间也容易引起导电性粒子4被咬入的现象。在该情况下，也通过满足上述式（1），能够将夹持在端子部17a及电极端子19的各主面部间的导电性粒子4压缩20％以上，从而能够确保良好的导通可靠性。
其结果，通过在电极端子19与端子部17a之间夹持导电性粒子4而电连接，在该状态下被热压接头33加热的粘合剂树脂固化。由此，能够制造在液晶驱动用IC18的电极端子19与形成在透明基板12的端子部17a之间确保导通性的液晶显示面板10。
不在电极端子19与端子部17a之间的导电性粒子4，在邻接的电极端子19间的端子间空间中分散在粘合剂树脂中，维持着电绝缘的状态。由此，仅在液晶驱动用IC18的电极端子19与透明基板12的端子部17a之间取得电导通。此外，作为粘合剂树脂，通过使用自由基聚合反应类的速固化类型的粘合剂树脂，使粘合剂树脂在短的加热时间内也能速固化。另外，作为各向异性导电膜1，不限于热固化型，只要能进行加压连接，也可以使用光固化型或光热并用型的粘接剂。
实施例
接着，对本发明的实施例进行说明。在本实施例中，利用导电性粒子规则排列的各向异性导电膜，制成向评价用玻璃基板连接评价用IC的连接体样品，分别测定了形成在评价用玻璃基板的基板电极和形成在评价用IC的IC凸块之间被捕捉的导电性粒子的压缩率及可靠性实验后的导通电阻（实施例1～6，比较例1、2）或邻接的IC凸块间的短路发生率（实施例7，比较例3）。
[各向异性导电膜]
评价用IC的连接所使用的各向异性导电膜的粘合剂树脂层，通过调制在溶剂中加入苯氧基树脂（商品名：YP50，新日铁化学公司制）60质量份、环氧树脂（商品名：jER828，三菱化学公司制）40质量份、阳离子类固化剂（商品名：SI－60L，三新化学工业公司制）2质量份的粘合剂树脂组合物，并将该粘合剂树脂组合物涂敷在剥离膜上、烧成而形成。
而且，在能够延伸的片上涂敷粘着剂，在其上以点阵状且均匀地单层排列导电性粒子后，以期望的延伸倍率延伸该片的状态下，层压粘合剂树脂层而得到了各向异性导电膜。
此外，本发明中的导电性粒子的排列方式并不局限于本实施例中记载的情况。
[评价用IC]
作为测定导通电阻的评价元件，使用了外形：1.8mm×20mm、厚度0.5mm；凸块（Au－plated，金镀敷）：宽度30μm×长度85μm、高度15μm；凸块间空间宽度：50μm的评价用IC。
[评价用玻璃基板]
作为连接有用于测定导通电阻的评价用IC的评价用玻璃基板，使用了外形为30mm×50mm、厚度0.5mm、形成有与用于测定导通电阻的评价用IC的凸块同尺寸同间距的梳齿状的电极图案，并且在除电极图案之外的区域形成有保护膜的ITO图案玻璃。
[评价用IC]
作为用于测定邻接的IC凸块间的短路发生率的评价元件，使用了外形：1.5mm×13mm、厚度0.5mm；凸块（Au－plated）：宽度25μm×长度140μm、高度15μm；凸块间空间宽度：7.5μm的评价用IC。
[评价用玻璃基板]
作为连接用于测定邻接的IC凸块间的短路发生率的评价用IC的评价用玻璃基板，使用了外形为30mm×50mm、厚度0.5mm、形成有与用于测定邻接的IC凸块间的短路发生率的评价用IC的凸块同尺寸同间距的梳齿状的电极图案，并且在除电极图案之外的区域形成保护膜的ITO图案玻璃。
在这些评价用玻璃基板临时贴上各向异性导电膜后，进行IC凸块与基板电极的对准的同时搭载评价用IC，利用热压接头进行压接。在实施例1～7、比较例1及比较例3中，在180℃、80MPa、5sec的条件下进行热压接而制成了连接体样品。在比较例2中，在180℃、40MPa、5sec的条件下进行热压接而制成了连接体样品。关于各连接体样品，测定了被夹持在IC凸块与基板电极之间的导电性粒子的压缩率及可靠性实验后的导通电阻或邻接的IC凸块间的短路发生率。可靠性实验的条件为85℃、85％RH、500hr。
[实施例1]
实施例1中，作为各向异性导电膜，使用了粒径4μm的导电性粒子。连接前的粒子个数密度为28000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为0.8μm。
实施例1所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为0.8μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为40％，可靠性实验后的导通电阻为3Ω。
[实施例2]
实施例2中，采用了使用粒径3.5μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。IC凸块及基板电极的各台阶部的高度a、b采用与实施例1相同的条件。
实施例2所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为1.0μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为26％，可靠性实验后的导通电阻为4Ω。
[实施例3]
实施例3中，采用了使用粒径3.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。IC凸块及基板电极的各台阶部的高度a、b采用与实施例1相同的条件。
实施例3所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为0.8μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为20％，可靠性实验后的导通电阻为5Ω。
[实施例4]
实施例4中，采用了使用粒径3.5μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为1.2μm。
实施例4所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为0.8μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为20％，可靠性实验后的导通电阻为5Ω。
[实施例5]
实施例5中，采用了使用粒径3.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。IC凸块及基板电极的各台阶部的高度a、b采用与实施例1相同的条件。
实施例5所涉及的连接体样品中，导电性粒子未被咬入IC凸块与基板电极的两台阶部之间，台阶部间的间隙c为0μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为47％，可靠性实验后的导通电阻为3Ω。
[实施例6]
实施例6中，采用了使用粒径3.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。IC凸块及基板电极的各台阶部的高度a、b采用与实施例1相同的条件。
实施例6所涉及的连接体样品中，对抗的IC凸块的侧缘部和基板电极的侧缘部偏移，从而台阶部间的间隙c为－0.2μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为53％，可靠性实验后的导通电阻为3Ω。
[实施例7]
实施例7中，采用了使用粒径4.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为1.4μm。
实施例7所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为1.0μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为20％，遍及邻接的IC凸块间的端子化短路的发生率为20ppm。
[比较例1]
比较例1中，采用了使用粒径3.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为1.4μm。
比较例1所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为0.35μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为15％，可靠性实验后的导通电阻为30Ω。
[比较例2]
比较例2中，采用了使用粒径4.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为28000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为0.8μm。
比较例2所涉及的连接体样品中，将热压接头的按压力减弱到40MPa，从而因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为2.0μm，被夹持城IC凸块与基板电极的两主面部间的导电性粒子的压缩率为10％，可靠性实验后的导通电阻为40Ω。
[比较例3]
比较例3中，采用了使用粒径4.0μm的导电性粒子的各向异性导电膜。连接前的粒子个数密度为40000个/mm2。另外，形成在IC凸块的侧缘部的台阶部的高度a为0.8μm，在形成在玻璃基板的基板电极的侧缘部形成的台阶部的高度b为1.4μm。
比较例3所涉及的连接体样品中，因导电性粒子被咬入IC凸块与基板电极的两台阶部之间而造成的台阶部间的间隙c为1.1μm，被夹持在IC凸块与基板电极的两主面部间的导电性粒子的压缩率为17.5％，遍及邻接物IC凸块间的端子化短路的发生率为1000ppm。
Figure DEST_PATH_IMAGE001
Figure DEST_PATH_IMAGE002
如表1所示，实施例1～6中，相加形成在IC凸块的侧缘部的台阶部的高度a、在形成在玻璃基板的基板电极的边缘部形成的台阶部的高度b、及IC凸块与基板电极的两台阶部间的间隙c的IC凸块与基板电极的两主面部间的距离，设为导电性粒子的直径的80％以下。因而，实施例1～6中，被夹持在IC凸块与基板电极的两主面部间的导电性粒子被压缩20％以上，在可靠性实验后也能维持良好的导通性。
另一方面，比较例1中，IC凸块与基板电极的两主面部间的距离宽达导电性粒子的直径的85％，导电性粒子只被压缩15％。另外，比较例2中，IC凸块与基板电极的两主面部间的距离宽达导电性粒子的直径的90％，导电性粒子只被压缩10％。因此，在比较例1及比较例2中，导电性粒子的压入不足，在可靠性实验后导通电阻达30Ω以上、导通性显著变差。
另外，如表2所示，实施例7的粒子个数密度为28000个/mm2，而比较例3的粒子个数密度为40000个/mm2、被高密度填充。因此，实施例7所涉及的连接体样品中，IC凸块间的空间中的粒子间距离平均2μm（粒径的0.5倍），而比较例3所涉及的连接体样品中，IC凸块间的空间中的粒子间距离较窄为平均1μm（粒径的0.25倍）。另外，被咬入IC凸块与基板电极的两台阶部间的导电性粒子也相连，比较例3中，IC凸块间的短路发生率比实施例7显著上升。
标号说明
1 各向异性导电膜；2 剥离膜；3 粘合剂树脂层；4 导电性粒子；6 卷取盘；10 液晶显示面板；11、12 透明基板；12a 边缘部；13 密封材料；14 液晶；15 面板显示部；16、17透明电极；17a 端子部；18 液晶驱动用IC；18a 安装面；19 电极端子；20 COG安装部；21 基板侧对准标记；22 IC侧对准标记；23 保护膜；27、28 台阶部；33 热压接头。

Claims (19)

1.一种连接体，其中具备：
电路基板；以及
电子部件，经由各向异性导电粘接剂连接到所述电路基板上，
在形成于所述电路基板的基板电极及形成于所述电子部件的电极端子，在各侧缘部形成有台阶部，
所述电极端子的台阶部由所述电极端子自身形成，
所述电极端子的台阶部的高度，是所述电极端子的主面部的法线方向上的所述主面部与所述电极端子的台阶部的顶部之间的距离，
所述基板电极及所述电极端子在各主面部间夹持在所述各向异性导电粘接剂中含有的导电性粒子，
所述导电性粒子被规则排列，
所述导电性粒子与所述基板电极及所述电极端子的各所述台阶部，满足以下的式(1)：
a+b+c≤0.8D(1)
其中，a：电极端子的台阶部高度，b：基板电极的台阶部高度，c：台阶部间间隙，D：导电性粒子的直径。
2.如权利要求1所述的连接体，其中，包含在所述各侧缘部形成的台阶部间夹持所述导电性粒子的所述基板电极及所述电极端子。
3.如权利要求1所述的连接体，其中，所述导电性粒子与所述基板电极及所述电极端子的各所述台阶部，还满足以下的式(2)：
c≤1μm(2)。
4.如权利要求1所述的连接体，其中，所述导电性粒子是金属、金属合金或在塑料粒子的表面镀敷金属的粒子。
5.如权利要求4所述的连接体，其中，所述导电性粒子是使表面进一步绝缘的粒子。
6.如权利要求1所述的连接体，其中，所述各向异性导电粘接剂以膜状形成，
所述导电性粒子个个分离。
7.如权利要求3所述的连接体，其中，所述各向异性导电粘接剂以膜状形成，
所述导电性粒子个个分离。
8.如权利要求1所述的连接体，其中，所述电子部件是IC芯片。
9.一种连接体的制造方法，其中具有经由各向异性导电粘接剂将电子部件连接到电路基板上的工序，
在形成于所述电路基板的基板电极及形成于所述电子部件的电极端子，在各侧缘部形成有台阶部，
所述电极端子的台阶部由所述电极端子自身形成，
所述电极端子的台阶部的高度，是所述电极端子的主面部的法线方向上的所述主面部与所述电极端子的台阶部的顶部之间的距离，
所述基板电极及所述电极端子在各主面部间夹持在所述各向异性导电粘接剂中含有的导电性粒子，
所述导电性粒子被规则排列，
所述导电性粒子与所述基板电极及所述电极端子的各所述台阶部，满足以下的式(1)：
a+b+c≤0.8D(1)
其中，a：电极端子的台阶部高度，b：基板电极的台阶部高度，c：台阶部间间隙，D：导电性粒子的直径。
10.一种电子设备，是具备连接体的电子设备，
其中，所述连接体是所述权利要求1所述的连接体。
11.一种电子设备，是具备连接体的电子设备，
其中，所述连接体是所述权利要求2所述的连接体。
12.一种电子设备，是具备连接体的电子设备，
其中，所述连接体是所述权利要求3所述的连接体。
13.一种电子设备，是具备连接体的电子设备，
其中，所述连接体是所述权利要求6所述的连接体。
14.一种电子设备，是具备连接体的电子设备，
其中，所述连接体是所述权利要求7所述的连接体。
15.如权利要求10所述的电子设备，其中，
所述电子设备是显示装置。
16.如权利要求11所述的电子设备，其中，
所述电子设备是显示装置。
17.如权利要求12所述的电子设备，其中，
所述电子设备是显示装置。
18.如权利要求13所述的电子设备，其中，
所述电子设备是显示装置。
19.如权利要求14所述的电子设备，其中，
所述电子设备是显示装置。
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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6945276B2 (ja) * 2016-03-31 2021-10-06 デクセリアルズ株式会社 異方性導電接続構造体
US10297478B2 (en) * 2016-11-23 2019-05-21 Rohinni, LLC Method and apparatus for embedding semiconductor devices
KR102530672B1 (ko) * 2018-07-20 2023-05-08 엘지디스플레이 주식회사 스트레쳐블 표시 장치
TWI671921B (zh) * 2018-09-14 2019-09-11 頎邦科技股份有限公司 晶片封裝構造及其晶片
CN110943110A (zh) * 2019-11-25 2020-03-31 武汉华星光电半导体显示技术有限公司 一种显示装置
CN113851437A (zh) * 2020-06-28 2021-12-28 京东方科技集团股份有限公司 倒装芯片和芯片封装结构
KR20220016364A (ko) 2020-07-30 2022-02-09 삼성디스플레이 주식회사 전자장치
CN115528161A (zh) * 2022-10-26 2022-12-27 上海天马微电子有限公司 显示面板的制作方法、显示面板及显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08138773A (ja) * 1994-11-02 1996-05-31 Ricoh Co Ltd 印刷配線板の電極部構造
CN1723590A (zh) * 2003-06-25 2006-01-18 日立化成工业株式会社 电路连接材料、使用其的薄膜状电路连接材料、电路构件的连接结构及其制造方法
CN1877404A (zh) * 2005-06-06 2006-12-13 阿尔卑斯电气株式会社 布线连接结构及液晶显示装置
JP2008047943A (ja) * 2007-11-01 2008-02-28 Renesas Technology Corp 半導体装置
JP2011012180A (ja) * 2009-07-02 2011-01-20 Hitachi Chem Co Ltd 回路接続材料及び回路接続構造体
CN103491703A (zh) * 2013-07-04 2014-01-01 友达光电股份有限公司 显示装置及其电路板模块

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100232678B1 (ko) * 1996-12-18 1999-12-01 구본준 돌기가 형성된 범프 및 그 제조방법
US20020098620A1 (en) * 2001-01-24 2002-07-25 Yi-Chuan Ding Chip scale package and manufacturing method thereof
JP4115832B2 (ja) * 2002-12-27 2008-07-09 東芝松下ディスプレイテクノロジー株式会社 半導体素子及び液晶表示パネル
KR100546346B1 (ko) * 2003-07-23 2006-01-26 삼성전자주식회사 재배선 범프 형성방법 및 이를 이용한 반도체 칩과 실장구조
US20050104225A1 (en) * 2003-11-19 2005-05-19 Yuan-Chang Huang Conductive bumps with insulating sidewalls and method for fabricating
KR101051013B1 (ko) * 2003-12-16 2011-07-21 삼성전자주식회사 구동 칩 및 이를 갖는 표시장치
EP1810334B1 (en) * 2004-11-11 2011-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for Manufacturing a Semiconductor Device
US20060280912A1 (en) * 2005-06-13 2006-12-14 Rong-Chang Liang Non-random array anisotropic conductive film (ACF) and manufacturing processes
KR101134168B1 (ko) * 2005-08-24 2012-04-09 삼성전자주식회사 반도체 칩 및 그 제조 방법과, 그를 이용한 표시 패널 및그 제조 방법
JP2007067134A (ja) * 2005-08-31 2007-03-15 Seiko Epson Corp 実装部品、実装構造、及び実装構造の製造方法
CN100492627C (zh) * 2005-10-24 2009-05-27 财团法人工业技术研究院 芯片结构、芯片封装结构及其工艺
JP4789738B2 (ja) 2006-07-28 2011-10-12 旭化成イーマテリアルズ株式会社 異方導電性フィルム
KR101193757B1 (ko) * 2007-09-20 2012-10-23 소니 케미카루 앤드 인포메이션 디바이스 가부시키가이샤 이방성 도전막 및 그 제조 방법, 및 그 이방성 도전막을 이용한 접합체
KR101041146B1 (ko) * 2009-09-02 2011-06-13 삼성모바일디스플레이주식회사 표시 장치
JP5916334B2 (ja) * 2011-10-07 2016-05-11 デクセリアルズ株式会社 異方性導電接着剤及びその製造方法、発光装置及びその製造方法
JP6155651B2 (ja) * 2012-01-11 2017-07-05 日立化成株式会社 導電粒子、絶縁被覆導電粒子及び異方導電性接着剤
TWI527208B (zh) * 2013-06-14 2016-03-21 元太科技工業股份有限公司 顯示面板及其製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08138773A (ja) * 1994-11-02 1996-05-31 Ricoh Co Ltd 印刷配線板の電極部構造
CN1723590A (zh) * 2003-06-25 2006-01-18 日立化成工业株式会社 电路连接材料、使用其的薄膜状电路连接材料、电路构件的连接结构及其制造方法
CN1877404A (zh) * 2005-06-06 2006-12-13 阿尔卑斯电气株式会社 布线连接结构及液晶显示装置
JP2008047943A (ja) * 2007-11-01 2008-02-28 Renesas Technology Corp 半導体装置
JP2011012180A (ja) * 2009-07-02 2011-01-20 Hitachi Chem Co Ltd 回路接続材料及び回路接続構造体
CN103491703A (zh) * 2013-07-04 2014-01-01 友达光电股份有限公司 显示装置及其电路板模块

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TW201546920A (zh) 2015-12-16
US20160351531A1 (en) 2016-12-01
CN109616457A (zh) 2019-04-12
US9673168B2 (en) 2017-06-06
JP2015146379A (ja) 2015-08-13

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