CN109509424B - 显示驱动装置、其控制方法及显示装置 - Google Patents

显示驱动装置、其控制方法及显示装置 Download PDF

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Publication number
CN109509424B
CN109509424B CN201910080264.5A CN201910080264A CN109509424B CN 109509424 B CN109509424 B CN 109509424B CN 201910080264 A CN201910080264 A CN 201910080264A CN 109509424 B CN109509424 B CN 109509424B
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CN
China
Prior art keywords
frame
display data
displayed
processing chip
read
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Active
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CN201910080264.5A
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English (en)
Chinese (zh)
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CN109509424A (zh
Inventor
马希通
耿立华
李彦孚
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201910080264.5A priority Critical patent/CN109509424B/zh
Publication of CN109509424A publication Critical patent/CN109509424A/zh
Priority to US17/256,094 priority patent/US11798450B2/en
Priority to EP20749432.9A priority patent/EP3920168B1/en
Priority to JP2020573176A priority patent/JP7540955B2/ja
Priority to PCT/CN2020/073025 priority patent/WO2020156284A1/zh
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Publication of CN109509424B publication Critical patent/CN109509424B/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397—Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2350/00—Solving problems of bandwidth in display systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2352/00—Parallel handling of streams of display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/122—Tiling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/128—Frame memory using a Synchronous Dynamic RAM [SDRAM]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Digital Computer Display Output (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Controls And Circuits For Display Device (AREA)
CN201910080264.5A 2019-01-28 2019-01-28 显示驱动装置、其控制方法及显示装置 Active CN109509424B (zh)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201910080264.5A CN109509424B (zh) 2019-01-28 2019-01-28 显示驱动装置、其控制方法及显示装置
US17/256,094 US11798450B2 (en) 2019-01-28 2020-01-19 Display driving device, control method therefor, and display apparatus
EP20749432.9A EP3920168B1 (en) 2019-01-28 2020-01-19 Display driving device, control method therefor, and display apparatus
JP2020573176A JP7540955B2 (ja) 2019-01-28 2020-01-19 表示駆動装置、その制御方法及び表示装置
PCT/CN2020/073025 WO2020156284A1 (zh) 2019-01-28 2020-01-19 显示驱动装置、其控制方法及显示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910080264.5A CN109509424B (zh) 2019-01-28 2019-01-28 显示驱动装置、其控制方法及显示装置

Publications (2)

Publication Number Publication Date
CN109509424A CN109509424A (zh) 2019-03-22
CN109509424B true CN109509424B (zh) 2021-12-24

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CN201910080264.5A Active CN109509424B (zh) 2019-01-28 2019-01-28 显示驱动装置、其控制方法及显示装置

Country Status (5)

Country Link
US (1) US11798450B2 (https=)
EP (1) EP3920168B1 (https=)
JP (1) JP7540955B2 (https=)
CN (1) CN109509424B (https=)
WO (1) WO2020156284A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509424B (zh) * 2019-01-28 2021-12-24 京东方科技集团股份有限公司 显示驱动装置、其控制方法及显示装置
CN114664238B (zh) * 2022-03-23 2023-09-19 无锡力芯微电子股份有限公司 一种用于led显示的pwm数据同步方法
CN114822347B (zh) * 2022-03-29 2023-03-21 北京奕斯伟计算技术股份有限公司 源极驱动系统、其信号同步方法及显示装置
CN115731881B (zh) * 2022-11-24 2024-03-01 重庆惠科金渝光电科技有限公司 驱动方法、显示面板及存储介质

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06214534A (ja) * 1993-01-20 1994-08-05 Hitachi Ltd マルチ画面表示装置
JP3526019B2 (ja) * 1999-11-30 2004-05-10 インターナショナル・ビジネス・マシーンズ・コーポレーション 画像表示システム、画像表示装置、および画像表示方法
KR101642849B1 (ko) * 2009-06-02 2016-07-27 삼성디스플레이 주식회사 구동 장치의 동기화 방법 및 이를 수행하기 위한 표시 장치
JP4806090B1 (ja) * 2010-06-30 2011-11-02 株式会社東芝 映像信号処理装置及び方法
JP5633232B2 (ja) * 2010-08-05 2014-12-03 セイコーエプソン株式会社 集積回路装置及び電子機器
US8677048B2 (en) * 2010-10-26 2014-03-18 Netapp Inc. Communication with two or more storage devices via one SAS communication port
CN103065595B (zh) * 2012-12-14 2015-04-22 深圳市华星光电技术有限公司 一种液晶显示面板的驱动方法、驱动电路及液晶显示装置
US9190000B2 (en) 2012-12-14 2015-11-17 Shenzhen China Star Optoelectronics Technology Co., Ltd LCD panel driving method, driver circuit and LCD device
CN104240635A (zh) * 2013-06-10 2014-12-24 缪朝晖 一种显示控制接口电路
CN108806626B (zh) * 2018-05-31 2020-04-28 深圳市华星光电技术有限公司 显示器驱动系统
CN109509424B (zh) * 2019-01-28 2021-12-24 京东方科技集团股份有限公司 显示驱动装置、其控制方法及显示装置

Also Published As

Publication number Publication date
JP2022518084A (ja) 2022-03-14
WO2020156284A1 (zh) 2020-08-06
EP3920168A1 (en) 2021-12-08
US11798450B2 (en) 2023-10-24
US20210272496A1 (en) 2021-09-02
CN109509424A (zh) 2019-03-22
EP3920168A4 (en) 2022-10-26
EP3920168B1 (en) 2025-09-17
JP7540955B2 (ja) 2024-08-27

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