JP7540955B2 - 表示駆動装置、その制御方法及び表示装置 - Google Patents

表示駆動装置、その制御方法及び表示装置 Download PDF

Info

Publication number
JP7540955B2
JP7540955B2 JP2020573176A JP2020573176A JP7540955B2 JP 7540955 B2 JP7540955 B2 JP 7540955B2 JP 2020573176 A JP2020573176 A JP 2020573176A JP 2020573176 A JP2020573176 A JP 2020573176A JP 7540955 B2 JP7540955 B2 JP 7540955B2
Authority
JP
Japan
Prior art keywords
frame
display data
processing chip
memory
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020573176A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022518084A (ja
JP2022518084A5 (https=
Inventor
シートン マ
リーファ ゲン
ヤンフ リ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of JP2022518084A publication Critical patent/JP2022518084A/ja
Publication of JP2022518084A5 publication Critical patent/JP2022518084A5/ja
Application granted granted Critical
Publication of JP7540955B2 publication Critical patent/JP7540955B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397—Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2350/00—Solving problems of bandwidth in display systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2352/00—Parallel handling of streams of display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/122—Tiling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/128—Frame memory using a Synchronous Dynamic RAM [SDRAM]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Digital Computer Display Output (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Controls And Circuits For Display Device (AREA)
JP2020573176A 2019-01-28 2020-01-19 表示駆動装置、その制御方法及び表示装置 Active JP7540955B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201910080264.5 2019-01-28
CN201910080264.5A CN109509424B (zh) 2019-01-28 2019-01-28 显示驱动装置、其控制方法及显示装置
PCT/CN2020/073025 WO2020156284A1 (zh) 2019-01-28 2020-01-19 显示驱动装置、其控制方法及显示装置

Publications (3)

Publication Number Publication Date
JP2022518084A JP2022518084A (ja) 2022-03-14
JP2022518084A5 JP2022518084A5 (https=) 2023-01-27
JP7540955B2 true JP7540955B2 (ja) 2024-08-27

Family

ID=65758169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020573176A Active JP7540955B2 (ja) 2019-01-28 2020-01-19 表示駆動装置、その制御方法及び表示装置

Country Status (5)

Country Link
US (1) US11798450B2 (https=)
EP (1) EP3920168B1 (https=)
JP (1) JP7540955B2 (https=)
CN (1) CN109509424B (https=)
WO (1) WO2020156284A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509424B (zh) * 2019-01-28 2021-12-24 京东方科技集团股份有限公司 显示驱动装置、其控制方法及显示装置
CN114664238B (zh) * 2022-03-23 2023-09-19 无锡力芯微电子股份有限公司 一种用于led显示的pwm数据同步方法
CN114822347B (zh) * 2022-03-29 2023-03-21 北京奕斯伟计算技术股份有限公司 源极驱动系统、其信号同步方法及显示装置
CN115731881B (zh) * 2022-11-24 2024-03-01 重庆惠科金渝光电科技有限公司 驱动方法、显示面板及存储介质

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001166761A (ja) 1999-11-30 2001-06-22 Internatl Business Mach Corp <Ibm> 画像表示システム、ホスト装置、画像表示装置、および画像表示方法
US20100302214A1 (en) 2009-06-02 2010-12-02 Samsung Electronics Co., Ltd. Method of synchronizing a driving device and display apparatus for performing the method
US20120002009A1 (en) 2010-06-30 2012-01-05 Kabushiki Kaisha Toshiba Video signal processing apparatus and video signal processing method
JP2012037665A (ja) 2010-08-05 2012-02-23 Seiko Epson Corp 集積回路装置及び電子機器
CN104240635A (zh) 2013-06-10 2014-12-24 缪朝晖 一种显示控制接口电路
CN108806626A (zh) 2018-05-31 2018-11-13 深圳市华星光电技术有限公司 显示器驱动系统

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06214534A (ja) * 1993-01-20 1994-08-05 Hitachi Ltd マルチ画面表示装置
US8677048B2 (en) * 2010-10-26 2014-03-18 Netapp Inc. Communication with two or more storage devices via one SAS communication port
CN103065595B (zh) * 2012-12-14 2015-04-22 深圳市华星光电技术有限公司 一种液晶显示面板的驱动方法、驱动电路及液晶显示装置
US9190000B2 (en) 2012-12-14 2015-11-17 Shenzhen China Star Optoelectronics Technology Co., Ltd LCD panel driving method, driver circuit and LCD device
CN109509424B (zh) * 2019-01-28 2021-12-24 京东方科技集团股份有限公司 显示驱动装置、其控制方法及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001166761A (ja) 1999-11-30 2001-06-22 Internatl Business Mach Corp <Ibm> 画像表示システム、ホスト装置、画像表示装置、および画像表示方法
US20100302214A1 (en) 2009-06-02 2010-12-02 Samsung Electronics Co., Ltd. Method of synchronizing a driving device and display apparatus for performing the method
US20120002009A1 (en) 2010-06-30 2012-01-05 Kabushiki Kaisha Toshiba Video signal processing apparatus and video signal processing method
JP2012015772A (ja) 2010-06-30 2012-01-19 Toshiba Corp 映像信号処理装置及び方法
JP2012037665A (ja) 2010-08-05 2012-02-23 Seiko Epson Corp 集積回路装置及び電子機器
CN104240635A (zh) 2013-06-10 2014-12-24 缪朝晖 一种显示控制接口电路
CN108806626A (zh) 2018-05-31 2018-11-13 深圳市华星光电技术有限公司 显示器驱动系统

Also Published As

Publication number Publication date
JP2022518084A (ja) 2022-03-14
WO2020156284A1 (zh) 2020-08-06
CN109509424B (zh) 2021-12-24
EP3920168A1 (en) 2021-12-08
US11798450B2 (en) 2023-10-24
US20210272496A1 (en) 2021-09-02
CN109509424A (zh) 2019-03-22
EP3920168A4 (en) 2022-10-26
EP3920168B1 (en) 2025-09-17

Similar Documents

Publication Publication Date Title
JP7540955B2 (ja) 表示駆動装置、その制御方法及び表示装置
US10049642B2 (en) Sending frames using adjustable vertical blanking intervals
CN112243523B (zh) 使多个显示面板同步的方法和电子设备
US5488385A (en) Multiple concurrent display system
US9607542B2 (en) Display panel driving method, driving device and display device
US10775921B2 (en) Method of controlling timing for touch and display driver system and touch and display driver system using the same
JP6272670B2 (ja) ディスプレードライバ集積回路及びディスプレーデータ処理方法
US11574614B2 (en) Switching method and switching device for display channel, display driving device and display device
US20080122816A1 (en) Display apparatus having a timing controller and method of driving the timing controller
CN109426474B (zh) 一种双显示屏同步系统
WO2014089856A1 (zh) 一种液晶显示面板的驱动方法、驱动电路及液晶显示装置
WO2020252777A1 (en) A picture frame display apparatus and a display method
US20110153923A1 (en) High speed memory system
JP2022518084A5 (https=)
US6184907B1 (en) Graphics subsystem for a digital computer system
KR102708771B1 (ko) 디스플레이 구동 장치 및 디스플레이 구동 장치를 포함하는 디스플레이 장치
CN115547250A (zh) 显示控制方法和装置、控制系统、显示装置和电子设备
US12399672B2 (en) Image processor circuit supporting two-pixel mode and image processing method thereof
EP4693266A1 (en) System-on-chip and display device
KR100726993B1 (ko) 플라즈마 디스플레이 패널의 메모리 장치 및 그 제어 방법
CN119603418A (zh) 芯片以及显示设备
CN103366669B (zh) 一种控制显示驱动时序的方法及播放设备
JPH0281397A (ja) 画像メモリ装置
JPS6326896A (ja) 半導体メモリ
JP2013218162A (ja) 平面表示装置と平面表示装置の制御方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230116

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230116

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20231218

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240123

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240423

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20240723

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20240815

R150 Certificate of patent or registration of utility model

Ref document number: 7540955

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150