CN109494250A - 一种小功率抗辐射晶体管芯片及制备方法 - Google Patents
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Abstract
本发明公开了一种小功率抗辐射晶体管芯片及制备方法,由基区、发射区、发射区键合点和基区键合点组成,基区的轮廓为葫芦形,基区一端的轮廓为大圆弧,基区另一端的轮廓为小圆弧,大圆弧的半径大于小圆弧的半径,基区位于大圆弧区域的表面由下向上依次设有发射区、发射区键合点,基区位于小圆弧区域的表面设有基区键合点,发射区、发射区键合点和基区键合点均位于基区的同一侧表面,基区的另一侧表面与基底接触,发射区、发射区键合点和基区键合点的轮廓均为圆形,基区的大圆弧半径、发射区的半径、发射区键合点的半径依次减小,基区的小圆弧半径、基区键合点的半径依次减小,发射区、基区和基底均为半导体层。本发明提供的芯片具有抗辐射能力。
Description
技术领域
本发明涉及双极性晶体管制造技术领域,尤其涉及一种小功率抗辐射晶体管芯片及制备方法。
背景技术
这里的陈述仅提供与本发明有关的背景信息,而不必然构成现有技术。
据统计,自1971年至1986年期间,国外发射的39颗同步卫星因各种原因造成的故障共计1589次,其中与空间辐射有关的故障有1129次,占故障总数的71%,由此可见卫星和航天器的故障主要来源于空间辐射。
对于双极型晶体管而言,空间辐射主要是总剂量效应。双极型晶体管在承受一定的空间能量后,其电特性会产生变化,如增益降低、漏电增加、饱和电压增加等,器件电特性的变化严重影响航天器的可靠性和质量。
随着我国航天事业的发展,近几年卫星和航天器的发射数量不断增加,在轨运行的时间越来越长,相应的空间辐照问题也会越来越多,因此迫切需要提高双极型器件的抗辐射能力。
发明内容
为了解决现有技术的不足,本发明的一方面是提供一种小功率抗辐射晶体管芯片,该芯片具有抗辐射能力。
本发明的技术方案为:
一种小功率抗辐射晶体管芯片,由基区、发射区、发射区键合点和基区键合点组成,所述基区为层状结构,所述基区的轮廓为葫芦形,基区一端的轮廓为大圆弧,基区另一端的轮廓为小圆弧,大圆弧的半径大于小圆弧的半径,所述基区位于大圆弧区域的表面由下向上依次设有发射区、发射区键合点,所述基区位于小圆弧区域的表面设有基区键合点,发射区、发射区键合点和基区键合点均位于基区的同一侧表面,基区的另一侧表面与基底接触,所述发射区键合点和基区键合点均为金属层,所述发射区、发射区键合点和基区键合点的轮廓均为圆形,基区的大圆弧半径、发射区的半径、发射区键合点的半径依次减小,基区的小圆弧半径、基区键合点的半径依次减小,发射区、基区和基底均为半导体层,所述基区和基底的半导体的P、N型不同,所述发射区和基区半导体的P、N型不同。
本发明的另一方面,提供了一种上述小功率抗辐射晶体管芯片的制备方法,将基底材料先经过一次氧化、光刻,在基底材料上制备出基区轮廓的凹槽,在凹槽底部进行基地扩散得到基区;再在基区经过二次氧化、光刻,在基区的大圆弧区域制备出发射区;然后在基区依次进行三次氧化、引线孔光刻、蒸铝、铝反刻、合金工艺在发射区和基区位于小圆弧区域分别制备发射区键合点和基区键合点。
本发明的第三方面,提供了一种上述小功率抗辐射晶体管芯片在卫星或航天器中的应用。
本发明的有益效果为:
(1)本发明芯片结构设计简单,能够使小功率晶体管的抗辐射指标达到100krad(Si),最低剂量率:0.01rad(Si)/s。
(2)本发明工艺流程设计通用,有利不同生产线加工生产该小功率抗辐射芯片。
附图说明
构成本公开的一部分的说明书附图用来提供对本公开的进一步理解,本公开的示意性实施例及其说明用于解释本公开,并不构成对本公开的不当限定。
图1为本发明芯片的结构示意图;
图2为芯片的截面的剖视图;
图3为本发明芯片的基区光刻板示意图;
图4为本发明芯片的发射区光刻板示意图
图5为本发明芯片的键合点光刻板示意图
其中,1、基区,2、发射区,3、发射区键合点,4、基区键合点,5、基底。
具体实施方式
应该指出,以下详细说明都是示例性的,旨在对本公开提供进一步的说明。除非另有指明,本文使用的所有技术和科学术语具有与本公开所属技术领域的普通技术人员通常理解的相同含义。
需要注意的是,这里所使用的术语仅是为了描述具体实施方式,而非意图限制根据本公开的示例性实施方式。如在这里所使用的,除非上下文另外明确指出,否则单数形式也意图包括复数形式,此外,还应当理解的是,当在本说明书中使用术语“包含”和/或
“包括”时,其指明存在特征、步骤、操作、器件、组件和/或它们的组合。
本公开所述的小功率是指芯片实际工作是的功率不大于1W。
正如背景技术所介绍的,现有技术中存在双极型器件的芯片的抗辐射能力较低的不足,为了解决如上的技术问题,本公开提出了一种小功率抗辐射晶体管芯片及制备方法。
本公开的一种典型实施方式,提供了一种小功率抗辐射晶体管芯片,由基区、发射区、发射区键合点和基区键合点组成,所述基区为层状结构,所述基区的轮廓为葫芦形,基区一端的轮廓为大圆弧,基区另一端的轮廓为小圆弧,大圆弧的半径大于小圆弧的半径,所述基区位于大圆弧区域的表面由下向上依次设有发射区、发射区键合点,所述基区位于小圆弧区域的表面设有基区键合点,发射区、发射区键合点和基区键合点均位于基区的同一侧表面,基区的另一侧表面与基底接触,所述发射区键合点和基区键合点均为金属层,所述发射区、发射区键合点和基区键合点的轮廓均为圆形,基区的大圆弧半径、发射区的半径、发射区键合点的半径依次减小,基区的小圆弧半径、基区键合点的半径依次减小,发射区、基区和基底均为半导体层,所述基区和基底的半导体的P、N型不同,所述发射区和基区半导体的P、N型不同。
本公开的发明人通过对大量的芯片形状(包括直板、梳状)的研究发现,只有本公开的形状的芯片能够具有抗辐射能力。本公开中发射区、发射区键合点、基区键合点的轮廓均设置为圆形,在相同面积下,圆形周长最长,能够保证芯片的成品率。
该实施方式的一种或多种实施例中,基区面积不大于5.12×10-4cm2。所涉及的抗辐射晶体管的结电容不大于5pF。
该实施方式的一种或多种实施例中,发射区面积不大于Ae=1.43×10-4cm2。所涉及的最大电流为50mA,最大频率为300MHz,发射级周长最小为388μm。
该实施方式的一种或多种实施例中,键合区设计基区键合点的面积和发射区键合点的面积均不小于8.83×10-5cm2。
该实施方式的一种或多种实施例中,基区大圆弧、发射区、发射区键合点的圆心连线与基区垂直。
该实施方式的一种或多种实施例中,基区小圆弧、基区键合点的圆心连线与基区垂直。
该实施方式的一种或多种实施例中,基区大圆弧与小圆弧的半径比为3:1.5~2.5。
该实施方式的一种或多种实施例中,基区的轴向长度不大于5μm。所述轴向为葫芦形的轴线方向。
该实施方式的一种或多种实施例中,基区大圆弧的直径不大于3μm。
该实施方式的一种或多种实施例中,发射区的半径与发射区键合点的半径比为4:2.5~3.5。
该实施方式的一种或多种实施例中,发射区的直径不大于1μm。
该实施方式的一种或多种实施例中,发射区键合点的半径与基区键合点的半径比为3:1.5~2.5。
该实施方式的一种或多种实施例中,基区中大圆弧与小圆弧之间的轮廓为圆弧状。基区中大圆弧与小圆弧之间的圆弧状轮廓的半径和发射区的半径相等。
该实施方式的一种或多种实施例中,所述基底为电阻率为0.001Ω·cm~0.002Ω·cm的低阻硅单晶片作为衬底,生长有厚度10μm~12μm、电阻率ρ=2Ω·cm~3Ω·cm外延层的硅晶片,所述基区与外延层接触。
本公开的另一种实施方式,提供了一种上述小功率抗辐射晶体管芯片的制备方法,将基底材料先经过一次氧化、光刻,在基底材料上制备出基区轮廓的凹槽,在凹槽底部进行基地扩散得到基区;再在基区经过二次氧化、光刻,在基区的大圆弧区域制备出发射区;然后在基区依次进行三次氧化、引线孔光刻、蒸铝、铝反刻、合金工艺在发射区和基区位于小圆弧区域分别制备发射区键合点和基区键合点。
该实施方式的一种或多种实施例中,一次氧化温度1000℃~1200℃,氧气流量4~6L/min,氢气1~2L/min,时间90~120min。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,基区光刻、发射区光刻、引线孔光刻、铝反刻的匀胶转速均不小于3500转/min;曝光时间均不小于2s。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,基区扩散温度600℃~800℃,氮气流量4~6L/min,时间20~30min。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,二次氧化温度900℃~1000℃,氧气流量4~6L/min,氢气1~2L/min,时间150~180min。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,发射区扩散温度900℃~1100℃,氮气流量4~6L/min,时间10~20min。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,三次氧化温度1100℃~1200℃,氧气流量4~6L/min,氢气1~2L/min,时间15~40min。该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,蒸铝真空度蒸发电压5~6KV,蒸发速率蒸发厚度该参数下能够保证芯片的成品率较高。
该实施方式的一种或多种实施例中,合金工序温度600℃~800℃,氧气流量2~3L/min,氮气流量2~4L/min,氢气1~2L/min,时间25~35min。该参数下能够保证芯片的成品率较高。
为了使得本领域技术人员能够更加清楚地了解本公开的技术方案,以下将结合具体的实施例详细说明本公开的技术方案。
实施例1
一种小功率抗辐射晶体管芯片,如图1~2所示,由基区1、发射区2、发射区键合点3和基区键合点4组成,基区1为层状结构,基区1的轮廓为葫芦形,基区1一端的轮廓为大圆弧,基区1另一端的轮廓为小圆弧,大圆弧的半径大于小圆弧的半径,基区1位于大圆弧区域的表面由下向上依次设有发射区2、发射区键合点3,基区1位于小圆弧区域的表面设有基区键合点4,发射区2、发射区键合点3和基区键合点4均位于基区1的同一侧表面,基区1的另一侧表面与基底5接触,发射区键合点3和基区键合点4均为铝层,发射区2、发射区键合点3和基区键合点4的轮廓均为圆形,基区1的大圆弧半径、发射区2的半径、发射区键合点3的半径依次减小,基区1的小圆弧半径、基区键合点4的半径依次减小,发射区2、基区1和基底5均为半导体层,基区1和发射区2的材料为掺杂硼的硅,基区半的材料为掺杂磷的硅。
基区面积5.12×10-4cm2。所涉及的抗辐射晶体管的结电容5pF。
发射区面积Ae=1.43×10-4cm2。所涉及的最大电流为50mA,最大频率为300MHz,发射级周长最小为388μm。
键合区设计基区键合点的面积和发射区键合点的面积均8.83×10-5cm2。
基区大圆弧、发射区、发射区键合点的圆心连线与基区垂直。
基区小圆弧、基区键合点的圆心连线与基区垂直。
基区大圆弧与小圆弧的半径比为3:2。
基区的轴向长度5μm。
基区大圆弧的直径3μm。
发射区的半径与发射区键合点的半径比为4:3。
发射区的直径1μm。
发射区键合点的半径与基区键合点的半径比为3:2。
基区中大圆弧与小圆弧之间的轮廓为圆弧状。基区中大圆弧与小圆弧之间的圆弧状轮廓的半径和发射区的半径相等。
基底为电阻率为0.001Ω·cm的低阻硅单晶片作为衬底,生长有厚度11μm、电阻率ρ=2Ω·cm外延层的硅晶片,基区与外延层接触。
芯片的工艺制程按照一次氧化、基区光刻、基区扩散、二次氧化、发射区光刻、发射区扩散、三次氧化、引线孔光刻、蒸铝、铝反刻、合金工艺流程进行。
各工序的工艺参数如下:
一次氧化:温度1100℃,氧气流量5L/min,氢气1L/min,时间100min。
基区光刻、发射区光刻、引线孔光刻、铝反刻匀胶转速均为4000转/min;曝光时间5s。基区光刻、发射区光刻、引线孔光刻采用的光刻板分别如图3~5所示。
基区扩散:温度700℃,氮气流量5L/min,时间25min。
二次氧化:温度950℃,氧气流量5L/min,氢气2L/min,时间160min。
发射区扩散:温度1000℃,氮气流量5L/min,时间15min。
三次氧化:温度1100℃,氧气流量5L/min,氢气2L/min,时间20min。
蒸铝:真空度蒸发电压5KV,蒸发速率蒸发厚度
合金:温度700℃,氧气流量2L/min,氮气流量3L/min,氢气2L/min,时间30min。
制备后的芯片记为B1。
实施例2
本实施例与实施例1相同,不同之处在于:基区为长方形。芯片记为A1。
采用实施例1和实施例2制备的芯片进行小功率抗辐射实验,实验结果如下表
表
实验过程中抗辐射指标为100krad(Si),剂量率:0.01rad(Si)/s。
由上表可以看出,A1为失败实验,B1为成功实验,可以证明实施例1制备的芯片具有抗辐射性能。
以上所述仅为本公开的优选实施例而已,并不用于限制本公开,对于本领域的技术人员来说,本公开可以有各种更改和变化。凡在本公开的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本公开的保护范围之内。
Claims (10)
1.一种小功率抗辐射晶体管芯片,其特征是,由基区、发射区、发射区键合点和基区键合点组成,所述基区为层状结构,所述基区的轮廓为葫芦形,基区一端的轮廓为大圆弧,基区另一端的轮廓为小圆弧,大圆弧的半径大于小圆弧的半径,所述基区位于大圆弧区域的表面由下向上依次设有发射区、发射区键合点,所述基区位于小圆弧区域的表面设有基区键合点,发射区、发射区键合点和基区键合点均位于基区的同一侧表面,基区的另一侧表面与基底接触,所述发射区键合点和基区键合点均为金属层,所述发射区、发射区键合点和基区键合点的轮廓均为圆形,基区的大圆弧半径、发射区的半径、发射区键合点的半径依次减小,基区的小圆弧半径、基区键合点的半径依次减小,发射区、基区和基底均为半导体层,所述基区和基底的半导体的P、N型不同,所述发射区和基区半导体的P、N型不同。
2.如权利要求1所述的芯片,其特征是,基区面积不大于5.12×10-4cm2;
或,发射区面积不大于Ae=1.43×10-4cm2;
或,键合区设计基区键合点的面积和发射区键合点的面积均不小于8.83×10-5cm2。
3.如权利要求1所述的芯片,其特征是,基区大圆弧、发射区、发射区键合点的圆心连线与基区垂直;
或,基区小圆弧、基区键合点的圆心连线与基区垂直。
4.如权利要求1所述的芯片,其特征是,基区大圆弧与小圆弧的半径比为3:1.5~2.5;
或,基区的轴向长度不大于5μm;
或,基区大圆弧的直径不大于3μm;
或,发射区的半径与发射区键合点的半径比为4:2.5~3.5;
或,发射区的直径不大于1μm;
或,发射区键合点的半径与基区键合点的半径比为3:1.5~2.5。
5.如权利要求1所述的芯片,其特征是,基区中大圆弧与小圆弧之间的轮廓为圆弧状;
优选的,基区中大圆弧与小圆弧之间的圆弧状轮廓的半径和发射区的半径相等。
6.如权利要求1所述的芯片,其特征是,所述基底为电阻率为0.001Ω·cm~0.002Ω·cm的低阻硅单晶片作为衬底,生长有厚度10μm~12μm、电阻率ρ=2Ω·cm~3Ω·cm外延层的硅晶片,所述基区与外延层接触。
7.一种权利要求1~6任一所述的小功率抗辐射晶体管芯片的制备方法,其特征是,将基底材料先经过一次氧化、光刻,在基底材料上制备出基区轮廓的凹槽,在凹槽底部进行基地扩散得到基区;再在基区经过二次氧化、光刻,在基区的大圆弧区域制备出发射区;然后在基区依次进行三次氧化、引线孔光刻、蒸铝、铝反刻、合金工艺在发射区和基区位于小圆弧区域分别制备发射区键合点和基区键合点。
8.如权利要求7所述的制备方法,其特征是,一次氧化温度1000℃~1200℃,氧气流量4~6L/min,氢气1~2L/min,时间90~120min;
或,基区光刻、发射区光刻、引线孔光刻、铝反刻的匀胶转速均不小于3500转/min;曝光时间均不小于2s;
或,基区扩散温度600℃~800℃,氮气流量4~6L/min,时间20~30min;
或,二次氧化温度900℃~1000℃,氧气流量4~6L/min,氢气1~2L/min,时间150~180min;
或,发射区扩散温度900℃~1100℃,氮气流量4~6L/min,时间10~20min。
9.如权利要求7所述的制备方法,其特征是,三次氧化温度1100℃~1200℃,氧气流量4~6L/min,氢气1~2L/min,时间15~40min;
或,蒸铝真空度蒸发电压5~6KV,蒸发速率蒸发厚度
或,合金工序温度600℃~800℃,氧气流量2~3L/min,氮气流量2~4L/min,氢气1~2L/min,时间25~35min。
10.一种权利要求1~6任一所述的小功率抗辐射晶体管芯片在卫星或航天器中的应用。
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