CN109314041A - 用于保持半导体晶片的基座、在半导体晶片的正面沉积外延层的方法、以及具有外延层的半导体晶片 - Google Patents
用于保持半导体晶片的基座、在半导体晶片的正面沉积外延层的方法、以及具有外延层的半导体晶片 Download PDFInfo
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Abstract
本发明涉及用于在半导体晶片的正面沉积层期间保持所述半导体晶片的基座,其包括基座环和基座基部,其中在所述基座环下方以旋转对称分布的方式布置所述基座基部的凹部;使用所述基座在半导体晶片的正面沉积外延层的方法;以及具有外延层的半导体晶片。
Description
本发明涉及用于在半导体晶片的正面沉积外延层期间保持所述半导体晶片的基座。本发明还涉及在半导体晶片的正面沉积外延层的方法,在所述方法的过程中使用所述基座,并且涉及具有外延层的半导体晶片。
现有技术/问题
US 2008/0118712 A1描述了包括基座环和基座基部的基座。基座环具有用于以半导体晶片背面的边缘区域放置半导体晶片的凸缘,并且所述基座环被放置在基座基部上,以便用于在半导体晶片的正面沉积层。
US 2007/0227441 A1注意到对由硅构成的外延涂覆的半导体硅晶片的边缘区域中的外延层厚度的周期性波动。原因是外延层生长所处的不同生长速率。不同的生长速率与半导体晶片的正面的晶体取向有关。半导体晶片的正面是半导体晶片的在其上沉积外延层一侧的表面。为了使外延层的厚度在边缘区域中更均匀,US 2007/0227441 A1提出随着厚度波动的周期而改变基座的结构。
出于同样的目的,US 2013/0263776提出在基座中一定位置处另外布置孔,所述位置对称地位于放置在基座上的半导体晶片的半径之外的基座圆周上。
本发明的目的是通过改良基座来改进在边缘区域中具有沉积的外延层的半导体晶片的平整度,而不必须影响外延层的厚度。特别地,本发明证实了,不会由于外延层的沉积而使边缘滚降(edge roll-off)(ERO)更均匀的方式。
该目的借助于在半导体晶片的正面沉积外延层期间保持所述半导体晶片的基座来实现,所述基座包括
基座环,其具有凸缘,所述凸缘用于以所述半导体晶片背面的边缘区域放置所述半导体晶片;和
基座基部,其中所述基座环在所述基座基部上位于所述基座基部的中心周围,其特征在于,
所述基座基部具有凹部,其位于所述基座环下方并且以旋转对称分布的方式布置在所述基座基部上,并且每个凹部的径向宽度大于所述基座环的径向宽度。
本发明还涉及用于在半导体晶片的正面沉积外延层的方法,所述方法包括:
提供所述半导体晶片;
在根据本发明的基座的基座环的凸缘上布置所述半导体晶片,其中所述基座基部具有与所述半导体晶片正面的边缘区域的两种交替部分区域中的第一种部分区域相对应的多个凹部,并且由于正面的晶体取向,所述外延层在所述第一部分区域中的生长速率低于在所述第二部分区域中的生长速率,使得所述第一部分区域位于所述基座基部的凹部上方;和
在所述半导体晶片的正面沉积所述外延层。
最后,本发明涉及具有外延层的半导体晶片,其中具有外延层的半导体晶片的边缘区域的第一部分区域中的外延层的厚度比所述边缘区域的第二部分区域中的外延层的厚度薄,并且材料沉积存在于所述半导体晶片的背面,借助于所述材料沉积,具有外延层的所述半导体晶片在所述第一部分区域中的总厚度与具有外延层的所述半导体晶片在所述第二部分区域中的总厚度匹配。
半导体晶片优选在边缘区域中的局部平整度,对于2mm的边缘排除,具有不大于12nm的最大ESFQR值,优选对于2mm的边缘排除具有不大于10nm的最大ESFQR值。
半导体晶片或其包含半导体晶片表面的至少一部分是单晶的,并且优选地由硅、锗或这些元素的混合物组成。半导体晶片可完全由所提到的材料之一组成。然而,这还可以是SOI晶片(绝缘体上硅)、接合的半导体晶片或已涂覆有一个或多个外延层的衬底晶片。外延层优选由硅、锗或这些元素的混合物组成,并且如果适当,含有掺杂剂。
半导体晶片可由根据FZ法(浮区)或根据CZ法结晶的单晶切片。CZ法包括将籽晶浸入容纳在坩埚中的熔体中,以及从所述熔体中拉制所述籽晶和在其上结晶的单晶。
半导体晶片具有至少200mm、优选至少300mm的直径。半导体晶片的正面优选<100>取向或<110>取向。
在正面的<100>取向的情况下,半导体晶片的正面的边缘区域可分别被细分为四个交替的第一和第二部分区域。在四个第一部分区域中,外延层的生长速率低于边缘区域的四个第二部分区域中的生长速率。第一部分区域的中心各自具有关于半导体晶片的圆周的角度位置θ。如果取向凹槽识别垂直于半导体晶片的正面的<100>取向的<110>方向,并且如果270°的角度位置θ被分配给所述方向,则四个第一部分区域的中心分别具有45°、135°、225°和315°的角度位置θ,其对应于垂直于半导体晶片的正面的<100>取向的<100>方向的角度位置。
在正面的<110>取向的情况下,半导体晶片的正面的边缘区域可分别被细分为两个交替的部分区域。在两个第一部分区域中,半导体晶片正面的外延层的生长速率低于边缘区域的两个第二部分区域中的生长速率。如果取向凹槽识别垂直于半导体晶片的正面的<110>取向的<110>方向,并且如果270°的角度位置θ被分配给所述方向,则两个第一部分区域的中心分别具有0°和180°的角度位置θ,其对应于垂直于半导体晶片的正面的<100>取向的<110>方向的角度位置。
在半导体晶片的正面沉积外延层期间,半导体晶片位于基座环的凸缘上,并且基座环位于基座基部的上部放置区域上。半导体晶片被布置成使得半导体晶片正面的边缘区域的第一部分区域位于基座基部中的凹部上方,在该第一部分区域中,生长速率由于正面的晶体取向而较低。
本发明的一个特征包括在基座基部的上部放置区域上放置基座环,随后在基座环的凸缘上放置半导体晶片,使得半导体晶片以所需方式布置。本发明的替代特征包括在基座环的凸缘上放置半导体晶片,随后将基座环与位于基座基部的上部放置区域上的凸缘上的半导体晶片放置成使得半导体晶片以所需方式布置。
基座基部优选由石墨毡或涂覆有碳化硅的石墨毡、或涂覆有碳化硅的石墨、或碳化硅组成,并且基座环优选由碳化硅或涂覆有碳化硅的一些其它材料组成。另一种材料优选石墨或硅。基座环具有内径和外径。内径小于半导体晶片的直径,并且外径大于半导体晶片的直径,外延层意欲沉积在所述半导体晶片的正面。基座环的径向宽度对应于基座环的外径和内径之差的一半。基座环的凸缘从基座环的内边缘延伸远至增加基座环的高度的台阶。凸缘优选以从所述台阶向内下降的方式成形。
基座基部中的凹部以旋转对称分布的方式布置。它们各自具有径向宽度,并且优选被碾磨(milled)至基座中。
凹部的径向宽度在每种情况下都大于基座环的径向宽度,优选不小于10mm且不大于100mm。出于该原因,基座环不完全覆盖凹部。由于凹部,在半导体晶片的正面沉积外延层期间,材料另外也沉积在半导体晶片的背面上。根据本发明,注意确保附加沉积的位置基本上位于半导体晶片正面的边缘区域的第一部分区域下方。尽管外延层沉积在半导体晶片的正面,但该外延层被边缘区域的第一部分区域中的外延层的厚度比第二部分区域薄的缺陷所困扰;然而,具有沉积外延层的半导体晶片在边缘区域具有特别均匀的总厚度,因为该缺陷由于额外材料在半导体晶片背面上的靶向沉积而失去了重要性。
可有针对性地影响半导体晶片的背面的边缘区域中材料的额外沉积的径向位置。它取决于半导体晶片覆盖凸缘的长度的选择。所述长度越大,材料沉积的位置越向内。覆盖长度优选不小于0.5mm且不大于3mm。
基座基部中的凹部各自在圆周方向上具有大小可由中心角指定的宽度。从基座基部的中心至凹部的两端的两个半径形成所述凹部的中心角。凹部的中心位于中心角的角平分线上。
如果意图在具有<100>取向的半导体晶片的正面沉积外延层,则基座基部中的四个凹部的中心角在每种情况下优选60°至70°,特别优选65°。半导体晶片优选地布置在基座环的凸缘上,使得半导体晶片的正面的边缘区域的四个第一部分区域的中心位于四个凹部的中心上方。
如果意图在具有<110>取向的半导体晶片的正面沉积外延层,则基座基部中的两个凹部的中心角在每种情况下优选90°至110°,特别优选100°。半导体晶片优选地布置在基座环的凸缘上,使得半导体晶片的正面的边缘区域的两个第一部分区域的中心位于两个凹部的中心上方。
基座基部中的凹部具有优选不小于0.3mm且不大于1.0mm的深度。凹部的深度可以是均匀的。然而,优选地,深度在圆周方向上再次增加和减小,并且凹部在所述方向上的横截面具有U形或V形的轮廓。
关于根据本发明的方法的上述实施方案所指定的特征可相应地应用于根据本发明的装置。反之,关于根据本发明的装置的上述实施方案所指定的特征可相应地应用于根据本发明的方法。在附图说明和权利要求书中解释了根据本发明的实施方案的这些和其它特征。作为本发明的实施方案各单个特征可单独地或组合地实现。此外,它们可描述可独立保护的有利实施方案。
下面参考附图更详细地解释本发明。
附图简单说明
图1是表示现有技术的图示,其显示基座基部、基座环和半导体晶片的相对布置。
图2和图3显示了具有正面的(100)面取向(图2)和具有正面的(110)面取向(图3)的半导体晶片的取向特征。
图4以平面图显示了根据本发明的基座基部。
图5和图6显示了在不同位置穿过基座基部的径向垂直截面,图5显示了基座基部中两个凹部之间区域中的垂直截面,并且图6显示了基座基部中一个凹部的区域中的垂直截面(图6)。
图7、图8和图9显示了在圆周方向上穿过根据图4的凹部的横截面轮廓的优选形式。
图10是显示外延涂覆的测试晶片在边缘区域中的平整度的图。在该图中,相对于角度位置θ绘制ESFQR值。
所用附图标记列表
1 基座基部
2 基座环
3 凸缘
4 半导体晶片
5 凹部
6 取向凹槽
7 升降销孔
8 凹部的内边缘
9 基座环的内边缘
10 上部放置区域
11 外延层
12 材料沉积
α 中心角
根据图1的装置包括基座基部1和基座环2,基座环2具有内边缘9,内边缘9具有朝向外侧与其相邻的凸缘3。半导体晶片4能以该半导体晶片背面的边缘区域被放置在凸缘3上。
在根据图4的基座基部1中,存在四个凹部5,其以旋转对称分布的方式布置在基座基部1的上部放置区域10上,并且还存在用于升高和降低半导体晶片的升降销孔7。凹部5各自具有内边缘8和对应于中心角α的大小的圆周方向上的宽度。凹部的中心位于中心角的角平分线(短划线)上。凹部的数目对应于半导体晶片正面的边缘区域的四个部分区域的数目,在所述部分区域中,外延层的生长速率由于正面的晶体取向而低于四个部分区域之间的部分区域中的生长速率。
图2显示了具有正面的<100>取向的半导体晶片4的取向特征。取向凹槽6标记270°的角度位置θ。因此,具有外延层的较低生长速率的边缘区域的四个部分区域的中心位于短划线箭头的尖端所指向的45°、135°、225°和315°的角度位置。
图3显示了具有正面的<110>取向的半导体晶片4的取向特征。取向凹槽6标记270°的角度位置θ。因此,具有外延层的较低生长速率的边缘区域的两个部分区域的中心位于短划线箭头的尖端所指向的0°和180°的角度位置。
为了在半导体晶片的正面沉积外延层11,将具有正面的<100>取向的半导体晶片4布置在基座环2的凸缘3上,使得四个第一部分区域位于基座基部1中的四个凹部5上方,优选使得四个第一部分区域的中心位于四个凹部的中心上方。
为了在半导体晶片的正面沉积外延层,将具有正面的<110>取向的半导体晶片布置在基座环的凸缘上,使得两个第一部分区域位于基座基部中的两个凹部上方,优选使得两个第一部分区域的中心位于两个凹部的中心上方。
图6显示了穿过基座基部中的一个凹部的中心的径向方向上的横截面,并且图5显示了两个凹部之间的相应横截面。
沉积气体在由较短箭头指示的路径上传送至半导体晶片4的被沉积外延层11的正面。由于凹部5,因此存在用于沉积气体的又一路径,所述又一路径在图6中由较长箭头指示,并且在基座环2下方被引导穿过至半导体晶片4的背面,使得材料12沉积在半导体晶片4的背面的边缘区域中。双头箭头表示半导体晶片4覆盖凸缘3的长度。材料沉积12的径向位置可受到覆盖长度的选择所影响,并随着覆盖长度的增加而向内迁移。较短的覆盖通过使用具有径向宽度相对较小的凸缘3的基座环2而产生,而较大的覆盖通过使用凸缘3较宽的基座环2而产生。
在基座环2直接位于基座基部上的情况下,半导体晶片4背面上的材料沉积12不存在,因为不存在凹部(图5)。
图7显示了在圆周方向上穿过根据图4的凹部的横截面。所述横截面的轮廓是V形的,因为凹部的深度T沿着优选65°的中心角α上升至最大0.3mm至1mm并再次下降,优选线性地上升并下降。
图8显示了在圆周方向上穿过根据图4的凹部的横截面,其轮廓偏离图7。横截面的轮廓是梯形的,因为凹部深度T沿着优选65°的中心角α上升至最大0.3mm至1mm,优选线性地上升,在一部分上保持最大,并再次下降,优选线性地下降。就实现该目的的方式来说,这种形式的轮廓是特别优选的。
图9显示了在圆周方向上穿过根据图4的凹部的横截面,其轮廓偏离图7和图8。所述横截面的轮廓是U形的,因为凹部的深度T沿着优选65°的中心角α快速上升至最大0.3mm至1mm,保持在最大并再次快速下降,优选突然上升并下降。
根据本发明的示例性实施方案的描述
在单晶片反应器中用由硅构成的外延层涂覆具有300mm直径和正面<100>取向的由单晶硅构成的半导体晶片。以位于根据图1的基座上的方式涂覆半导体晶片(比较晶片)的一部分。基座基部缺少根据本发明的凹部。根据本发明涂覆半导体晶片的另一部分,也就是说,以位于根据本发明的基座上的方式涂覆。具有外延层的较低生长速率的四个部分区域的中心位于基座基部中的四个凹部的中心上方。
然后,确定涂覆的半导体晶片在边缘区域中的局部平整度。图10显示了所述一部分和另一部分的涂覆的半导体晶片的相应一个的ESFQR值(边缘排除2mm,θ=265°下的激光标记,扇区长度30mm)。在根据本发明涂覆的半导体晶片的情况下,ESFQR值(实线)未展现出特征周期性波动,而它们可在比较晶片(虚线)的情况下被看到。
以上描述的示例性实施方案应当被理解为以举例方式给出。由此所作的公开首先使本领域技术人员能够理解本发明和与其相关的优点,其次还涵盖在本领域技术人员的理解范围内所描述的结构和方法的显而易见的改变和修改。因此,所有此类改变和修改以及等同物均意在由权利要求的保护范围所覆盖。
Claims (12)
1.用于在半导体晶片的正面沉积外延层期间保持所述半导体晶片的基座,其包括
基座环,其具有凸缘,该凸缘用于以所述半导体晶片背面的边缘区域放置所述半导体晶片;和
基座基部,其中所述基座环在所述基座基部上位于所述基座基部的中心周围,其特征在于,
所述基座基部具有凹部,其位于所述基座环下方并且以旋转对称分布的方式布置在所述基座基部上,并且每个凹部的径向宽度大于所述基座环的径向宽度。
2.根据权利要求1所述的基座,其中所述基座基部的凹部具有环形区段的形状。
3.根据权利要求2所述的基座,其中,所述凹部具有不小于60°且不大于70°或不小于90°且不大于110°的中心角。
4.根据权利要求1至3中任一项所述的基座,其中所述凹部在所述基座基部的圆周方向上的横截面具有V形轮廓。
5.根据权利要求1至3中任一项所述的基座,其中所述凹部在所述基座基部的圆周方向上的横截面具有U形轮廓。
6.根据权利要求1至3中任一项所述的基座,其中所述凹部在所述基座基部的圆周方向上的横截面具有梯形轮廓。
7.在半导体晶片的正面沉积外延层的方法,其包括:
提供所述半导体晶片;
在根据权利要求1至5中任一项所述的基座的基座环的凸缘上布置所述半导体晶片,其中所述基座基部具有与所述半导体晶片正面的边缘区域的两种交替部分区域中的第一种部分区域相对应的多个凹部,并且由于正面的晶体取向,所述外延层在所述第一部分区域中的生长速率低于在所述第二部分区域中的生长速率,使得所述第一部分区域位于所述基座基部的所述凹部的上方;和
在所述半导体晶片的正面沉积所述外延层。
8.根据权利要求7所述的方法,其特征在于,提供具有<100>取向的正面的半导体晶片,并将所述半导体晶片布置在所述基座基部的四个凹部上方。
9.根据权利要求7所述的方法,其特征在于,提供具有<110>取向的正面的半导体晶片,并将所述半导体晶片布置在所述基座基部的两个凹部上方。
10.根据权利要求7至9中任一项所述的方法,其特征在于,将所述半导体晶片布置在所述凸缘上,使得所述凸缘被所述半导体晶片覆盖不小于0.5mm且不大于3mm的长度。
11.具有外延层的半导体晶片,其中所述具有外延层的半导体晶片的边缘区域的第一部分区域中的外延层的厚度比所述边缘区域的第二部分区域中的外延层的厚度薄,并且材料沉积存在于所述半导体晶片的背面,借助于所述材料沉积,所述具有外延层的半导体晶片在所述第一部分区域中的总厚度与所述具有外延层的半导体晶片在所述第二部分区域中的总厚度匹配。
12.根据权利要求11所述的半导体晶片,对于2mm的边缘排除,其在边缘区域中的局部平整度为具有不大于12nm的最大ESFQR值。
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- 2017-05-31 CN CN201780035494.9A patent/CN109314041B/zh active Active
- 2017-05-31 KR KR1020187036715A patent/KR102200146B1/ko active IP Right Grant
- 2017-05-31 JP JP2018564312A patent/JP6880078B2/ja active Active
- 2017-05-31 US US16/099,363 patent/US10865499B2/en active Active
- 2017-05-31 WO PCT/EP2017/063089 patent/WO2017211630A1/de unknown
- 2017-06-08 TW TW107129199A patent/TWI671439B/zh active
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Also Published As
Publication number | Publication date |
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TWI653368B (zh) | 2019-03-11 |
JP6880078B2 (ja) | 2021-06-02 |
US20190106809A1 (en) | 2019-04-11 |
TW201842244A (zh) | 2018-12-01 |
EP3469624A1 (de) | 2019-04-17 |
JP2019523991A (ja) | 2019-08-29 |
WO2017211630A1 (de) | 2017-12-14 |
US10865499B2 (en) | 2020-12-15 |
TW201812122A (zh) | 2018-04-01 |
KR102200146B1 (ko) | 2021-01-11 |
EP3469624B1 (de) | 2022-04-20 |
TWI671439B (zh) | 2019-09-11 |
CN109314041B (zh) | 2023-07-28 |
KR20190008361A (ko) | 2019-01-23 |
DE102016210203B3 (de) | 2017-08-31 |
SG11201810554QA (en) | 2018-12-28 |
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