CN109121302A - Edges of boards design method, the design method of wiring board and the wiring board of wiring board - Google Patents
Edges of boards design method, the design method of wiring board and the wiring board of wiring board Download PDFInfo
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- CN109121302A CN109121302A CN201811141393.2A CN201811141393A CN109121302A CN 109121302 A CN109121302 A CN 109121302A CN 201811141393 A CN201811141393 A CN 201811141393A CN 109121302 A CN109121302 A CN 109121302A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
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- Computer Hardware Design (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The present invention relates to a kind of edges of boards design method of wiring board, the design method of wiring board and wiring boards.The edges of boards design method of wiring board, comprising the following steps: obtain the first residual copper ratio of graphics field and form the first residual copper data;The copper billet size and copper billet spacing in default edges of boards region;Based on copper billet size and the second residual copper ratio of copper billet distance computation and form the second residual copper data;Second residual copper data are matched with the first residual copper data, if meeting the first equation, the copper billet size and copper billet spacing in edges of boards region are edges of boards design size.After the first residual copper data for obtaining graphics field, when setting the copper billet size and copper billet spacing in edges of boards region, the residual copper data in edges of boards region second after making setting meet the first equation with the first residual copper data, to make the second residual copper data keep preset relation with the first residual copper data, copper when guaranteeing two region following process is thick consistent, and avoids the problem that being easy to produce leakage copper after solder mask is laid with.
Description
Technical field
The present invention relates to wiring board processing technique fields, more particularly to a kind of edges of boards design method of wiring board, route
The design method and wiring board of plate.
Background technique
PCB (Printed Circuit Board), commonly referred to as wiring board, also referred to as printed wiring board or printed circuit board are
The carrier that supporter, the electronic component of electronic component are electrically connected.With electronic product to slimming, it is high performance
Direction rapidly develops, and the package substrate production requirement of wiring board is also higher and higher.
However, the edges of boards design of package substrate is unable to satisfy the production requirement of thick copper base, it will usually which there are edges of boards regions
Copper thickness and graphics field the excessive problem of copper thickness gap, and the edges of boards region after welding resistance leveling, especially tool hole site
Can there are problems that false leakage copper, thin welding resistance is easy to fall off in the follow-up process of substrate manufacture, and the quality of product is caused to decline.
Summary of the invention
Based on this, it is necessary to provide the edges of boards design method, the design method of wiring board and wiring board of a kind of wiring board.It should
The edges of boards design method of wiring board can be avoided the copper in edges of boards region thicker than height, and avoid the generation of leakage copper phenomenon;The wiring board
Design method using wiring board above-mentioned edges of boards design method carry out edges of boards design, improve the whole design water of wiring board
It is flat;The wiring board is designed and is process using the design method of wiring board above-mentioned, improves the product matter of wiring board
Amount.
Its technical solution is as follows:
On the one hand, a kind of edges of boards design method of wiring board is provided, comprising the following steps:
(S1), the first residual copper ratio for obtaining the graphics field of wiring board default is wanted based on the first residual copper ratio and according to first
It asks to form the first residual copper data;
(S2), the copper billet size and copper billet spacing in the edges of boards region of wiring board are preset;
(S3), based on copper billet size and copper billet spacing and according to the second preset requirement the second residual copper ratio of calculating and to second
Residual copper ratio is handled to obtain the second residual copper data;
(S4), the second residual copper data are matched with the first residual copper data, if meeting the first equation, is thened follow the steps
(S41);Otherwise, step (S42) is executed;
(S41), the copper billet size and copper billet spacing in edges of boards region are edges of boards design size;
(S42), (S2) is entered step;
First equation are as follows:
d2=λ * d1;
Wherein, d1For the first residual copper data, d2For the second residual copper data, λ is coefficient range.
The edges of boards design method of above-mentioned wiring board, after the first residual copper data for obtaining graphics field, in setting edges of boards region
Copper billet size and copper billet spacing when, make setting after the residual copper data in edges of boards region second and the first residual copper data meet first party
Formula guarantees copper when two region following process so that the second residual copper data be made to keep preset relation with the first residual copper data
It is thick consistent, and avoid the problem that being easy to produce leakage copper after solder mask is laid with.
Technical solution is illustrated further below:
In one of the embodiments, in step (S2), between the copper billet size and copper billet of presetting the edges of boards region of wiring board
Away from before, further includes: the shape of default copper billet.
In one of the embodiments, in step (S42), after entering step (S2), the edges of boards region of wiring board is preset
Copper billet size and copper billet spacing the step of include: according to third preset requirement between previous copper billet size and previous copper billet
Away from being handled and obtained new copper billet size and new copper billet spacing.
Previous copper billet size and copper billet spacing are handled according to third preset requirement in one of the embodiments,
The step of in, processing is optimized to previous copper billet size and previous copper billet spacing based on default optimization algorithm.
In one of the embodiments, in step (S2), the shape of copper billet includes square, rectangle, bar shaped or circle.
In one of the embodiments, the corresponding edges of boards region in tooling hole position be tools area, step (S4) it
Afterwards, further includes:
(S51), the residual copper of third of tools area is calculated based on edges of boards design size and according to the 4th preset requirement
Rate simultaneously handles third residual copper ratio to obtain the residual copper data of third;
(S52), the residual copper data of third are compared with the first residual copper data, if meeting second party formula, execute step
Suddenly (S521);Otherwise, step (S522) is executed;
(S521), the edges of boards design size in current tool region is kept;
(S522), the copper billet size of tools area is adjusted according to the 5th preset requirement and copper billet spacing and entered step
(S51);
In step (S522), after entering step (S51), edges of boards design size is copper adjusted in step (S522)
Block size and copper billet spacing;
Second party formula are as follows:
d3=λ * d1;
Wherein, d3For the residual copper data of third.
In one of the embodiments, in step (S522), the copper billet ruler of tools area is adjusted according to the 5th preset requirement
In the step of very little and copper billet spacing, the copper billet size of tools area adjusted is greater than the default copper billet minimum ruler of tools area
It is very little.
In one of the embodiments, in the first equation, the value of coefficient range is λ=1 ± 5%.
On the other hand, a kind of design method of wiring board is additionally provided, the edges of boards of wiring board use such as any one above-mentioned reality
The edges of boards design method for applying wiring board described in example is designed.
The design method of above-mentioned wiring board carries out edges of boards design using the edges of boards design method of wiring board above-mentioned, makes line
The edges of boards copper thickness of road plate is not too big, and avoids the problem that welding resistance back leak copper, improves the design level of wiring board.
In addition, additionally providing a kind of wiring board, wiring board uses the design method of the wiring board as described in above-described embodiment
It is designed and is process.
Above-mentioned wiring board, since the design method using wiring board above-mentioned is designed and is process, to make to add
The copper thickness in the edges of boards region of the wiring board obtained after work and the copper thickness of graphics field are consistent, and solve welding resistance back plate border area
Domain is easy the problem of leakage copper, improves the overall processing quality of wiring board.
Detailed description of the invention
Fig. 1 is the flow chart of the edges of boards design method of the wiring board in embodiment;
Fig. 2 is the graphics field of wiring board and edges of boards region top view in embodiment;
Fig. 3 is the edges of boards schematic cross-section of the wiring board designed in embodiment.
Attached drawing mark explanation:
100, graphics field, 200, edges of boards region, 210, copper billet, 220, tooling hole, 230, solder mask, 300, plate ontology.
Specific embodiment
The embodiment of the present invention is described in detail with reference to the accompanying drawing:
It should be noted that it can be directly in another element when alleged element is with another element " fixation " in text
Above or there may also be elements placed in the middle.When an element is considered as with another element " connection ", it be can be directly
It is connected to another element in succession or may be simultaneously present centering elements.On the contrary, when element is referred to as " directly existing " another element
When "upper", intermediary element is not present.Term as used herein "vertical", "horizontal", "left" and "right" and similar table
It states for illustrative purposes only, is not meant to be the only embodiment.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool
The purpose of the embodiment of body, it is not intended that in the limitation present invention.Term " and or " used herein includes one or more
Any and all combinations of relevant listed item.
Embodiment as shown in Figure 1 to Figure 3 provides a kind of edges of boards design method of wiring board, comprising the following steps:
(S1), the first residual copper ratio for obtaining the graphics field 100 of wiring board, it is based on the first residual copper ratio and pre- according to first
If it is required that forming the first residual copper data;
(S2), 210 spacing of 210 size of copper billet and copper billet in the edges of boards region 200 of wiring board is preset;
(S3), the second residual copper ratio, simultaneously is calculated based on 210 size of copper billet and 210 spacing of copper billet and according to the second preset requirement
Second residual copper ratio is handled to obtain the second residual copper data;
(S4), the second residual copper data are matched with the first residual copper data, if meeting the first equation, is thened follow the steps
(S41);Otherwise, step (S42) is executed;
(S41), 210 size of copper billet and 210 spacing of copper billet in edges of boards region 200 are edges of boards design size;
(S42), (S2) is entered step;
First equation are as follows:
d2=λ * d1;
Wherein, d1For the first residual copper data, d2For the second residual copper data, λ is coefficient range.
210 size of copper billet and copper billet after the first residual copper data for obtaining graphics field 100, in setting edges of boards region 200
When 210 spacing, the residual copper data in edges of boards region 200 second after making setting meet the first equation with the first residual copper data, thus
The second residual copper data are made to keep preset relation with the first residual copper data, copper when guaranteeing two region following process is thick consistent, and
It avoids the problem that being easy to produce leakage copper after solder mask 230 is laid with.
In order to promote the heat dissipation performance of wiring board, it will usually which the edges of boards copper for increasing wiring board is thick, while reducing surface welding resistance
Thickness.However, in this case, the copper thickness in the edges of boards region 200 of wiring board has differences with the copper thickness of graphics field 100, make
The copper thickness of the two is inconsistent, is unable to satisfy actual needs;In addition, welding resistance leveling after edges of boards region 200 because solder mask 230 compared with
It is thin, the case where falling off in following process it is easy to appear welding resistance, so that the problem of causing leakage copper or false leakage copper, not only influences
The product appearance of wiring board, and have an effect on the product qualification rate of wiring board.
The present embodiment makes edges of boards area by 210 size of copper billet and 210 spacing of copper billet and guarantee in setting edges of boards region 200
The residual copper data of the second of domain 200 and the first residual copper data of graphics field 100 are correspondingly arranged, to realize edges of boards when following process
The copper thickness of region 200 and graphics field 100 is consistent.
It should be understood that
When the first residual copper data and the second residual copper data keep preset concord to meet the first equation, rear
When continuous plating is processed, the current distribution of the current distribution and edges of boards region 200 that can make graphics field 100 is consistent, from
And it is consistent the copper thickness in edges of boards region 200 and the copper thickness of graphics field 100, the edges of boards region 200 after solving conventional process
Copper is thicker than big problem;
Simultaneously as the copper in the copper thickness of graphics field 100 and edges of boards region 200 is thick consistent, and the copper in edges of boards region 200 is thick
The copper thickness of opposite conventional process reduces, so as to make edges of boards region 200 solder mask 230 thickness relative increase, and then keep away
Exempt from subsequent solder mask 230 and is easy to fall off the problems such as causing leakage copper;
In addition, being illustrated in figure 3 the schematic cross-section of plate ontology 300, the solder mask 230 of 220 position of tooling hole is simultaneously
Uncollapsed, this is because comparing traditional design method, the solder mask 230 of the present embodiment is opposite to be thickeied, the thickness of copper billet 210
It is opposite to reduce, so that the solder mask 230 of the corner location of tooling hole 220 collapses after avoiding welding resistance from flattening, and then further
The problem of solder mask 230 falls off when avoiding following process, improves product quality.
In step (S1), the first residual copper ratio of graphics field 100 can be directly acquired, and also can according to need acquisition respective counts
It is calculated according to post analysis, those skilled in the art can be specifically arranged as needed, and which is not described herein again.
Residual copper ratio, which refers in a region, the area of copper and the area ratio of whole region, such as the residual copper in edges of boards region 200
The entire area ratio of 210 area occupied of copper billet and edges of boards region 200 in rate fingerboard border region 200.
The setting of first equation be in order to make the second residual copper data keep preset proportionate relationship with the first residual copper data,
Make the second residual copper data value in the default fluctuation range of the first residual copper data, even if the second residual copper data and the first residual copper number
According to being consistent property, meet actual needs.λ is coefficient range, can according to need and is set, and is such as set as [0.95-
1.05]。
First preset requirement is specifically set as needed, and such as the first preset requirement, which can be, directly makes the first residual copper ratio
As the first residual copper data, it is also possible to be further processed to obtain the first residual copper data;
Second preset requirement refers to that the mode for calculating the second residual copper ratio and processing obtain the second residual copper data, carries out as needed
Setting, the second residual copper ratio is calculated and is handled the second residual copper ratio to obtain the second residual copper data.
In step (S42), when current 210 size of copper billet and 210 distance computation of copper billet and the second obtained residual copper is handled
When data and the first residual copper data are unsatisfactory for the first equation, then need to enter step in (S2), reset the plate of wiring board
210 spacing of 210 size of copper billet and copper billet of border region 200, to obtain the second new residual copper ratio and based at the second residual copper ratio
It manages and obtains the residual copper data of new second, subsequent further progress contrast judgement, until the coherence request of the first equation, here
It repeats no more.
Further, in step (S2), 210 spacing of 210 size of copper billet and copper billet in the edges of boards region 200 of wiring board is preset
Before, further includes: the shape of default copper billet 210.
For different specifications, the shape of different copper billets 210 can be set, to meet actual needs, therefore, pre-
If before 210 spacing of 210 size of copper billet and copper billet, it is also necessary to the shape of default copper billet 210.
It should be noted that after entering step (S2), current 210 shape of copper billet can be kept in step (S42)
Shape only presets 210 spacing of 210 size of copper billet and copper billet again;It is of course also possible to preset the shape of copper billet 210 again.
Further, in step (S42), after entering step (S2), the copper billet in the edges of boards region 200 of wiring board is preset
The step of 210 spacing of 210 sizes and copper billet includes: according to third preset requirement to previous 210 size of copper billet and previous copper
210 spacing of block is handled and is obtained new 210 size of copper billet and new 210 spacing of copper billet.
Third preset requirement is specifically set as needed, such as:
210 spacing of 210 size of copper billet and copper billet is voluntarily adjusted according to the experience of staff;
The parameter setting table of comparisons obtained according to working experience is specifically selected;
Processing is optimized to 210 size of copper billet and 210 spacing of copper billet according to the optimization algorithm of setting.
Further, the step previous 210 size of copper billet and 210 spacing of copper billet handled according to third preset requirement
In rapid, processing is optimized to previous 210 size of copper billet and previous 210 spacing of copper billet based on default optimization algorithm.
Certainly, in the actual operation process, after optimization obtains data, it can be rounded or be retained default with further progress
The processing such as digit decimal point, which is not described herein again.
Further, in step (S2), the shape of copper billet 210 includes square, rectangle, bar shaped or circle.
It is of course also possible to be the other shapes being set as needed, those skilled in the art can be configured as needed,
To meet actual needs.
It should be noted that bar shaped here does not include rectangle above-mentioned.
When bar shaped is arranged, copper billet 210 is arranged in a long strip shape, and the copper billet 210 of strip is staggered and forms grid knot
Structure.
Further, the corresponding edges of boards region 200 in 220 position of tooling hole is tools area, after step (S4), also
Include:
(S51), the residual copper of third of tools area is calculated based on edges of boards design size and according to the 4th preset requirement
Rate simultaneously handles third residual copper ratio to obtain the residual copper data of third;
(S52), the residual copper data of third are compared with the first residual copper data, if meeting second party formula, execute step
Suddenly (S521);Otherwise, step (S522) is executed;
(S521), the edges of boards design size in current tool region is kept;
(S522), 210 size of copper billet of tools area is adjusted according to the 5th preset requirement and 210 spacing of copper billet and entered
Step (S51);
In step (S522), after entering step (S51), edges of boards design size is copper adjusted in step (S522)
210 spacing of 210 size of block and copper billet;
Second party formula are as follows:
d3=λ * d1;
Wherein, d3For the residual copper data of third.
The holes bit architectures such as 220 specific bit hole of tooling hole, between 210 size of copper billet and copper billet 210 in setting edges of boards region 200
Away from when, not consider tooling hole 220 influence.And in fact, due to tooling hole 220 presence, the institute of tooling hole 220 can be made in place
The residual copper ratio decline set, this is because, 220 position of tooling hole may occupy some or all of copper billet 210 space, because
This, copper billet 210 herein can not be processed, and then residual copper ratio herein is caused to decline, make the residual copper data of the third of tools area with
The residual copper data of the first of graphics field 100 are inconsistent;Meanwhile the presence of tooling hole 220 can also make to design copper in the position
There is incomplete (tooling hole 220 occupies the site location of copper billet 210, leads to incompleteness) in block 210, to make the size of copper billet 210
Become smaller, and then make subsequent plating, the current distribution at this and the current distribution of graphics field 100 are inconsistent, lead to copper thickness not
Unanimously.
Judgement is compared to the residual copper data of third and the first residual copper data by second party formula in the present embodiment, and solving should
Problem.
Certainly, as needed, the coefficient range of second party formula and the first equation can be different, carries out as needed
Setting.
In fact, the residual copper data of third are consistent with the first residual copper data, even if also the second residual copper data, the residual copper of third
Data and the first residual copper data three keep preset comformity relation, meet actual needs, which is not described herein again.
Further, in step (S522), 210 size of copper billet and copper billet of tools area are adjusted according to the 5th preset requirement
In the step of 210 spacing, 210 size of copper billet of tools area adjusted is greater than the minimum ruler of default copper billet 210 of tools area
It is very little.
Here the method for adjustment of 210 size of copper billet of tools area is given, i.e., directly increases the size of copper billet 210, such as
The incomplete copper billet 210 influenced by tooling hole 220 and adjacent complete copper billet 210 is set to merge into a bigger copper billet 210, thus
Meet the requirement corresponding with the first residual copper data holding of the residual copper data of third.
Further, in the first equation, the value of coefficient range is λ=1 ± 5%.
Those skilled in the art can be specifically arranged as needed, and which is not described herein again.
Further, λ=1 ± 3%.
According to actual processing needs, make to keep more close consistent between the second residual copper data and the first residual copper data
Property require, to meet more stringent processing quality requirement, promote the processing quality of product.
On the other hand, a kind of design method of wiring board is additionally provided, the edges of boards of wiring board use such as any one above-mentioned reality
The edges of boards design method for applying wiring board described in example is designed.
Edges of boards design is carried out using the edges of boards design method of wiring board above-mentioned, makes the edges of boards copper thickness of wiring board will not mistake
Greatly, it and avoids the problem that welding resistance back leak copper, improves the design level of wiring board.
In addition, additionally providing a kind of wiring board, wiring board uses the design method of the wiring board as described in above-described embodiment
It is designed and is process.
Since the design method using wiring board above-mentioned is designed and is process, thus obtained after making processing
The copper thickness in the edges of boards region 200 of wiring board is consistent with the copper thickness of graphics field 100, and solves welding resistance back plate border region
200 are easy the problem of leaking copper, improve the overall processing quality of wiring board.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of edges of boards design method of wiring board, which comprises the following steps:
(S1), the first residual copper ratio for obtaining the graphics field of wiring board default is wanted based on first residual copper ratio and according to first
It asks to form the first residual copper data;
(S2), the copper billet size and copper billet spacing in the edges of boards region of the wiring board are preset;
(S3), the second residual copper ratio and right is calculated based on the copper billet size and the copper billet spacing and according to the second preset requirement
Second residual copper ratio is handled to obtain the second residual copper data;
(S4), the described second residual copper data are matched with the described first residual copper data, if meeting the first equation, is executed
Step (S41);Otherwise, step (S42) is executed;
(S41), the copper billet size and the copper billet spacing in the edges of boards region are edges of boards design size;
(S42), into the step (S2);
First equation are as follows:
d2=λ * d1;
Wherein, d1For the first residual copper data, d2For the second residual copper data, λ is coefficient range.
2. the edges of boards design method of wiring board according to claim 1, which is characterized in that in the step (S2), preset
Before the copper billet size and copper billet spacing in the edges of boards region of the wiring board, further includes: preset the shape of the copper billet.
3. the edges of boards design method of wiring board according to claim 2, which is characterized in that in the step (S42), enter
After the step (S2), the step of presetting the copper billet size and copper billet spacing in the edges of boards region of the wiring board includes: basis
Third preset requirement is handled previous copper billet size and previous copper billet spacing and is obtained new copper billet size and new
Copper billet spacing.
4. the edges of boards design method of wiring board according to claim 3, which is characterized in that according to third preset requirement to elder generation
In the step of preceding copper billet size and copper billet spacing is handled, based on default optimization algorithm to previous copper billet size and previously
Copper billet spacing optimize processing.
5. the edges of boards design method of wiring board according to claim 2, which is characterized in that described in the step (S2)
The shape of copper billet includes square, rectangle, bar shaped or circle.
6. the edges of boards design method of wiring board according to claim 1, which is characterized in that tooling hole position is corresponding
The edges of boards region is tools area, after the step (S4), further includes:
(S51), the third for the tools area being calculated based on the edges of boards design size and according to the 4th preset requirement is residual
Copper rate simultaneously handles the third residual copper ratio to obtain the residual copper data of third;
(S52), the residual copper data of the third are compared with the described first residual copper data, if meeting second party formula, are held
Row step (S521);Otherwise, step (S522) is executed;
(S521), the edges of boards design size in current tool region is kept;
(S522), according to the 5th preset requirement adjust the tools area copper billet size and copper billet spacing and enter the step
Suddenly (S51);
In the step (S522), after entering the step (S51), the edges of boards design size is the step (S522)
In copper billet size and copper billet spacing adjusted;
The second party formula are as follows:
d3=λ * d1;
Wherein, d3For the residual copper data of third.
7. the edges of boards design method of wiring board according to claim 6, which is characterized in that in the step (S522), root
In the step of adjusting the copper billet size and copper billet spacing of the tools area according to the 5th preset requirement, the Accessorial Tools Storage adjusted
The copper billet size in domain is greater than the default copper billet minimum dimension of the tools area.
8. the edges of boards design method of wiring board according to claim 1-7, which is characterized in that first equation
In formula, the value of the coefficient range is λ=1 ± 5%.
9. a kind of design method of wiring board, which is characterized in that the edges of boards of the wiring board are used such as any one of claim 1-7
The edges of boards design method of the wiring board is designed.
10. a kind of wiring board, which is characterized in that the wiring board uses the design method of wiring board as claimed in claim 9
It is designed and is process.
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CN110519929A (en) * | 2019-08-26 | 2019-11-29 | 广州兴森快捷电路科技有限公司 | The edges of boards graphical design method and wiring board of wiring board |
CN114980511A (en) * | 2021-02-19 | 2022-08-30 | 珠海方正科技高密电子有限公司 | Circuit board manufacturing method and circuit board |
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KR20020025558A (en) * | 2000-09-29 | 2002-04-04 | 전세호 | Multi-layer PCB manufacturing process |
JP2002344104A (en) * | 2001-05-11 | 2002-11-29 | Sony Corp | Wiring board |
CN101772272A (en) * | 2008-12-30 | 2010-07-07 | 深圳玛斯兰电路科技实业发展有限公司 | Design technique for internal layer plate edge of multi-layer printing circuit board |
CN101778543A (en) * | 2010-02-04 | 2010-07-14 | 深南电路有限公司 | Multi-layer printed circuit board machining process |
CN102711370A (en) * | 2012-06-08 | 2012-10-03 | 镇江华印电路板有限公司 | Warp-preventing rigid printed circuit board |
CN104363696A (en) * | 2014-12-02 | 2015-02-18 | 高德(无锡)电子有限公司 | Multi-layer PCB (printed circuit board) |
CN107567182A (en) * | 2017-09-14 | 2018-01-09 | 广州兴森快捷电路科技有限公司 | Board-splicing process side and board joint method |
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CN110519929A (en) * | 2019-08-26 | 2019-11-29 | 广州兴森快捷电路科技有限公司 | The edges of boards graphical design method and wiring board of wiring board |
CN114980511A (en) * | 2021-02-19 | 2022-08-30 | 珠海方正科技高密电子有限公司 | Circuit board manufacturing method and circuit board |
CN114980511B (en) * | 2021-02-19 | 2023-05-12 | 珠海方正科技高密电子有限公司 | Circuit board manufacturing method and circuit board |
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