CN104363696A - Multi-layer PCB (printed circuit board) - Google Patents
Multi-layer PCB (printed circuit board) Download PDFInfo
- Publication number
- CN104363696A CN104363696A CN201410720747.4A CN201410720747A CN104363696A CN 104363696 A CN104363696 A CN 104363696A CN 201410720747 A CN201410720747 A CN 201410720747A CN 104363696 A CN104363696 A CN 104363696A
- Authority
- CN
- China
- Prior art keywords
- layer
- copper foil
- central
- edges
- foil layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 38
- 239000011889 copper foil Substances 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims description 14
- 238000003491 array Methods 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 abstract description 8
- 239000010949 copper Substances 0.000 abstract description 8
- 239000011162 core material Substances 0.000 description 3
- 235000010627 Phaseolus vulgaris Nutrition 0.000 description 2
- 244000046052 Phaseolus vulgaris Species 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 1
- 238000003325 tomography Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention relates to a multi-layer PCB (printed circuit board), comprising two copper foil layers, a plurality of core plates and a plurality of bonding layers, wherein the plurality of core plates and the plurality of bonding layers are arranged between the two copper foil layers at intervals; plate edges are respectively surrounded on the peripheries of the plurality of core plates; and a plurality of hexagonal choke edges are arranged on the plate edges and are tightly arranged. The multi-layer PCB is simple in structure and clever in design; the copper foil layers on the plate edges are small in interval and free of fault due to the hexagonal design; the core plates do not easily generate nonlinear deformation; and the residual copper rate is high, so that the PCB is not easily blocked on a horizontal line.
Description
Technical field
The present invention relates to a kind of PCB multilayer printed circuit board, belong to wiring board design technical field.
Background technology
PCB can add working edge when making, and the object of working edge is convenient artificial and machine operation.Edges of boards another one function for multi-layer PCB printed substrate core material stops gummosis.The tack coat meeting gummosis of plank plank in bonding processes, if gummosis too many plank pressing thickness can be partially thin, so internal layer plank working edge can add choked flow limit.At present, the design on choked flow limit mainly comprises two kinds:
1, choked flow limit is designed to grid or circle beans shape;
2. choked flow limit is designed to copper billet+flow-guiding mouth.
But when choked flow limit is designed to grid or circle beans shape, residual copper rate is low, and the interval between copper sheet and copper sheet is too large, and plank has nonlinear deformation after press, and if core material is thin, walk internal layer horizontal line and clamp understood by brown line; When choked flow limit is designed to copper billet+flow-guiding mouth, in pressing vacuum, because copper sheet interval is very little, the solvent in tack coat like this is not easy to take away, easily pressing bubble occurs.
Summary of the invention
The object of the invention is the shortcoming that working edge resistance flowing effect in order to solve multi-layer PCB printed substrate in prior art is bad, providing a kind of structure simple, the multi-layer PCB printed substrate with regular hexagon choked flow limit easy to use.
The present invention adopts following technical scheme: a kind of multi-layer PCB printed substrate, comprise two-layer copper foil layer, some pieces of central layers and some tack coats, be arranged at intervals with some pieces of central layers and some tack coats between described two-layer copper foil layer, the surrounding of described some pieces of central layers is surrounded respectively and is provided with edges of boards.
Further, described edges of boards are provided with several regular hexagon choked flow limits, described regular hexagon choked flow limit close-packed arrays.
Further, described multi-layer PCB printed substrate comprises the first copper foil layer and the second copper foil layer, the first central layer and the second central layer is provided with between first copper foil layer and the second copper foil layer, the first tack coat is provided with between first central layer and the first copper foil layer, the second tack coat is provided with between second central layer and the second copper foil layer, the 3rd tack coat is provided with between first central layer and the second central layer, the surrounding of the first central layer and the second central layer is surrounded respectively and is provided with edges of boards, edges of boards are provided with several regular hexagon choked flow limits, regular hexagon choked flow limit close-packed arrays.
Structure of the present invention is simple, designs ingenious, and the design of orthohexagonal choked flow limit makes that interval between the Copper Foil on edges of boards is little and without tomography, central layer has been not easy nonlinear deformation, and residual copper rate is high, therefore on a horizontal clamp is less likely to occur.
Accompanying drawing explanation
Fig. 1 is the structural representation of multi-layer PCB printed substrate.
Fig. 2 is core plate structure schematic diagram of the present invention.
Fig. 3 is edges of boards schematic diagram of the present invention.
Reference numeral: the first copper foil layer 1, first tack coat 2, first central layer 3, the 3rd tack coat 4, second central layer 5, second tack coat 6, second copper foil layer 7, edges of boards 8.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further illustrated.
As Figure 1-3, a kind of multi-layer PCB printed substrate, this multi-layer PCB printed substrate is by seven-layer structure, comprise the first copper foil layer 1 and the second copper foil layer 7, the first central layer 3 and the second central layer 5 is provided with between first copper foil layer 1 and the second copper foil layer 7, be provided with between first central layer 3 and the first copper foil layer 1 to be provided with between the second tack coat 6, first central layer 3 and the second central layer 5 between first tack coat 2, second central layer 5 and the second copper foil layer 7 and be provided with the 3rd tack coat 4.The upper and lower surface of the first central layer 3 is respectively arranged with copper foil circuit, the upper and lower surface of the second central layer 5 is provided with copper foil circuit.The surrounding of the first central layer 3 and the second central layer 5 is surrounded respectively and is provided with edges of boards 8, edges of boards 8 are provided with several regular hexagon choked flow limits, regular hexagon choked flow limit close-packed arrays, the gummosis that can prevent multi-layer PCB printed substrate from occurring in pressing process also makes central layer not easily deform simultaneously.
Claims (3)
1. a multi-layer PCB printed substrate, it is characterized in that: comprise two-layer copper foil layer, some pieces of central layers and some tack coats, be arranged at intervals with some pieces of central layers and some tack coats between described two-layer copper foil layer, the surrounding of described some pieces of central layers is surrounded respectively and is provided with edges of boards.
2. multi-layer PCB printed substrate as claimed in claim 1, it is characterized in that: described multi-layer PCB printed substrate comprises the first copper foil layer (1) and the second copper foil layer (7), the first central layer (3) and the second central layer (5) is provided with between first copper foil layer (1) and the second copper foil layer (7), the first tack coat (2) is provided with between first central layer (3) and the first copper foil layer (1), the second tack coat (6) is provided with between second central layer (5) and the second copper foil layer (7), the 3rd tack coat (4) is provided with between first central layer (3) and the second central layer (5), the surrounding of the first central layer (3) and the second central layer (5) is surrounded respectively and is provided with edges of boards (8).
3. multi-layer PCB printed substrate as claimed in claim 1 or 2, is characterized in that: described edges of boards are provided with several regular hexagon choked flow limits, described regular hexagon choked flow limit close-packed arrays.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410720747.4A CN104363696A (en) | 2014-12-02 | 2014-12-02 | Multi-layer PCB (printed circuit board) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410720747.4A CN104363696A (en) | 2014-12-02 | 2014-12-02 | Multi-layer PCB (printed circuit board) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104363696A true CN104363696A (en) | 2015-02-18 |
Family
ID=52530900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410720747.4A Pending CN104363696A (en) | 2014-12-02 | 2014-12-02 | Multi-layer PCB (printed circuit board) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104363696A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109121302A (en) * | 2018-09-28 | 2019-01-01 | 广州兴森快捷电路科技有限公司 | Edges of boards design method, the design method of wiring board and the wiring board of wiring board |
| CN109640548A (en) * | 2018-12-29 | 2019-04-16 | 广州兴森快捷电路科技有限公司 | Prepreg compression method and PCB construction |
| CN111669908A (en) * | 2020-07-02 | 2020-09-15 | 广德扬升电子科技有限公司 | A six-layer printed circuit board and its production method |
| CN112087861A (en) * | 2020-08-28 | 2020-12-15 | 瑞声新能源发展(常州)有限公司科教城分公司 | Multilayer LCP circuit board |
| CN115955776A (en) * | 2023-02-17 | 2023-04-11 | 江西景旺精密电路有限公司 | Process method of smart home multi-layer PCB products that can realize precise impedance control |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100003784A1 (en) * | 2008-07-04 | 2010-01-07 | Foxconn Advanced Technology Inc. | Method for mounting electronic component on printed circuit board |
| CN101772267A (en) * | 2008-12-30 | 2010-07-07 | 深圳玛斯兰电路科技实业发展有限公司 | Improvement method for wrinkled copper foil in compacting process of high-rise plates |
| CN201758487U (en) * | 2010-07-06 | 2011-03-09 | 深南电路有限公司 | Printed circuit board |
| CN202998650U (en) * | 2012-12-30 | 2013-06-12 | 胜宏科技（惠州）股份有限公司 | PCB internal layer thin substrate copper layer structure |
| CN203554780U (en) * | 2013-10-16 | 2014-04-16 | 北大方正集团有限公司 | An inner plate of a circuit board and the circuit board |
| CN103917062A (en) * | 2012-12-31 | 2014-07-09 | 深南电路有限公司 | Method for superposition positioning of multilayer circuit board |
| CN204244568U (en) * | 2014-12-02 | 2015-04-01 | 高德（无锡）电子有限公司 | A multi-layer PCB printed circuit board |
-
2014
- 2014-12-02 CN CN201410720747.4A patent/CN104363696A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100003784A1 (en) * | 2008-07-04 | 2010-01-07 | Foxconn Advanced Technology Inc. | Method for mounting electronic component on printed circuit board |
| CN101772267A (en) * | 2008-12-30 | 2010-07-07 | 深圳玛斯兰电路科技实业发展有限公司 | Improvement method for wrinkled copper foil in compacting process of high-rise plates |
| CN201758487U (en) * | 2010-07-06 | 2011-03-09 | 深南电路有限公司 | Printed circuit board |
| CN202998650U (en) * | 2012-12-30 | 2013-06-12 | 胜宏科技（惠州）股份有限公司 | PCB internal layer thin substrate copper layer structure |
| CN103917062A (en) * | 2012-12-31 | 2014-07-09 | 深南电路有限公司 | Method for superposition positioning of multilayer circuit board |
| CN203554780U (en) * | 2013-10-16 | 2014-04-16 | 北大方正集团有限公司 | An inner plate of a circuit board and the circuit board |
| CN204244568U (en) * | 2014-12-02 | 2015-04-01 | 高德（无锡）电子有限公司 | A multi-layer PCB printed circuit board |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109121302A (en) * | 2018-09-28 | 2019-01-01 | 广州兴森快捷电路科技有限公司 | Edges of boards design method, the design method of wiring board and the wiring board of wiring board |
| CN109121302B (en) * | 2018-09-28 | 2020-03-06 | 广州兴森快捷电路科技有限公司 | Circuit board edge design method and circuit board design method |
| CN109640548A (en) * | 2018-12-29 | 2019-04-16 | 广州兴森快捷电路科技有限公司 | Prepreg compression method and PCB construction |
| CN109640548B (en) * | 2018-12-29 | 2020-06-23 | 广州兴森快捷电路科技有限公司 | Prepreg laminating method and PCB structure |
| CN111669908A (en) * | 2020-07-02 | 2020-09-15 | 广德扬升电子科技有限公司 | A six-layer printed circuit board and its production method |
| CN112087861A (en) * | 2020-08-28 | 2020-12-15 | 瑞声新能源发展(常州)有限公司科教城分公司 | Multilayer LCP circuit board |
| CN115955776A (en) * | 2023-02-17 | 2023-04-11 | 江西景旺精密电路有限公司 | Process method of smart home multi-layer PCB products that can realize precise impedance control |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20150218 |
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| RJ01 | Rejection of invention patent application after publication |