CN109121302B - Circuit board edge design method and circuit board design method - Google Patents
Circuit board edge design method and circuit board design method Download PDFInfo
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- CN109121302B CN109121302B CN201811141393.2A CN201811141393A CN109121302B CN 109121302 B CN109121302 B CN 109121302B CN 201811141393 A CN201811141393 A CN 201811141393A CN 109121302 B CN109121302 B CN 109121302B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
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Abstract
The invention relates to a board edge design method of a circuit board and a design method of the circuit board. The board edge design method of the circuit board comprises the following steps: acquiring a first residual copper rate of the pattern area and forming first residual copper data; presetting the size and the distance between copper blocks in the plate edge area; calculating a second residual copper rate based on the size of the copper blocks and the spacing between the copper blocks, and forming second residual copper data; and matching the second residual copper data with the first residual copper data, wherein if the first equation is satisfied, the copper block size and the copper block interval of the plate edge area are the plate edge design size. After the first residual copper data of the pattern area are obtained, when the size and the distance of the copper blocks in the plate edge area are set, the second residual copper data and the first residual copper data in the set plate edge area meet a first equation, so that the second residual copper data and the first residual copper data keep a preset relation, the copper thickness in the subsequent processing of the two areas is consistent, and the problem of copper leakage easily caused after the solder mask is laid is solved.
Description
Technical Field
The invention relates to the technical field of circuit board processing, in particular to a method for designing a board edge of a circuit board and a method for designing the circuit board.
Background
A pcb (printed Circuit board), which is generally called a wiring board, also called a printed wiring board or a printed Circuit board, is a support for electronic components and a carrier for electrical connection of electronic components. With the rapid development of electronic products toward thinning and high performance, the requirements for the production of package substrates of circuit boards are also increasing.
However, the board edge design of the package substrate cannot meet the production requirement of the thick copper substrate, the problem that the difference between the copper thickness of the board edge area and the copper thickness of the pattern area is too large usually exists, the problem of false copper leakage exists in the board edge area after solder mask leveling, especially in the tool hole position, and the thin solder mask is easy to fall off in the subsequent process of substrate manufacturing, so that the quality of the product is reduced.
Disclosure of Invention
Accordingly, it is desirable to provide a board edge design method of a circuit board and a design method of a circuit board. The board edge design method of the circuit board can avoid the excessive copper thickness in the area of the board edge and avoid the occurrence of copper leakage; the design method of the circuit board adopts the design method of the board edge of the circuit board to design the board edge, and improves the overall design level of the circuit board.
The technical scheme is as follows:
on one hand, the board edge design method of the circuit board is provided, and comprises the following steps:
(S1) obtaining a first residual copper rate of the pattern area of the circuit board, and forming first residual copper data based on the first residual copper rate and according to a first preset requirement;
(S2), presetting the size and the distance of copper blocks in the edge area of the circuit board;
(S3), calculating a second residual copper rate according to a second preset requirement based on the size of the copper blocks and the distance between the copper blocks, and processing the second residual copper rate to obtain second residual copper data;
(S4), matching the second residual copper data with the first residual copper data, if the first equation is satisfied, executing the step (S41); otherwise, executing step (S42);
(S41) the size of the copper blocks in the plate edge area and the distance between the copper blocks are the design size of the plate edge;
(S42), go to step (S2);
the first equation is:
d2＝λ*d1；
wherein d is1As first residual copper data, d2And lambda is the coefficient range for the second residual copper data.
According to the board edge design method of the circuit board, after the first residual copper data of the pattern area are obtained, when the size and the distance of the copper blocks in the board edge area are set, the second residual copper data and the first residual copper data in the set board edge area meet a first equation, so that the second residual copper data and the first residual copper data keep a preset relation, the copper thickness in the subsequent processing of the two areas is ensured to be consistent, and the problem of copper leakage easily caused after the solder mask is laid is avoided.
The technical solution is further explained below:
in one embodiment, before the step (S2) of presetting the copper block size and the copper block pitch of the board edge area of the circuit board, the method further includes: the shape of the copper block is preset.
In one embodiment, after the step (S2) is proceeded to in the step (S42), the step of presetting the copper block size and the copper block pitch of the board edge area of the circuit board includes: and processing the previous copper block size and the previous copper block spacing according to a third preset requirement, and obtaining a new copper block size and a new copper block spacing.
In one embodiment, in the step of processing the previous copper block size and the previous copper block spacing according to the third preset requirement, the previous copper block size and the previous copper block spacing are optimized based on a preset optimization algorithm.
In one embodiment, in the step (S2), the shape of the copper block includes a square, a rectangle, a bar, or a circle.
In one embodiment, the board edge area corresponding to the position of the tool hole is a tool area, and after the step (S4), the method further includes:
(S51) calculating a third residual copper rate of the tool area according to a fourth preset requirement based on the design size of the plate edge, and processing the third residual copper rate to obtain third residual copper data;
(S52), comparing the third residual copper data with the first residual copper data, and if the third residual copper data and the first residual copper data satisfy the second equation, executing the step (S521); otherwise, executing step (S522);
(S521) maintaining a board edge design size of a current tool area;
(S522), adjusting the copper block size and the copper block spacing of the tool area according to a fifth preset requirement, and entering the step (S51);
in the step (S522), after proceeding to the step (S51), the board edge design size is the copper block size and the copper block pitch adjusted in the step (S522);
the second equation is:
d3＝λ*d1；
wherein d is3The third residual copper data.
In one embodiment, in the step (S522), in the step of adjusting the copper block size and the copper block pitch of the tool region according to the fifth preset requirement, the adjusted copper block size of the tool region is larger than the preset minimum copper block size of the tool region.
In one embodiment, in the first equation, the coefficient range is λ ═ 1 ± 5%.
On the other hand, a method for designing a circuit board is also provided, and the board edge of the circuit board is designed by adopting the method for designing the board edge of the circuit board according to any one of the embodiments.
According to the design method of the circuit board, the design of the board edge is carried out by adopting the board edge design method of the circuit board, so that the copper thickness of the board edge of the circuit board is not too large, the problem of copper leakage after solder resistance is avoided, and the design level of the circuit board is improved.
Drawings
FIG. 1 is a flowchart of a board edge design method of a circuit board in an embodiment;
FIG. 2 is a top view of a pattern area and a board edge area of a circuit board according to an embodiment;
fig. 3 is a schematic diagram of a board edge cross section of the circuit board designed in the embodiment.
Reference is made to the accompanying drawings in which:
100. pattern area, 200 board edge area, 210 copper block, 220 tool hole, 230 solder mask, 300 board body.
Detailed Description
Embodiments of the present invention are described in detail below with reference to the accompanying drawings:
it will be understood that when an element is referred to herein as being "secured" to another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1 to 3, an embodiment provides a board edge design method of a circuit board, including the following steps:
(S1) obtaining a first residual copper rate of the pattern area 100 of the circuit board, and forming first residual copper data based on the first residual copper rate and according to a first preset requirement;
(S2), presetting the size of the copper blocks 210 and the distance between the copper blocks 210 in the board edge area 200 of the circuit board;
(S3), calculating a second residual copper rate according to a second preset requirement based on the size of the copper blocks 210 and the distance between the copper blocks 210, and processing the second residual copper rate to obtain second residual copper data;
(S4), matching the second residual copper data with the first residual copper data, if the first equation is satisfied, executing the step (S41); otherwise, executing step (S42);
(S41) the size of the copper blocks 210 in the board edge area 200 and the distance between the copper blocks 210 are the design size of the board edges;
(S42), go to step (S2);
the first equation is:
d2＝λ*d1；
wherein d is1As first residual copper data, d2And lambda is the coefficient range for the second residual copper data.
After the first residual copper data of the pattern area 100 is obtained, when the size of the copper block 210 and the distance between the copper blocks 210 of the board edge area 200 are set, the second residual copper data and the first residual copper data of the set board edge area 200 meet a first equation, so that the second residual copper data and the first residual copper data keep a preset relation, the copper thickness in the subsequent processing of the two areas is ensured to be consistent, and the problem of copper leakage easily caused after the solder mask 230 is laid is avoided.
In order to improve the heat dissipation performance of the circuit board, the copper thickness of the board edge of the circuit board is generally increased, and the surface solder mask thickness is reduced. However, in this case, the copper thickness of the board edge area 200 of the circuit board is different from the copper thickness of the pattern area 100, so that the copper thicknesses of the board edge area 200 and the pattern area 100 are not consistent, and the actual requirement cannot be met; in addition, the solder mask layer 230 of the board edge area 200 after solder mask leveling is thin, so that the solder mask is easy to fall off in subsequent processing, thereby causing the problem of copper leakage or false copper leakage, and not only affecting the product appearance of the circuit board, but also affecting the product yield of the circuit board.
In this embodiment, the size of the copper blocks 210 and the distance between the copper blocks 210 in the board edge area 200 are set, and it is ensured that the second residual copper data in the board edge area 200 and the first residual copper data in the pattern area 100 are correspondingly set, so that the copper thicknesses of the board edge area 200 and the pattern area 100 are kept consistent during subsequent processing.
It should be noted that:
when the first residual copper data and the second residual copper data keep a preset consistent relation, namely meet a first equation, the current distribution of the graph area 100 and the current distribution of the plate edge area 200 can be kept consistent during subsequent electroplating processing, so that the copper thickness of the plate edge area 200 and the copper thickness of the graph area 100 are kept consistent, and the problem that the copper thickness of the plate edge area 200 is overlarge after traditional processing is solved;
meanwhile, the copper thickness of the pattern area 100 is consistent with that of the board edge area 200, and the copper thickness of the board edge area 200 is reduced relative to that of the traditional processing, so that the thickness of the solder mask layer 230 of the board edge area 200 can be relatively increased, and the problems of copper leakage and the like caused by the fact that the subsequent solder mask layer 230 is easy to fall off are avoided;
furthermore, as shown in fig. 3, which is a schematic cross-sectional view of the board body 300, the solder mask layer 230 at the position of the tool hole 220 is not collapsed, because compared with the conventional design mode, the solder mask layer 230 of the embodiment is relatively thickened, and the thickness of the copper block 210 is relatively reduced, so that collapse of the solder mask layer 230 at the corner position of the tool hole 220 after solder mask leveling is avoided, further avoiding the problem that the solder mask layer 230 falls off during subsequent processing, and improving the product quality.
In the step (S1), the first residual copper rate of the graphic area 100 may be directly obtained, or obtained by analyzing and calculating after obtaining corresponding data as needed, and a person skilled in the art may perform specific setting as needed, which is not described herein again.
The residual copper ratio refers to the ratio of the area of copper in one region to the area of the entire region, e.g., the residual copper ratio of the edge region 200 refers to the ratio of the area occupied by the copper blocks 210 in the edge region 200 to the area of the entire edge region 200.
The first formula is set to enable the second residual copper data and the first residual copper data to keep a preset proportional relation, and enable the second residual copper data to take values in a preset fluctuation range of the first residual copper data, so that even if the second residual copper data and the first residual copper data keep consistent, actual requirements are met. λ is a coefficient range, which can be set as desired, e.g., set to [0.95-1.05 ].
The first preset requirement is specifically set according to needs, for example, the first preset requirement can directly make the first residual copper rate become first residual copper data, or can be further processed to obtain the first residual copper data;
the second preset requirement refers to a mode of calculating the second residual copper rate and processing the second residual copper rate to obtain second residual copper data, setting is carried out according to needs so as to calculate the second residual copper rate, and the second residual copper rate is processed to obtain the second residual copper data.
In the step (S42), when the second residual copper data and the first residual copper data obtained by calculating and processing the current size of the copper block 210 and the distance between the copper blocks 210 do not satisfy the first equation, the process needs to enter the step (S2) to reset the size of the copper block 210 and the distance between the copper blocks 210 in the board edge area 200 of the circuit board, so as to obtain a new second residual copper rate, and process the second residual copper rate to obtain new second residual copper data, and then perform comparison and judgment until the consistency requirement of the first equation is met, which is not repeated herein.
Further, in the step (S2), before the step of presetting the size of the copper blocks 210 and the pitch of the copper blocks 210 in the board edge area 200 of the circuit board, the method further includes: the shape of the copper block 210 is preset.
For different specifications, different shapes of the copper blocks 210 may be set to meet actual requirements, and therefore, the shapes of the copper blocks 210 need to be preset before the sizes of the copper blocks 210 and the intervals between the copper blocks 210 are preset.
It should be noted that, in the step (S42), after the step (S2) is entered, the current shape of the copper block 210 may be maintained, and only the size of the copper block 210 and the pitch of the copper block 210 may be preset again; of course, the shape of the copper block 210 may also be re-preset.
Further, in the step (S42), after the step (S2) is proceeded to, the step of presetting the size of the copper bumps 210 and the pitch of the copper bumps 210 in the board edge area 200 of the circuit board includes: the previous copper block 210 size and the previous copper block 210 spacing are processed according to a third predetermined requirement and a new copper block 210 size and a new copper block 210 spacing are obtained.
The third preset requirement is specifically set as required, such as:
the size of the copper blocks 210 and the distance between the copper blocks 210 are automatically adjusted according to the experience of workers;
setting a comparison table according to parameters obtained from working experience for specific selection;
and optimizing the size of the copper blocks 210 and the distance between the copper blocks 210 according to a set optimization algorithm.
Further, in the step of processing the previous copper block 210 size and the previous copper block 210 pitch according to the third preset requirement, the previous copper block 210 size and the previous copper block 210 pitch are optimized based on a preset optimization algorithm.
Of course, in the actual operation process, after the data is obtained through optimization, the processing such as rounding or reserving the decimal point of the preset digit can be further performed, and details are not described here.
Further, in the step (S2), the shape of the copper block 210 includes a square, a rectangle, a bar, or a circle.
Of course, the shape may be other shapes according to the needs, and those skilled in the art can set the shape according to the needs to meet the actual needs.
It should be noted that the bar shape herein does not include the aforementioned rectangular shape.
When the strip-shaped copper blocks are arranged, the copper blocks 210 are arranged in a strip shape, and the strip-shaped copper blocks 210 are arranged in a staggered manner and form a grid structure.
Further, the board edge area 200 corresponding to the position of the tool hole 220 is a tool area, and after the step (S4), the method further includes:
(S51) calculating a third residual copper rate of the tool area according to a fourth preset requirement based on the design size of the plate edge, and processing the third residual copper rate to obtain third residual copper data;
(S52), comparing the third residual copper data with the first residual copper data, and if the third residual copper data and the first residual copper data satisfy the second equation, executing the step (S521); otherwise, executing step (S522);
(S521) maintaining a board edge design size of a current tool area;
(S522), adjusting the size of the copper blocks 210 and the distance between the copper blocks 210 in the tool area according to a fifth preset requirement, and entering the step (S51);
in the step (S522), after proceeding to the step (S51), the board edge design size is the copper block 210 size and the copper block 210 pitch adjusted in the step (S522);
the second equation is:
d3＝λ*d1；
wherein d is3The third residual copper data.
The tool holes 220 are designed to have a hole site structure such as a via hole, and the influence of the tool holes 220 is not considered when the size of the copper blocks 210 and the pitch of the copper blocks 210 in the board edge region 200 are set. Actually, the existence of the tool hole 220 may reduce the residual copper rate at the position of the tool hole 220, because the position of the tool hole 220 may occupy part or all of the space of the copper block 210, so that the copper block 210 cannot be processed, and the residual copper rate at the position is reduced, so that the third residual copper data of the tool area is inconsistent with the first residual copper data of the pattern area 100; meanwhile, the existence of the tool hole 220 can also cause the copper block 210 designed at the position to have a defect (the tool hole 220 occupies the position of the copper block 210, which causes the defect), so that the size of the copper block 210 is reduced, and further, the subsequent electroplating is performed, the current distribution at the position is inconsistent with the current distribution in the pattern area 100, which causes the copper thickness to be inconsistent.
In this embodiment, the third residual copper data and the first residual copper data are compared and determined by the second equation, so as to solve the problem.
Of course, the coefficient ranges of the second equation and the first equation may be different according to needs, and are set according to needs.
In fact, the third residual copper data and the first residual copper data are consistent, even if the second residual copper data, the third residual copper data and the first residual copper data all keep a preset consistency relationship, the actual needs are met, and the description is omitted here.
Further, in the step (S522), in the step of adjusting the size of the copper blocks 210 and the pitch of the copper blocks 210 in the tool region according to the fifth preset requirement, the adjusted size of the copper blocks 210 in the tool region is larger than the preset minimum size of the copper blocks 210 in the tool region.
The method for adjusting the size of the copper block 210 in the tool area is provided, that is, the size of the copper block 210 is directly increased, for example, the incomplete copper block 210 affected by the tool hole 220 and the adjacent complete copper block 210 are combined into a larger copper block 210, so as to meet the requirement that the third residual copper data and the first residual copper data are kept corresponding.
Further, in the first equation, the value of the coefficient range is λ 1 ± 5%.
The specific setting can be performed by those skilled in the art according to the needs, and is not described in detail here.
Further, λ is 1 ± 3%.
According to actual processing needs, the consistency requirement which is closer to the second residual copper data and the first residual copper data is kept, so that the processing quality requirement which is stricter is met, and the processing quality of the product is improved.
On the other hand, a method for designing a circuit board is also provided, and the board edge of the circuit board is designed by adopting the method for designing the board edge of the circuit board according to any one of the embodiments.
The board edge design is carried out by adopting the board edge design method of the circuit board, so that the copper thickness of the board edge of the circuit board is not too large, the problem of copper leakage after resistance welding is avoided, and the design level of the circuit board is improved.
In addition, a circuit board is provided, and the circuit board is designed and processed by adopting the design method of the circuit board in the embodiment.
Due to the fact that the circuit board is designed and processed by the circuit board design method, the copper thickness of the board edge area 200 of the processed circuit board is consistent with the copper thickness of the graph area 100, the problem that the board edge area 200 is prone to copper leakage after resistance welding is solved, and the overall processing quality of the circuit board is improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A board edge design method of a circuit board is characterized by comprising the following steps:
(S1) obtaining a first residual copper rate of a pattern area of the circuit board, and forming first residual copper data based on the first residual copper rate and according to a first preset requirement;
(S2), presetting the size and the distance of copper blocks in the edge area of the circuit board;
(S3), calculating a second residual copper rate according to a second preset requirement based on the size of the copper blocks and the distance between the copper blocks, and processing the second residual copper rate to obtain second residual copper data;
(S4), matching the second residual copper data with the first residual copper data, and if the first equation is satisfied, executing the step (S41); otherwise, executing step (S42);
(S41) the copper slug size and the copper slug spacing of the board edge area are board edge design sizes;
(S42), go to the step (S2);
the first equation is:
d2＝λ*d1；
wherein d is1As first residual copper data, d2For the second residual copper data, λ is a coefficient range, and the value of the coefficient range is λ ═ 1 ± 5%.
2. The board edge design method of claim 1, wherein before the step (S2) of presetting the copper block size and the copper block pitch of the board edge area of the circuit board, the method further comprises: and presetting the shape of the copper block.
3. The board edge design method of circuit board of claim 2, wherein the step (S42) of presetting the copper block size and copper block pitch of the board edge area of the circuit board after the step (S2) is entered comprises: and processing the previous copper block size and the previous copper block spacing according to a third preset requirement, and obtaining a new copper block size and a new copper block spacing.
4. The board edge design method of claim 3, wherein in the step of processing the previous copper block size and the previous copper block pitch according to a third preset requirement, the previous copper block size and the previous copper block pitch are optimized based on a preset optimization algorithm.
5. The board edge design method of a wiring board according to claim 2, wherein in the step (S2), the shape of the copper block includes a rectangle, a circle, or a strip shape excluding the rectangle.
6. The board edge design method of claim 1, wherein the board edge area corresponding to the position of the tool hole is a tool area, and after the step (S4), the method further comprises:
(S51), calculating to obtain a third residual copper rate of the tool area according to a fourth preset requirement based on the plate edge design size, and processing the third residual copper rate to obtain third residual copper data;
(S52), comparing the third residual copper data with the first residual copper data, and if the third residual copper data and the first residual copper data satisfy a second equation, executing the step (S521); otherwise, executing step (S522);
(S521) maintaining a board edge design size of a current tool area;
(S522), adjusting the copper block size and the copper block spacing of the tool area according to a fifth preset requirement, and entering the step (S51);
in the step (S522), after entering the step (S51), the board edge design size is the copper block size and the copper block pitch adjusted in the step (S522);
the second equation is:
d3＝λ*d1；
wherein d is3The third residual copper data.
7. The board edge design method of claim 6, wherein in the step (S522), in the step of adjusting the copper block size and the copper block pitch of the tool area according to a fifth preset requirement, the adjusted copper block size of the tool area is larger than a preset minimum copper block size of the tool area.
8. The board edge design method of the circuit board according to any one of claims 1 to 7, wherein a value of the coefficient range is λ ═ 1 ± 3%.
9. A method for designing a circuit board, wherein the board edge of the circuit board is designed by the method for designing the board edge of the circuit board according to any one of claims 1 to 7.
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| CN109121302A (en) | 2019-01-01 |
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