CN108667440A - A kind of Schmitt trigger circuit - Google Patents
A kind of Schmitt trigger circuit Download PDFInfo
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- CN108667440A CN108667440A CN201710190467.0A CN201710190467A CN108667440A CN 108667440 A CN108667440 A CN 108667440A CN 201710190467 A CN201710190467 A CN 201710190467A CN 108667440 A CN108667440 A CN 108667440A
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- drain electrode
- tube
- nmos tube
- phase inverter
- pmos tube
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Abstract
The present invention provides a kind of Schmitt trigger circuit, includes phase inverter, the first feedback circuit and the first phase inverter being made of metal-oxide-semiconductor；The phase inverter, the negative sense threshold voltage for determining trigger by its turnover voltage；The feedback circuit changes forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；First phase inverter, for the output signal shaping to the phase inverter.The Schmitt trigger circuit of the present invention realizes that the function of trigger, its circuit structure is simple, chip occupying area is few using less metal-oxide-semiconductor；Unidirectional threshold voltage can be adjusted by feeding back metal-oxide-semiconductor simultaneously, improve practicability；Carrying out shaping to output signal additionally by phase inverter keeps output signal more smooth.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of Schmitt trigger circuit.
Background technology
Schmidt trigger is a kind of special gate circuit, there are two threshold voltage, forward threshold voltage and negative sense threshold value electricity
Pressure.During input signal rises to high level from low level, the changed input voltage of its output state is made to be known as
Forward threshold voltage makes the input signal that its output state changes claim during input drops to low level from high level
For negative sense threshold voltage.
Using the positive feedback effect in Schmidt trigger state conversion process, edge can be changed slowly periodically
Signal becomes the steeper rectangular pulse signal in edge.Using its characteristic, Schmidt trigger often uses the input of high voltage integrated circuit
The MCU pwm signals exported can be converted to the input signal of coincident circuit requirement by end, and its lagging characteristics can prevent from inputting
Signal oscillating.
There are many existing Schmidt trigger realization methods, for example by introducing positive feedback in a comparator, introduces reference
Voltage and feedback resistance carry out threshold value voltage, or are used as by two phase inverter cascades and by metal-oxide-semiconductor and feed back to realize,
Cross complementary is also used to constitute Schmidt trigger circuit, but these schmidt triggers to changing difference amplifier load matched
The circuit structure of device is complicated, and component number is more, and area occupied is big.
Invention content
In order to overcome above-mentioned the shortcomings of the prior art, the main purpose of the present invention is to provide a kind of letters of circuit structure
Schmitt trigger circuit single, area is small.
To achieve the goals above, the present invention specifically uses following technical scheme：
The present invention provides a kind of Schmitt trigger circuit, includes phase inverter, the first feedback circuit being made of metal-oxide-semiconductor
With the first phase inverter；
The phase inverter, the negative sense threshold voltage for determining trigger by its turnover voltage；
First feedback circuit changes forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
First phase inverter, for the output signal shaping to the phase inverter.
Preferably, the phase inverter includes PMOS tube MP1, PMOS tube MP3 and NMOS tube MN1, the first feedback electricity
Road includes PMOS tube MP2, and first phase inverter includes PMOS tube MP4 and NMOS tube MN2；
The grid of the PMOS tube MP1 connects input terminal, and source electrode and substrate meet power vd D, and drain electrode connects the PMOS tube MP3's
Source electrode；The grid of the PMOS tube MP3 connects input terminal, and drain electrode connects the drain electrode of NMOS tube MN1, and substrate meets power vd D；The NMOS
The grid of pipe MN1 meets input terminal, source electrode and Substrate ground VSS；The grid of the PMOS tube MP4 connect PMOS tube MP3 drain electrode and
The drain electrode of NMOS tube MN1, source electrode and substrate meet power vd D, and drain electrode is connected simultaneously with the drain electrode of the NMOS tube MN2 as output
End；The grid of the NMOS tube MN2 meets the grid of PMOS tube MP4, source electrode and Substrate ground VSS；The grid of the PMOS tube MP2
The drain electrode of PMOS tube MP4 and the drain electrode of NMOS tube MN2 are connect, source electrode and substrate meet power vd D, and drain electrode connects the drain electrode of PMOS tube MP1
And the source electrode of PMOS tube MP3.
Include negative circuit, the second feedback being made of metal-oxide-semiconductor the present invention also provides another Schmitt trigger circuit
Circuit and the second phase inverter；
The negative circuit, the forward threshold voltage for determining trigger by its reversal voltage；
Second feedback circuit changes negative sense threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor.
Second phase inverter, for the output signal shaping to the negative circuit.
Preferably, the negative circuit includes PMOS tube MP5, NMOS tube MN3 and NMOS tube MN5, the first feedback electricity
Road includes NMOS tube MN6, and first phase inverter includes PMOS tube MP6 and NMOS tube MN4；
The grid of the NMOS tube MN5 meets input terminal, source electrode and Substrate ground VSS, and drain electrode connects the source electrode of NMOS tube MN3；
The grid of the NMOS tube MN3 connects input terminal, and source electrode connects the drain electrode of NMOS tube MN5, and drain electrode connects the drain electrode of PMOS tube MP5, substrate
It is grounded VSS；The grid of the PMOS tube MP5 connects input terminal, and source electrode and substrate meet power vd D；The grid of the NMOS tube MN4 connects
The drain electrode of the drain electrode and NMOS tube MN3 of PMOS tube MP5, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrodes of the PMOS tube connect
It connects while being used as output end；The grid of the PMOS tube MP6 connects the grid of NMOS tube MN4, and source electrode and substrate meet power vd D；Institute
The drain electrode that NMOS tube MN6 grids connect the drain electrode and NMOS tube MN4 of PMOS tube MP6 is stated, source electrode and Substrate ground VSS, drain electrode connect
The source electrode of the drain electrode and NMOS tube MN3 of NMOS tube MN5.
Compared with the prior art, Schmitt trigger circuit of the invention realizes trigger using less metal-oxide-semiconductor
Function, its circuit structure is simple, chip occupying area is few；Unidirectional threshold voltage can be adjusted by feeding back metal-oxide-semiconductor simultaneously
Section, improves practicability；Carrying out shaping to output signal additionally by phase inverter keeps output signal more smooth.
Description of the drawings
Fig. 1 is the Schmitt trigger circuit figure of the embodiment of the present invention 1；
Fig. 2 is the Schmidt trigger input and output schematic diagram of the embodiment of the present invention 1；
Fig. 3 is the Schmitt trigger circuit figure of the embodiment of the present invention 2；
Fig. 4 is the Schmidt trigger input and output schematic diagram of the embodiment of the present invention 2.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, not
For limiting the present invention.
Phase inverter turnover voltage：
Phase inverter scale factor：
Phase inverter scale factor increases, and turnover voltage reduces；Phase inverter scale factor reduces, and turnover voltage increases, here
The phase inverter is negative circuit or phase inverter in embodiment.
Embodiment 1
Include phase inverter, the first feedback electricity being made of metal-oxide-semiconductor the present embodiment provides a kind of Schmitt trigger circuit
Road and the first phase inverter.Wherein, phase inverter is used to determine the negative sense threshold voltage of trigger by its turnover voltage；Feedback electricity
Road is used to change forward threshold voltage by the breadth length ratio for changing metal-oxide-semiconductor；First phase inverter is used for the defeated of the phase inverter
Go out signal shaping.
As shown in Figure 1, phase inverter is made of PMOS tube MP1, PMOS tube MP3 and NMOS tube MN1, the first feedback circuit packet
PMOS tube MP2 is included, the first phase inverter is made of PMOS tube MP4 and NMOS tube MN2.
Wherein, the grid of PMOS tube MP1 connects input terminal, and source electrode and substrate meet power vd D, and drain electrode meets the PMOS tube MP3
Source electrode.The grid of PMOS tube MP3 connects input terminal, and drain electrode connects the drain electrode of NMOS tube MN1, and substrate meets power vd D.NMOS tube MN1
Grid meet input terminal, source electrode and Substrate ground VSS.The grid of PMOS tube MP4 meets drain electrode and the NMOS tube MN1 of PMOS tube MP3
Drain electrode, source electrode and substrate meet power vd D, and drain electrode is connected simultaneously with the drain electrode of NMOS tube MN2 as output end.NMOS tube MN2
Grid meet the grid of PMOS tube MP4, source electrode and Substrate ground VSS.The grid of PMOS tube MP2 connect PMOS tube MP4 drain electrode and
The drain electrode of NMOS tube MN2, source electrode and substrate meet power vd D, and drain electrode connects the drain electrode of PMOS tube MP1 and the source electrode of PMOS tube MP3.
In the present embodiment, input voltage is risen and two kinds of situations of input voltage decline is analyzed respectively, had：
(a) input voltage uphill process
As VIN=0, VOUT=O, VIN are sent to VOUT through two-stage phase inverter, then PMOS tube MP2 is connected, PMOS tube MP2
It is equivalent to same input with PMOS tube MP1, the two is in parallel, and phase inverter scale factor reduces, and forward threshold voltage increases.
Assuming that PMOS tube MP1 is in saturation region, the drain terminal voltage of PMOS tube MP1 is denoted as VX, then have：
VDD-VX＞ VDD-VIN- | VTP|；
I.e.：VX- VIN ＜ | VTP|；
PMOS tube MP3 cut-offs, it is assumed that invalid.
Assuming that PMOS tube MP1 is in linear zone, then have：
VDD-VX＜ VDD-VIN- | VTP|；
I.e.：VX- VIN ＞ | VTP|；
PMOS tube MP3 conductings.
Wherein, VDD is supply voltage, VXFor the drain terminal voltage of PMOS tube MP1, VIN is the input electricity of Schmidt trigger
Pressure, VTPFor the cut-in voltage of PMOS tube.
Assuming that PMOS tube MP3 is in saturation region, drain terminal voltage is denoted as VY, then have：
VX-VY＞ VX-VIN-|VTP|；
That is VY＜ VIN+ | VTP|；
Assuming that NMOS tube MN1 is in saturation region, then：
VIN-VTN＜ VY；
Wherein, VYFor PMOS tube MP3 drain terminal voltages, VTNFor the cut-in voltage of NMOS tube.
As long as it can be seen that meeting VIN-VTN＜ VY＜ VIN+ | VTP|, you can ensure that PMOS tube MP3 and NMOS tube MN1 locates simultaneously
In saturation region.
When input voltage VIN is less than forward threshold voltage VIH, it is 0 to export, and PMOS tube MP4 conductings are in linear zone.
Then PMOS tube MP1 electric currents are：
Wherein, I1For the electric current of PMOS tube MP1, VIHFor positive threshold；μpFor the mobility in hole, coxFor unit area grid
Layer capacitance is aoxidized, (W/L) is metal-oxide-semiconductor breadth length ratio.
PMOS tube MP3 electric currents are：
Wherein, I2For the electric current of PMOS tube MP3.
NMOS tube MN1 electric currents are：
Wherein, I3For the stream of NMOS tube MN1, μnFor the mobility of electronics, coxFor unit area gate oxide capacitance.
PMOS tube MP2 electric currents are：
The sum of PMOS tube MP1 and PMOS tube MP2 electric currents are equal to PMOS tube MP3 electric currents, and PMOS tube MP3 electric currents are equal to NMOS tube
MN1 electric currents.
I1+I4=I2=I3；
Simultaneous obtains
Pass through above-mentioned VIHAnd VXEquation, can find out forward threshold voltage, and result of calculation too complex is simple in the form of above-mentioned
It writes.
(b) input voltage declines process
Input is high level, is exported as high level, and PMOS tube MP2 cut-offs, phase inverter scale factor is constant, negative sense threshold value electricity
It presses constant.
The electric current I of PMOS tube MP11For：
The electric current I of PMOS tube MP32For：
The electric current I of NMOS tube MN13For：
The electric current of PMOS tube MP1, PMOS tube MP3 and NMOS tube MN1 are equal, have：
I1=I2=I3；
Simultaneous obtains：
In the present embodiment, it by phase inverter scale factor during change input voltage raising and lowering, generates sluggish
Voltage can get different forward threshold voltages and hysteresis voltage by adjusting the size of PMOS tube MP2.
The Schmitt trigger circuit of the present embodiment outputs and inputs signal as shown in Fig. 2, changing the size of PMOS tube MP2
It can get different forward threshold voltage VIN.When increasing PMOS tube MP2, VIH curves move right, when reduction PMOS tube MP2's
When size, VIH curves are moved to the left.
Embodiment 2
The present embodiment provides a kind of Schmidt trigger, include the negative circuit being made of metal-oxide-semiconductor, the second feedback circuit and
Second phase inverter.Wherein, negative circuit is used to determine the forward threshold voltage of trigger by its reversal voltage；Second feedback electricity
Road is used to change negative sense threshold voltage by the breadth length ratio for changing metal-oxide-semiconductor；Second phase inverter is used for the defeated of the negative circuit
Go out signal shaping.
As shown in figure 3, the grid of NMOS tube MN5 meets input terminal, source electrode and Substrate ground VSS, drain electrode connects NMOS tube MN3's
Source electrode.The grid of NMOS tube MN3 connects input terminal, and source electrode connects the drain electrode of NMOS tube MN5, and drain electrode connects the drain electrode of PMOS tube MP5, substrate
It is grounded VSS.The grid of PMOS tube MP5 connects input terminal, and source electrode and substrate meet power vd D.The grid of NMOS tube MN4 connects PMOS tube
The drain electrode of the drain electrode and NMOS tube MN3 of MP5, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrodes of the PMOS tube connect simultaneously
As output end.The grid of PMOS tube MP6 connects the grid of NMOS tube MN4, and source electrode and substrate meet power vd D.NMOS tube MN6 grids
Meet the drain electrode of the drain electrode and NMOS tube MN4 of PMOS tube MP6, source electrode and Substrate ground VSS, drain electrode connect NMOS tube MN5 drain electrode and
The source electrode of NMOS tube MN3.
In the present embodiment, input voltage is risen and two kinds of situations of input voltage decline is analyzed respectively, had：
(a) input voltage uphill process
As VIN=0, VOUT=O, NMOS tube MN6 cut-offs at this time, phase inverter scale factor is constant, forward threshold voltage
It is constant.
Forward threshold voltage is denoted as VIH, NMOS tube MN5 drain terminal voltages are denoted as VX。
The then electric current I of NMOS tube MN51For：
The electric current I of NMOS tube MN32For：
The electric current I of PMOS tube MP53For：
Wherein, μnFor electron mobility, coxFor unit area gate oxide capacitance, (W/L) is metal-oxide-semiconductor breadth length ratio.
Since the electric current of NMOS tube MN5, NMOS tube MN3 and PMOS tube MP5 are equal, then：
I1=I2=I3；
Simultaneous obtains：
(b) input voltage declines process
As VIN=1, VOUT=1, VIN are sent to VOUT through two-stage phase inverter, then NMOS tube MN6 is connected, then NMOS tube
MN6 and NMOS tube MN5 is equivalent to same input, and the two is in parallel, and phase inverter scale factor increases, and turnover voltage reduces.
Negative sense threshold voltage is denoted as VIL, the drain terminal voltage of NMOS tube MN5 is denoted as VX。
Then the electric current of NMOS tube MN5 is：
The electric current I of NMOS tube MN32For：
The electric current I of PMOS tube MP53For：
The electric current I of NMOS tube MN64For：
NMOS tube MN3 electric currents are equal to by the sum of NMOS tube MN5 and NMOS tube MN6 electric currents, NMOS tube MN3 electric currents are equal to PMOS
Pipe MP5 electric currents, obtain：
I1+I4=I2=I3；
Simultaneous obtains：
Pass through above-mentioned VILAnd VXEquation, can find out negative sense threshold voltage, and result of calculation too complex is simple in the form of above-mentioned
It writes.
In the present embodiment, it by phase inverter scale factor during change input voltage raising and lowering, generates sluggish
Voltage adjusts the size of NMOS tube MN6, can get different negative sense threshold voltages and hysteresis voltage.
The Schmitt trigger circuit input and output schematic diagram of the present embodiment is as shown in figure 4, change the size of NMOS tube MN6
It can get different negative sense threshold voltage VIL.When the size for increasing NMOS tube MN6, VIL curves are moved to the left, and reduce NMOSMN6 pipes
Size, VIL curves move right.
The foregoing is only a preferred embodiment of the present invention, but scope of protection of the present invention is not limited thereto,
Any one skilled in the art in the technical scope disclosed by the present invention, the change or replacement that can be readily occurred in,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with scope of the claims
Subject to.
Claims (4)
1. a kind of Schmitt trigger circuit, which is characterized in that include phase inverter, the first feedback circuit being made of metal-oxide-semiconductor
With the first phase inverter；
The phase inverter, the negative sense threshold voltage for determining trigger by its turnover voltage；
First feedback circuit changes forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
First phase inverter, for the output signal shaping to the phase inverter.
2. Schmitt trigger circuit according to claim 1, which is characterized in that the phase inverter includes PMOS tube
MP1, PMOS tube MP3 and NMOS tube MN1, first feedback circuit include PMOS tube MP2, and first phase inverter includes PMOS
Pipe MP4 and NMOS tube MN2；
The grid of the PMOS tube MP1 connects input terminal, and source electrode and substrate meet power vd D, and drain electrode connects the source of the PMOS tube MP3
Pole；The grid of the PMOS tube MP3 connects input terminal, and drain electrode connects the drain electrode of NMOS tube MN1, and substrate meets power vd D；The NMOS tube
The grid of MN1 meets input terminal, source electrode and Substrate ground VSS；The grid of the PMOS tube MP4 connect PMOS tube MP3 drain electrode and
The drain electrode of NMOS tube MN1, source electrode and substrate meet power vd D, and drain electrode is connected simultaneously with the drain electrode of the NMOS tube MN2 as output
End；The grid of the NMOS tube MN2 meets the grid of PMOS tube MP4, source electrode and Substrate ground VSS；The grid of the PMOS tube MP2
The drain electrode of PMOS tube MP4 and the drain electrode of NMOS tube MN2 are connect, source electrode and substrate meet power vd D, and drain electrode connects the drain electrode of PMOS tube MP1
And the source electrode of PMOS tube MP3.
3. a kind of Schmitt trigger circuit, which is characterized in that include the negative circuit being made of metal-oxide-semiconductor, the second feedback circuit
With the second phase inverter；
The negative circuit, the forward threshold voltage for determining trigger by its reversal voltage；
Second feedback circuit changes negative sense threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
Second phase inverter, for the output signal shaping to the negative circuit.
4. Schmitt trigger circuit according to claim 3, which is characterized in that the negative circuit includes PMOS tube
MP5, NMOS tube MN3 and NMOS tube MN5, first feedback circuit include NMOS tube MN6, and first phase inverter includes PMOS
Pipe MP6 and NMOS tube MN4；
The grid of the NMOS tube MN5 meets input terminal, source electrode and Substrate ground VSS, and drain electrode connects the source electrode of NMOS tube MN3；It is described
The grid of NMOS tube MN3 connects input terminal, and source electrode connects the drain electrode of NMOS tube MN5, and drain electrode connects the drain electrode of PMOS tube MP5, Substrate ground
VSS；The grid of the PMOS tube MP5 connects input terminal, and source electrode and substrate meet power vd D；The grid of the NMOS tube MN4 meets PMOS
The drain electrode of the drain electrode and NMOS tube MN3 of pipe MP5, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrode connections of the PMOS tube are same
Shi Zuowei output ends；The grid of the PMOS tube MP6 connects the grid of NMOS tube MN4, and source electrode and substrate meet power vd D；It is described
NMOS tube MN6 grids meet the drain electrode of the drain electrode and NMOS tube MN4 of PMOS tube MP6, source electrode and Substrate ground VSS, and drain electrode meets NMOS
The source electrode of the drain electrode and NMOS tube MN3 of pipe MN5.
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| CN201710190467.0A CN108667440A (en) | 2017-03-28 | 2017-03-28 | A kind of Schmitt trigger circuit |
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| CN112526581A (en) * | 2020-11-26 | 2021-03-19 | 重庆邮电大学 | Time discriminator suitable for radiation detection front-end reading circuit |
| CN112783243A (en) * | 2019-11-04 | 2021-05-11 | 圣邦微电子（北京）股份有限公司 | Threshold voltage precision improving circuit |
| CN113114173A (en) * | 2021-03-31 | 2021-07-13 | 成都锐成芯微科技股份有限公司 | Schmitt trigger |
| CN113131905A (en) * | 2019-12-30 | 2021-07-16 | 圣邦微电子（北京）股份有限公司 | Schmitt trigger circuit |
| CN113381739A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable positive and negative threshold voltages |
| CN113381738A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable negative threshold voltage |
| CN113381737A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable forward threshold voltage |
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| WO2022116416A1 (en) * | 2020-12-01 | 2022-06-09 | 深圳市紫光同创电子有限公司 | Schmitt trigger |
| CN116886091A (en) * | 2023-06-28 | 2023-10-13 | 江苏帝奥微电子股份有限公司 | Logic threshold judging circuit and judging method thereof |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4563594A (en) * | 1982-07-30 | 1986-01-07 | Tokyo Shibaura Denki Kabushiki Kaisha | Schmitt trigger circuit using MOS transistors and having constant threshold voltages |
| KR870001310U (en) * | 1985-06-28 | 1987-02-20 | 삼성반도체통신 주식회사 | High-speed Schmitt trigger circuit using CMOS |
| JPH07193470A (en) * | 1993-12-27 | 1995-07-28 | Hitachi Ltd | Schmitt buffer circuit |
| JPH10163826A (en) * | 1996-12-03 | 1998-06-19 | Fujitsu Ltd | Driving method of cmos inverter and schmitt trigger circuit |
| JP2009124537A (en) * | 2007-11-16 | 2009-06-04 | Fujitsu Microelectronics Ltd | Schmitt circuit |
| CN103066955A (en) * | 2012-12-17 | 2013-04-24 | 广州慧智微电子有限公司 | Small-sized and quickly-turning Schmitt trigger circuit used for silicon on insulator technique |
| CN105680829A (en) * | 2015-12-31 | 2016-06-15 | 峰岹科技（深圳）有限公司 | Schmitt trigger circuit |
| CN207039555U (en) * | 2017-03-28 | 2018-02-23 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
-
2017
- 2017-03-28 CN CN201710190467.0A patent/CN108667440A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4563594A (en) * | 1982-07-30 | 1986-01-07 | Tokyo Shibaura Denki Kabushiki Kaisha | Schmitt trigger circuit using MOS transistors and having constant threshold voltages |
| KR870001310U (en) * | 1985-06-28 | 1987-02-20 | 삼성반도체통신 주식회사 | High-speed Schmitt trigger circuit using CMOS |
| JPH07193470A (en) * | 1993-12-27 | 1995-07-28 | Hitachi Ltd | Schmitt buffer circuit |
| JPH10163826A (en) * | 1996-12-03 | 1998-06-19 | Fujitsu Ltd | Driving method of cmos inverter and schmitt trigger circuit |
| JP2009124537A (en) * | 2007-11-16 | 2009-06-04 | Fujitsu Microelectronics Ltd | Schmitt circuit |
| CN103066955A (en) * | 2012-12-17 | 2013-04-24 | 广州慧智微电子有限公司 | Small-sized and quickly-turning Schmitt trigger circuit used for silicon on insulator technique |
| CN105680829A (en) * | 2015-12-31 | 2016-06-15 | 峰岹科技（深圳）有限公司 | Schmitt trigger circuit |
| CN207039555U (en) * | 2017-03-28 | 2018-02-23 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
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| CN112783243A (en) * | 2019-11-04 | 2021-05-11 | 圣邦微电子（北京）股份有限公司 | Threshold voltage precision improving circuit |
| CN113131905B (en) * | 2019-12-30 | 2022-08-16 | 圣邦微电子（北京）股份有限公司 | Schmitt trigger circuit |
| CN113131905A (en) * | 2019-12-30 | 2021-07-16 | 圣邦微电子（北京）股份有限公司 | Schmitt trigger circuit |
| CN112526581A (en) * | 2020-11-26 | 2021-03-19 | 重庆邮电大学 | Time discriminator suitable for radiation detection front-end reading circuit |
| WO2022116416A1 (en) * | 2020-12-01 | 2022-06-09 | 深圳市紫光同创电子有限公司 | Schmitt trigger |
| CN113114173A (en) * | 2021-03-31 | 2021-07-13 | 成都锐成芯微科技股份有限公司 | Schmitt trigger |
| CN113381738A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable negative threshold voltage |
| CN113381737A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable forward threshold voltage |
| CN113381739A (en) * | 2021-06-25 | 2021-09-10 | 上海威固信息技术股份有限公司 | Schmitt trigger with adjustable positive and negative threshold voltages |
| CN114006605A (en) * | 2021-12-31 | 2022-02-01 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
| CN114006605B (en) * | 2021-12-31 | 2022-05-10 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
| EP4290772A1 (en) * | 2022-06-06 | 2023-12-13 | MediaTek Inc. | Low power clock buffer architecture |
| CN116886091A (en) * | 2023-06-28 | 2023-10-13 | 江苏帝奥微电子股份有限公司 | Logic threshold judging circuit and judging method thereof |
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