CN104300949A - Low-voltage resetting circuit for radio frequency chip of internet of things - Google Patents
Low-voltage resetting circuit for radio frequency chip of internet of things Download PDFInfo
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- CN104300949A CN104300949A CN201410420601.8A CN201410420601A CN104300949A CN 104300949 A CN104300949 A CN 104300949A CN 201410420601 A CN201410420601 A CN 201410420601A CN 104300949 A CN104300949 A CN 104300949A
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- enhancement mode
- nmos tube
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Abstract
The invention belongs to the technical field of integrated circuits, and relates to a low-voltage resetting circuit used for a radio frequency chip of the internet of things. The circuit comprises a power voltage comparison circuit and a filter shaping circuit, wherein the power voltage comparison circuit is composed of a reinforced tube and a dissipation tube. The low-voltage resetting circuit is characterized in that due to the fact that the threshold value of the reinforced tube and the threshold value of the dissipation tube have opposite temperature characteristics, and output turn-over voltage values do not change with temperature; according to the characteristic that on-resistance of a dissipation NMOS tube with a short-circuited gate source is large, work currents of the circuit are small, and static power consumption is low.
Description
Technical field
The invention belongs to technical field of integrated circuits, relate to a kind of Internet of Things radio frequency chip low-voltage reset circuit, be suitable for being built in the chip reset circuit relevant with low power consumption high-precision such as single-chip microcomputer, ROM, RAM, DSP, especially accommodate and be applied on the high all kinds of mobile units of power consumption requirements, as mobile phone, notebook computer etc.
Background technology
As everyone knows, low-voltage reset circuit detects when service voltage changes to a certain set point to produce reset signal.When we set this standard voltage value, wish that circuit working in any environment, reset signal can be produced when this standard voltage value.In the voltage detecting circuit of prior art, use bandgap voltage reference (Bandgap) structure to be easy to meet this condition, but power consumption is often larger, about tens uA, are difficult to the requirement meeting low power dissipation design (power consumption is less than 0.5uA).If reduce power consumption, the resistance of high value must be used, will certainly chip area be increased.
Shown in Figure 1, this is the electrical schematic diagram of a kind of voltage detecting circuit of prior art.This voltage detecting circuit is made up of reference voltage circuit, resistor voltage divider circuit, comparator.VDD obtains voltage VIN through resistance R1 and resistance R2 dividing potential drop, and connect with comparator "+", comparator "-" connects with reference voltage V REF.
The operation principle of above-mentioned voltage detecting circuit is: when VIN is lower than VREF, and it is low level that comparator exports VOUT, and when VIN is higher than VREF, it is high level that comparator exports VOUT.The change of VDD causes VIN magnitude of voltage linear change by resistance R1 and resistance R2 dividing potential drop, and reference voltage V REF is not with VDD change, and the level change according to VOUT realizes voltage detecting function.
Although above-mentioned prior art low-voltage reset circuit can change at service voltage, (decline or rise) produces reset signal to during a certain set point, and the defect existed in actual applications is:
1., for ensureing low-power consumption, resistor voltage divider circuit and reference voltage source inside adopt high resistance measurement, and chip area can be very large;
2. for ensureing that reference voltage value does not vary with temperature, adopt traditional bandgap voltage reference (Bandgap) structure, general about tens uA of this structure power consumption, cannot realize low-power consumption;
Summary of the invention
The object of the present invention is to provide that a kind of chip area is minimum, low-power consumption and be applicable to the reset circuit that Internet of Things radio-frequency apparatus uses.It can ensure that when variations in temperature the output switching activity magnitude of voltage of circuit is substantially constant, does not achieve power consumption lower than 0.5uA with high resistance measurement.
Internet of Things radio frequency chip low-voltage reset circuit of the present invention comprises: supply voltage comparison circuit and filtering shaping circuit.
Described supply voltage comparison circuit comprises: the first enhancement mode NMOS tube, the first enhancement mode PMOS, the first depletion type NMOS tube, the second depletion type NMOS tube, and the first electric capacity and the second electric capacity;
The drain terminal of described first enhancement mode PMOS connects the drain terminal of the first depletion type NMOS tube, connects the grid end of the first enhancement mode NMOS tube simultaneously, drain terminal, the grid end of the first enhancement mode PMOS all connect power supply, the grid end of the first depletion type NMOS tube, the equal ground connection of source, the source ground connection of the first enhancement mode NMOS tube, drain terminal connect the grid end of the second depletion type NMOS tube and source and export comparative voltage, and the second depletion type NMOS tube leaks termination power.Grid end, the negativing ending grounding of the first electric capacity C1 positive termination first enhancement mode NMOS tube, the positive termination power of the second electric capacity, negative terminal connect output comparative voltage;
Preferably, the breadth length ratio of depletion type first NMOS tube and the first enhancement mode PMOS must meet the requirement of formula 1,
--------1
In formula 1,
be the breadth length ratio of the first depletion type NMOS tube,
be the breadth length ratio of the first enhancement mode PMOS, Vthd1 is the threshold voltage of depletion type NMOS tube, and Vthn1 is the threshold voltage of enhancement mode NMOS tube, and Vthp1 is the threshold voltage of enhancement mode PMOS, and T represents temperature.
In CMOS production technology, | Vthd1| is positive temperature coefficient value, Vthn1 and Vthp1 is negative temperature coefficient value, therefore
| Vthd1|/
t be normal number,
vthn1/
t and
vthp1/
t is negative constant, therefore, utilizes enhancement mode pipe to have contrary temperature characterisitic with the threshold value of depletion type pipe, meets the requirement of formula 1, and vdd voltage value when can obtain the output signal upset of circuit does not vary with temperature
Described filtering shaping circuit comprises: second, third, the 4th and the 5th enhancement mode PMOS, and second, third, the 4th and the 5th enhancement mode NMOS tube;
The grid end of described second enhancement mode NMOS tube, the 3rd enhancement mode NMOS tube, the second enhancement mode PMOS, the 3rd enhancement mode PMOS connects the output comparative voltage of described supply voltage comparison circuit, the source termination power of the second enhancement mode PMOS, drain terminal connect the source of the 3rd enhancement mode PMOS and the 4th enhancement mode PMOS, the drain terminal of the 3rd enhancement mode PMOS connects the drain terminal of the second enhancement mode NMOS tube, the source of the second enhancement mode NMOS tube connects the drain terminal of the third and fourth enhancement mode NMOS tube, the source ground connection of the 3rd enhancement mode NMOS tube; The drain terminal of the 3rd enhancement mode PMOS and the second enhancement mode NMOS tube and the grid of the 4th enhancement mode PMOS and the 4th enhancement mode NMOS tube receive output signal; The drain terminal of the 4th enhancement mode PMOS receives the drain terminal of the 5th enhancement mode NMOS tube, the source ground connection of the 5th enhancement mode NMOS tube, grid termination power, the drain terminal of the 4th enhancement mode NMOS tube connects the drain terminal of the 5th enhancement mode PMOS, the source termination power of the 5th enhancement mode PMOS, grid end ground connection.
The present invention, owing to have employed above-mentioned technical scheme, makes it compared with prior art, has following advantage and good effect:
1. low-voltage reset value of the present invention is only relevant with the threshold value of enhancement mode metal-oxide-semiconductor and depletion type MOS tube, and technique is once determine, voltage reset value is also determined, can obtain very high precision;
2. the present invention is owing to adopting enhancement mode metal-oxide-semiconductor and depletion type MOS tube, and its threshold value has contrary temperature characterisitic, can obtain the voltage detecting value of Low Drift Temperature;
3. the present invention replaces high resistance measurement owing to adopting depletion type MOS tube, and the conducting resistance of the depletion type MOS tube of grid source short circuit is very big, easy realizing circuit low-power consumption;
4, the present invention is not owing to using high resistance measurement, and chip area is very little, is conducive to the high integration of realizing circuit.
Accompanying drawing explanation
By a following embodiment to Internet of Things radio frequency chip low-voltage reset circuit of the present invention in conjunction with the description of its accompanying drawing, object of the present invention, specific structural features and advantage can be understood further.Wherein, accompanying drawing is:
Fig. 1 is the electrical schematic diagram of prior art low-voltage reset circuit;
Fig. 2 is the electrical schematic diagram of the low-voltage reset circuit of low power consumption high-precision of the present invention.
Embodiment
Shown in Figure 2, this is the circuit theory diagrams of Internet of Things radio frequency chip low-voltage reset circuit of the present invention.Circuit comprises: supply voltage comparison circuit and filtering shaping circuit.
Described supply voltage comparison circuit comprises: the first enhancement mode NMOS tube N1, the first enhancement mode PMOS P1, the first depletion type NMOS tube D1, the second depletion type NMOS tube D2, and the first electric capacity C1 and the second electric capacity C2.The drain terminal of P1 connects the drain terminal of D1 at VA place, connect the grid end of N1 simultaneously, drain terminal, the grid end of P1 all meet VDD, the grid end of D1, source all meet GND, and the drain terminal of N1 connects grid end, the source of D2 at VB place, connect the grid end of N2, N3, P2, P3 in filtering shaping circuit simultaneously, the drain terminal of D2 meets VDD, the source of N1 meets GND, and electric capacity C1 two ends connect GND and VA two point respectively, and electric capacity C2 two ends connect VDD and VB two point respectively.VB is the output of voltage comparator circuit.
The operation principle of supply voltage comparison circuit is:
For P1, D1 branch road, Id1=Ip1 (formula 2)
When VDD is greater than a certain value, make D1, E1 enters saturated service area, now
Id1=1/2μCox(W/L)
d1(Vgsd1-Vthd1)
2
=1/2 μ Cox (W/L)
d1(Vthd1)
2(formula 3)
Ip1=1/2 μ Cox (W/L)
p1(Vgsp1-Vthp1)
2(formula 4)
Formula 3, formula 4 are substituted into formula 2 and obtain
(formula 5)
Due to the voltage VA=VDD-Vgsp1 (formula 6) of VA point
For N1 pipe, when VDD is greater than a certain value,
VA=Vgsn1=Vthn1 (formula 7)
The conducting of N1 pipe, enters saturation region,
Vdsn1=Vgsn1-Vthn1=0 (formula 8)
N1 pipe exports VB by high step-down.
Obtained by (formula 5), (formula 6), formula (7), (formula 8)
VDD=VA+Vgsp1=Vgsn1+Vgsp1
=Vthn1+Vgsp1
=
(formula 9)
Formula 9 pairs of temperature differentiates, can obtain
(formula 10)
Because CMOS technology is arranged, exhausting the threshold voltage of pipe D1 | Vthd1| is positive temperature coefficient value, threshold voltage vt hp1 and Vthn1 of enhancement mode pipe N1, P1 is negative temperature coefficient value, therefore
| Vthd1|/
t be normal number,
vthp1/
t and
vthn1/
t is negative constant.Vdd voltage value when VB is overturn does not vary with temperature, and formula 10 should equal 0, can obtain thus
(formula 11)
Therefore, as long as (W/L) ratio of D1 and P1 meets formula 11 requirement, vdd voltage value when VB just can be made to overturn does not vary with temperature, and reaches accurate voltage trigging signal.
When VDD is less than a certain value, as above-mentioned principle is consistent, VB upset uprises from low.
The electric current of D1, P1 branch road and D2, N1 branch road determines primarily of D1, D2, and D1, D2 electric current is determined by its Vthd, according to formula 2, selected less breadth length ratio W/L, can obtain very little D1, D2 electric current, the quiescent dissipation of whole circuit within control 0.5uA, can well realize low-power consumption.
At VDD from 0V rising time, because electric capacity C1 exists, electric capacity C1 both end voltage can not be suddenlyd change, and VA voltage still keeps 0V, and N1 closes; Because electric capacity C2 exists, electric capacity C2 both end voltage can not be suddenlyd change, and VB voltage keeps VDD, and the initial condition VB end that therefore can ensure to power on is high level.
Described filtering shaping circuit comprises: second, third, the 4th and the 5th enhancement mode PMOS P2, P3, P4 and P5, and second, third, the 4th and the 5th NMOS tube N2, N3, N4 and N5.The source of grid connection VB, the P2 of P2, P3, N2, N3 meets VDD, and P2 drain terminal connects the source of P3 and P4, and the drain terminal of P3 connects the drain terminal of N2, and the source of N2 connects the drain terminal of N3 and N4, and the source of N3 meets GND.Meanwhile, the drain terminal of P3 and N2 and the grid of P4 and N4 receive output signal VOUT.The drain terminal of P4 receives the drain terminal of N5, and the source of N5 meets GND, the drain terminal of grid termination VDD, N4 connects the drain terminal of P5, and P5 source meets VDD, grid termination GND.
The effect of filtering shaping circuit carries out shaping to the voltage of VB end, and filtering VB holds the burr shake produced during level upset, prevents the misoperation of subsequent conditioning circuit.The operation principle of filtering shaping circuit is as follows.
First analyze the process of VB terminal voltage from liter above freezing: initial condition VB=0, P2 ﹑ P3 conducting, N2 ﹑ N3 ends, and therefore VOUT exports high level, and P4 is ended, and N4 conducting, N4 is operated in saturation region., therefore N2 source class current potential is
(formula 12)
Because P5 grid meets GND, be therefore operated in linear zone, conducting resistance is minimum, VDSp5 ≈ 0.
Along with the increase of VB, when being increased to the cut-in voltage V of NMOS
thtime, because N2 source potential is higher, therefore N2 can not conducting, until VB is increased to VB=V
sn2+ V
thn2time, the conducting of N2 ability, export VOUT and start to decline, the decline of VOUT causes the conducting resistance of P5 to reduce rapidly further, forms a positive feedback process, makes P5 enter rapidly saturation region, and output voltage VO UT also reduces rapidly.
Constant-voltage justice of just transferring is the VB critical voltage that above-mentioned positive feedback occurs:
(formula 13)
In like manner, it is similar with the above that VB drops to low level analytic process from high level, can obtain negative breakover voltage:
(formula 14)
By analysis above, as seen due to the positive feedback effect that P4, N4 bring, the voltage-transfer characteristic of filtering shaping circuit is made to have following two features:
(1) input voltage is different with curve of output transform voltages from high to low from low to high, defines upset hysteresis voltage, is conducive to the shake of filtering burr.
(2), due to the positive feedback process of circuit, during output voltage VO UT upset, output voltage waveforms change rapidly.It is very steep that voltage transmission curve edge becomes, and decreases dynamic power consumption.
P5, N5 are operated in linear zone in circuit always, are equal to small resistor, and its effect produces voltage overshoot at P4, N5 branch road when preventing output level from overturning.
Filtering shaping circuit only produces the little dynamic power consumption of transient state in VB switching process, does not have quiescent dissipation, be conducive to low power dissipation design of the present invention at other times.
In sum, Internet of Things radio frequency chip low-voltage reset circuit of the present invention, resetting voltage value is only relevant with the threshold value of enhancement mode metal-oxide-semiconductor and depletion type MOS tube, and technique is determined, resetting voltage value is also determined, can obtain very high accuracy; Owing to adopting the threshold value of enhancement mode metal-oxide-semiconductor and depletion type MOS tube to have opposite thermal characteristic, the resetting voltage value of Low Drift Temperature can be obtained; Owing to adopting depletion type NMOS tube, power consumption is only determined by depletion type NMOS tube, easy realizing circuit low-power consumption; Owing to not using high resistance measurement, area is very little, is conducive to integrated circuit height integrated.
Above-described embodiment only illustrates the use of the present invention, but not limitation of the present invention, those skilled in the technology concerned, without departing from the spirit and scope of the present invention, can also make various conversion or change, such as change enhancement mode PMOS P1 into enhancement mode NMOS tube, depletion type NMOS tube changes depletion type PMOS into, or second level filtering shaping circuit is changed into inverter etc., and therefore all equivalent technical schemes also should belong to category of the present invention.
Claims (3)
1. Internet of Things radio frequency chip low-voltage reset circuit, comprising: the supply voltage comparison circuit be made up of enhancement mode metal-oxide-semiconductor and depletion type MOS tube and filtering shaping circuit;
Described supply voltage comparison circuit comprises: the first enhancement mode NMOS tube, the first enhancement mode PMOS, the first depletion type NMOS tube, the second depletion type NMOS tube, and the first electric capacity and the second electric capacity; The drain terminal of described first enhancement mode PMOS connects the drain terminal of the first depletion type NMOS tube, connects the grid end of the first enhancement mode NMOS tube simultaneously, drain terminal, the grid end of the first enhancement mode PMOS all connect power supply, the grid end of the first depletion type NMOS tube, the equal ground connection of source, the source ground connection of the first enhancement mode NMOS tube, drain terminal connect the grid end of the second depletion type NMOS tube and source and export comparative voltage, and the second depletion type NMOS tube leaks termination power; Grid end, the negativing ending grounding of the first electric capacity C1 positive termination first enhancement mode NMOS tube, the positive termination power of the second electric capacity, negative terminal connect output comparative voltage;
The output comparative voltage of supply voltage comparison circuit described in the input termination of described filtering shaping circuit, output is connected to the output signal of circuit.
2. a kind of Internet of Things radio frequency chip low-voltage reset circuit according to claim 1, is characterized in that: the breadth length ratio of depletion type first NMOS tube and the first enhancement mode PMOS must meet the requirement of formula 1,
------1
In formula 1,
be the breadth length ratio of the first depletion type NMOS tube,
be the breadth length ratio of the first enhancement mode PMOS, Vthd1 is the threshold voltage of depletion type NMOS tube, and Vthn1 is the threshold voltage of enhancement mode NMOS tube, and Vthp1 is the threshold voltage of enhancement mode PMOS, and T represents temperature.
3. a kind of Internet of Things radio frequency chip low-voltage reset circuit according to claim 1, it is characterized in that: described filtering shaping circuit comprises: second, third, the 4th and the 5th enhancement mode PMOS, and second, third, the 4th and the 5th enhancement mode NMOS tube;
The grid end of described second enhancement mode NMOS tube, the 3rd enhancement mode NMOS tube, the second enhancement mode PMOS, the 3rd enhancement mode PMOS connects the output comparative voltage of described supply voltage comparison circuit, the source termination power of the second enhancement mode PMOS, drain terminal connect the source of the 3rd enhancement mode PMOS and the 4th enhancement mode PMOS, the drain terminal of the 3rd enhancement mode PMOS connects the drain terminal of the second enhancement mode NMOS tube, the source of the second enhancement mode NMOS tube connects the drain terminal of the third and fourth enhancement mode NMOS tube, the source ground connection of the 3rd enhancement mode NMOS tube; The drain terminal of the 3rd enhancement mode PMOS and the second enhancement mode NMOS tube and the grid of the 4th enhancement mode PMOS and the 4th enhancement mode NMOS tube receive output signal; The drain terminal of the 4th enhancement mode PMOS receives the drain terminal of the 5th enhancement mode NMOS tube, the source ground connection of the 5th enhancement mode NMOS tube, grid termination power, the drain terminal of the 4th enhancement mode NMOS tube connects the drain terminal of the 5th enhancement mode PMOS, the source termination power of the 5th enhancement mode PMOS, grid end ground connection.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410420601.8A CN104300949A (en) | 2014-08-25 | 2014-08-25 | Low-voltage resetting circuit for radio frequency chip of internet of things |
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|---|---|---|---|
| CN201410420601.8A CN104300949A (en) | 2014-08-25 | 2014-08-25 | Low-voltage resetting circuit for radio frequency chip of internet of things |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105891734A (en) * | 2016-04-11 | 2016-08-24 | 芯海科技（深圳）股份有限公司 | Ultralow-power consumption power detection circuit |
| CN109959817A (en) * | 2019-04-29 | 2019-07-02 | 南京芯耐特半导体有限公司 | A kind of undervoltage detection circuit can be applied to low voltage environment |
| CN109975600A (en) * | 2019-04-29 | 2019-07-05 | 南京芯耐特半导体有限公司 | A kind of undervoltage detection circuit of zero quiescent dissipation |
| CN112865772A (en) * | 2021-02-08 | 2021-05-28 | 苏州领慧立芯科技有限公司 | Power-on reset circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101408564A (en) * | 2008-11-18 | 2009-04-15 | 上海贝岭矽创微电子有限公司 | Voltage detection circuit |
| CN201682412U (en) * | 2010-05-06 | 2010-12-22 | 日银Imp微电子有限公司 | Undervoltage latch circuit |
| CN103997323A (en) * | 2014-06-09 | 2014-08-20 | 上海华力微电子有限公司 | Reset circuit low in power consumption and high in stability |
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2014
- 2014-08-25 CN CN201410420601.8A patent/CN104300949A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101408564A (en) * | 2008-11-18 | 2009-04-15 | 上海贝岭矽创微电子有限公司 | Voltage detection circuit |
| CN201682412U (en) * | 2010-05-06 | 2010-12-22 | 日银Imp微电子有限公司 | Undervoltage latch circuit |
| CN103997323A (en) * | 2014-06-09 | 2014-08-20 | 上海华力微电子有限公司 | Reset circuit low in power consumption and high in stability |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105891734A (en) * | 2016-04-11 | 2016-08-24 | 芯海科技（深圳）股份有限公司 | Ultralow-power consumption power detection circuit |
| CN109959817A (en) * | 2019-04-29 | 2019-07-02 | 南京芯耐特半导体有限公司 | A kind of undervoltage detection circuit can be applied to low voltage environment |
| CN109975600A (en) * | 2019-04-29 | 2019-07-05 | 南京芯耐特半导体有限公司 | A kind of undervoltage detection circuit of zero quiescent dissipation |
| CN109959817B (en) * | 2019-04-29 | 2024-05-10 | 南京芯耐特半导体有限公司 | Undervoltage detection circuit applicable to low-voltage environment |
| CN112865772A (en) * | 2021-02-08 | 2021-05-28 | 苏州领慧立芯科技有限公司 | Power-on reset circuit |
| CN112865772B (en) * | 2021-02-08 | 2022-03-08 | 苏州领慧立芯科技有限公司 | Power-on reset circuit |
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