CN207039555U - A kind of Schmitt trigger circuit - Google Patents
A kind of Schmitt trigger circuit Download PDFInfo
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- CN207039555U CN207039555U CN201720315736.7U CN201720315736U CN207039555U CN 207039555 U CN207039555 U CN 207039555U CN 201720315736 U CN201720315736 U CN 201720315736U CN 207039555 U CN207039555 U CN 207039555U
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- pmos
- nmos tube
- drain electrode
- grid
- phase inverter
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Abstract
The utility model provides a kind of Schmitt trigger circuit, including phase inverter, feedback circuit and the phase inverter being made up of metal-oxide-semiconductor；The phase inverter, for determining the negative sense threshold voltage of trigger by its turnover voltage；The feedback circuit, change forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；The phase inverter, for the output signal shaping to the phase inverter.Schmitt trigger circuit of the present utility model using less metal-oxide-semiconductor to realize the function of trigger, its circuit structure is simple, chip occupying area is few；Unidirectional threshold voltage can be adjusted by feeding back metal-oxide-semiconductor simultaneously, improve practicality；Carrying out shaping to output signal additionally by phase inverter makes output signal more smooth.
Description
Technical field
It the utility model is related to technical field of integrated circuits, and in particular to a kind of Schmitt trigger circuit.
Background technology
Schmidt trigger is a kind of special gate circuit, there is two threshold voltages, forward threshold voltage and negative sense threshold value electricity
Pressure.In input signal from during low level rises to high level, it is referred to as the input voltage that its output state changes
Forward threshold voltage, input from high level drop to it is low level during, make its output state change input signal claim
For negative sense threshold voltage.
Using the positive feedback effect in Schmidt trigger state conversion process, edge can be changed slowly periodically
Signal is changed into the steeper rectangular pulse signal in edge.Using its characteristic, Schmidt trigger often uses the input of high voltage integrated circuit
End, the MCU pwm signals exported can be converted to the input signal of coincident circuit requirement, and its lagging characteristics can prevent from inputting
Signal oscillating.
Existing Schmidt trigger implementation has a variety of, for example by introducing positive feedback in a comparator, introduces reference
Voltage and feedback resistance carry out threshold value voltage, or by two phase inverter cascades and are used as feedback by metal-oxide-semiconductor come real
It is existing, also form Schmidt trigger circuit to changing difference amplifier load matched with cross complementary, but these Schmidts
The circuit structure of trigger is complicated, and component number is more, and area occupied is big.
Utility model content
In order to overcome above-mentioned the shortcomings of the prior art, main purpose of the present utility model is to provide a kind of circuit knot
The Schmitt trigger circuit that structure is simple, area is small.
To achieve these goals, the utility model specifically uses following technical scheme：
The utility model provides a kind of Schmitt trigger circuit, including phase inverter, the feedback circuit being made up of metal-oxide-semiconductor
And phase inverter；
The phase inverter, for determining the negative sense threshold voltage of trigger by its turnover voltage；
The feedback circuit, change forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
The phase inverter, for the output signal shaping to the phase inverter.
Preferably, the phase inverter includes PMOS MP1, PMOS MP3 and NMOS tube MN1, the feedback circuit bag
PMOS MP2 is included, the phase inverter includes PMOS MP4 and NMOS tube MN2；
The grid of the PMOS MP1 connects input, and source electrode and substrate meet power vd D, and drain electrode meets the PMOS MP3
Source electrode；The grid of the PMOS MP3 connects input, and drain electrode connects NMOS tube MN1 drain electrode, and substrate meets power vd D；It is described
NMOS tube MN1 grid meets input, source electrode and Substrate ground VSS；The grid of the PMOS MP4 connects PMOS MP3 leakage
Pole and NMOS tube MN1 drain electrode, source electrode and substrate meet power vd D, and drain electrode is connected with the drain electrode of the NMOS tube MN2 while conduct
Output end；The grid of the NMOS tube MN2 meets PMOS MP4 grid, source electrode and Substrate ground VSS；The PMOS MP2
Grid connect PMOS MP4 drain electrode and NMOS tube MN2 drain electrode, source electrode and substrate meet power vd D, and drain electrode meets PMOS MP1
Drain electrode and PMOS MP3 source electrode.
The utility model also provides another Schmitt trigger circuit, including negative circuit, the feedback being made up of metal-oxide-semiconductor
Circuit and phase inverter；
The negative circuit, for determining the forward threshold voltage of trigger by its reversal voltage；
The feedback circuit, change negative sense threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor.
The phase inverter, for the output signal shaping to the negative circuit.
Preferably, the negative circuit includes PMOS MP5, NMOS tube MN3 and NMOS tube MN5, the feedback circuit bag
NMOS tube MN6 is included, the phase inverter includes PMOS MP6 and NMOS tube MN4；
The grid of the NMOS tube MN5 meets input, source electrode and Substrate ground VSS, and drain electrode connects NMOS tube MN3 source electrode；
The grid of the NMOS tube MN3 connects input, and source electrode connects NMOS tube MN5 drain electrode, and drain electrode connects PMOS MP5 drain electrode, substrate
It is grounded VSS；The grid of the PMOS MP5 connects input, and source electrode and substrate meet power vd D；The grid of the NMOS tube MN4 connects
PMOS MP5 drain electrode and NMOS pipes MN3 drain electrode, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrodes of the PMOS connect
Connect while be used as output end；The grid of the PMOS MP6 connects NMOS tube MN4 grid, and source electrode and substrate meet power vd D；Institute
State NMOS tube MN6 grids and connect PMOS MP6 drain electrode and NMOS tube MN4 drain electrode, source electrode and Substrate ground VSS, drain electrode connect
NMOS tube MN5 drain electrode and NMOS tube MN3 source electrode.
Compared to prior art, Schmitt trigger circuit of the present utility model realizes triggering using less metal-oxide-semiconductor
The function of device, its circuit structure is simple, chip occupying area is few；Unidirectional threshold voltage can be entered by feeding back metal-oxide-semiconductor simultaneously
Row regulation, improves practicality；Carrying out shaping to output signal additionally by phase inverter makes output signal more smooth.
Brief description of the drawings
Fig. 1 is the Schmitt trigger circuit figure of the utility model embodiment 1；
Fig. 2 is the Schmidt trigger input and output schematic diagram of the utility model embodiment 1；
Fig. 3 is the Schmitt trigger circuit figure of the utility model embodiment 2；
Fig. 4 is the Schmidt trigger input and output schematic diagram of the utility model embodiment 2.
Embodiment
In order that the purpose of this utility model, technical scheme and advantage are more clearly understood, below in conjunction with accompanying drawing and implementation
Example, the utility model is further elaborated.It should be appreciated that specific embodiment described herein is only explaining this
Utility model, it is not used to limit the utility model.
Phase inverter turnover voltage：
Phase inverter scale factor：
Phase inverter scale factor increases, and turnover voltage reduces；Phase inverter scale factor reduces, turnover voltage increase, here
The phase inverter is negative circuit or phase inverter in embodiment.
Embodiment 1
The present embodiment provides a kind of Schmitt trigger circuit, including be made up of metal-oxide-semiconductor phase inverter, feedback circuit and
Phase inverter.Wherein, phase inverter is used for the negative sense threshold voltage that trigger is determined by its turnover voltage；Feedback circuit is used to lead to
Cross the breadth length ratio change forward threshold voltage for changing metal-oxide-semiconductor；Phase inverter is used for the output signal shaping to the phase inverter.
As shown in figure 1, phase inverter is made up of PMOS MP1, PMOS MP3 and NMOS tube MN1, feedback circuit includes
PMOS MP2, phase inverter are made up of PMOS MP4 and NMOS tube MN2.
Wherein, PMOS MP1 grid connects input, and source electrode and substrate meet power vd D, and drain electrode meets the PMOS MP3
Source electrode.PMOS MP3 grid connects input, and drain electrode connects NMOS tube MN1 drain electrode, and substrate meets power vd D.NMOS tube MN1
Grid meet input, source electrode and Substrate ground VSS.PMOS MP4 grid meets PMOS MP3 drain electrode and NMOS tube MN1
Drain electrode, source electrode and substrate meet power vd D, and drain electrode is connected with NMOS tube MN2 drain electrode while is used as output end.NMOS tube MN2
Grid meet PMOS MP4 grid, source electrode and Substrate ground VSS.PMOS MP2 grid connect PMOS pipes MP4 drain electrode and
NMOS tube MN2 drain electrode, source electrode and substrate meet power vd D, and drain electrode connects PMOS MP1 drain electrode and PMOS MP3 source electrode.
In the present embodiment, input voltage is risen and two kinds of situations of input voltage decline is analyzed respectively, had：
(a) input voltage uphill process
As VIN=0, VOUT=O, VIN are sent to VOUT through two-stage phase inverter, then PMOS MP2 is turned on, PMOS MP2
Same input is equivalent to PMOS MP1, the two is in parallel, and phase inverter scale factor reduces, forward threshold voltage rise.
Assuming that PMOS MP1 is in saturation region, PMOS MP1 drain terminal voltage is designated as VX, then have：
VDD-VX＞ VDD-VIN- | VTP|；
I.e.：VX- VIN ＜ | VTP|；
PMOS MP3 ends, it is assumed that invalid.
Assuming that PMOS MP1 is in linear zone, then have：
VDD-VX＜ VDD-VIN- | VTP|；
I.e.：VX- VIN ＞ | VTP|；
PMOS MP3 is turned on.
Wherein, VDD is supply voltage, VXFor PMOS MP1 drain terminal voltage, VIN is the input electricity of Schmidt trigger
Pressure, VTPFor the cut-in voltage of PMOS.
Assuming that PMOS MP3 is in saturation region, its drain terminal voltage is designated as VY, then have：
VX-VY＞ VX-VIN-|VTP|；
That is VY＜ VIN+ | VTP|；
Assuming that NMOS tube MN1 is in saturation region, then：
VIN-VTN＜ VY；
Wherein, VYFor PMOS MP3 drain terminal voltages, VTNFor the cut-in voltage of NMOS tube.
It can be seen that as long as meet VIN-VTN＜ VY＜ VIN+ | VTP|, you can ensure that PMOS MP3 and NMOS pipe MN1 locates simultaneously
In saturation region.
When input voltage VIN is less than forward threshold voltage VIH, export as 0, PMOS MP4 conductings, in linear zone.
Then PMOS MP1 electric currents are：
Wherein, I1For PMOS MP1 electric current, VIHFor positive threshold；μpFor the mobility in hole, coxFor unit area
Gate oxide capacitance, (W/L) are metal-oxide-semiconductor breadth length ratio.
PMOS MP3 electric currents are：
Wherein, I2For PMOS MP3 electric current.
NMOS tube MN1 electric currents are：
Wherein, I3For NMOS tube MN1 stream, μnFor the mobility of electronics, coxFor unit area gate oxide capacitance.
PMOS MP2 electric currents are：
PMOS MP1 and PMOS MP2 electric currents sum are equal to PMOS MP3 electric currents, and PMOS MP3 electric currents are equal to NMOS
Pipe MN1 electric currents.
I1+I4=I2=I3；
Simultaneous obtains
Pass through above-mentioned VIHAnd VXEquation, can obtain forward threshold voltage, and result of calculation too complex is simple in the form of above-mentioned
Write.
(b) input voltage declines process
Input as high level, export as high level, PMOS MP2 cut-offs, phase inverter scale factor is constant, negative sense threshold value electricity
Press constant.
PMOS MP1 electric current I1For：
PMOS MP3 electric current I2For：
NMOS tube MN1 electric current I3For：
PMOS MP1, PMOS MP3 and NMOS tube MN1 electric current are equal, have：
I1=I2=I3；
Simultaneous obtains：
In the present embodiment, by changing phase inverter scale factor during input voltage raising and lowering, produce sluggish
Voltage, by adjusting PMOS MP2 size, different forward threshold voltages and hysteresis voltage can be obtained.
The Schmitt trigger circuit input and output signal of the present embodiment are as shown in Fig. 2 change PMOS MP2 chi
It is very little to obtain different forward threshold voltage VIN.When increasing PMOS MP2, VIH curves move right, as reduction PMOS MP2
Size when, VIH curves are moved to the left.
Embodiment 2
The present embodiment provides a kind of Schmidt trigger, including be made up of metal-oxide-semiconductor negative circuit, feedback circuit and anti-phase
Device.Wherein, negative circuit is used for the forward threshold voltage that trigger is determined by its reversal voltage；Feedback circuit is used for by changing
The breadth length ratio for becoming metal-oxide-semiconductor changes negative sense threshold voltage；Phase inverter is used for the output signal shaping to the negative circuit.
As shown in figure 3, NMOS tube MN5 grid meets input, source electrode and Substrate ground VSS, drain electrode meets NMOS tube MN3
Source electrode.NMOS tube MN3 grid connects input, and source electrode connects NMOS tube MN5 drain electrode, and drain electrode connects PMOS MP5 drain electrode, lining
Bottom is grounded VSS.PMOS MP5 grid connects input, and source electrode and substrate meet power vd D.NMOS tube MN4 grid connects PMOS
MP5 drain electrode and NMOS tube MN3 drain electrode, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrodes of the PMOS connect simultaneously
As output end.PMOS MP6 grid connects NMOS tube MN4 grid, and source electrode and substrate meet power vd D.NMOS tube MN6 grid
Pole meets PMOS MP6 drain electrode and NMOS tube MN4 drain electrode, source electrode and Substrate ground VSS, and drain electrode connects NMOS tube MN5 drain electrode
With NMOS tube MN3 source electrode.
In the present embodiment, input voltage is risen and two kinds of situations of input voltage decline is analyzed respectively, had：
(a) input voltage uphill process
As VIN=0, VOUT=O, now NMOS tube MN6 cut-offs, phase inverter scale factor is constant, forward threshold voltage
It is constant.
Forward threshold voltage is designated as VIH, NMOS tube MN5 drain terminal voltages are designated as VX。
Then NMOS tube MN5 electric current I1For：
NMOS tube MN3 electric current I2For：
PMOS MP5 electric current I3For：
Wherein, μnFor electron mobility, coxFor unit area gate oxide capacitance, (W/L) is MOS pipe breadth length ratios.
Because NMOS tube MN5, NMOS tube MN3 and PMOS MP5 electric current are equal, then：
I1=I2=I3；
Simultaneous obtains：
(b) input voltage declines process
As VIN=1, VOUT=1, VIN are sent to VOUT through two-stage phase inverter, then NMOS tube MN6 is turned on, then NMOS tube
MN6 and NMOS tube MN5 are equivalent to same input, and the two is in parallel, and phase inverter scale factor increase, turnover voltage reduces.
Negative sense threshold voltage is designated as VIL, NMOS tube MN5 drain terminal voltage is designated as VX。
Then NMOS tube MN5 electric current is：
NMOS tube MN3 electric current I2For：
PMOS MP5 electric current I3For：
NMOS tube MN6 electric current I4For：
NMOS tube MN3 electric currents are equal to by NMOS tube MN5 and NMOS tube MN6 electric currents sum, NMOS tube MN3 electric currents are equal to
PMOS MP5 electric currents, are obtained：
I1+I4=I2=I3；
Simultaneous obtains：
Pass through above-mentioned VILAnd VXEquation, can obtain negative sense threshold voltage, and result of calculation too complex is simple in the form of above-mentioned
Write.
In the present embodiment, by changing phase inverter scale factor during input voltage raising and lowering, produce sluggish
Voltage, regulation NMOS tube MN6 size, can obtain different negative sense threshold voltages and hysteresis voltage.
The Schmitt trigger circuit input and output schematic diagram of the present embodiment is as shown in figure 4, change NMOS tube MN6 chi
It is very little to obtain different negative sense threshold voltage VIL.When increase NMOS tube MN6 size, VIL curves are moved to the left, and reduce NMOSMN6
The size of pipe, VIL curves move right.
It is described above, the only preferable embodiment of the utility model, but the scope of protection of the utility model is not
This is confined to, any one skilled in the art can readily occur in the technical scope that the utility model discloses
Change or replacement, should all cover within the scope of protection of the utility model.Therefore, the scope of protection of the utility model should
It is defined by scope of the claims.
Claims (4)
1. a kind of Schmitt trigger circuit, it is characterised in that including phase inverter, the feedback circuit and anti-being made up of metal-oxide-semiconductor
Phase device；
The phase inverter, for determining the negative sense threshold voltage of trigger by its turnover voltage；
The feedback circuit, change forward threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
The phase inverter, for the output signal shaping to the phase inverter.
2. a kind of Schmitt trigger circuit according to claim 1, it is characterised in that the phase inverter includes PMOS
Pipe MP1, PMOS MP3 and NMOS tube MN1, the feedback circuit include PMOS MP2, and the phase inverter includes PMOS MP4
With NMOS tube MN2；
The grid of the PMOS MP1 connects input, and source electrode and substrate meet power vd D, and drain electrode connects the source of the PMOS MP3
Pole；The grid of the PMOS MP3 connects input, and drain electrode connects NMOS tube MN1 drain electrode, and substrate meets power vd D；The NMOS tube
MN1 grid meets input, source electrode and Substrate ground VSS；The grid of the PMOS MP4 connect PMOS MP3 drain electrode and
NMOS tube MN1 drain electrode, source electrode and substrate meet power vd D, and drain electrode is connected with the drain electrode of the NMOS tube MN2 while as output
End；The grid of the NMOS tube MN2 meets PMOS MP4 grid, source electrode and Substrate ground VSS；The grid of the PMOS MP2
PMOS MP4 drain electrode and NMOS tube MN2 drain electrode are connect, source electrode and substrate meet power vd D, and drain electrode connects PMOS MP1 drain electrode
And PMOS MP3 source electrode.
A kind of 3. Schmitt trigger circuit, it is characterised in that including be made up of metal-oxide-semiconductor negative circuit, feedback circuit and anti-
Phase device；
The negative circuit, for determining the forward threshold voltage of trigger by its reversal voltage；
The feedback circuit, change negative sense threshold voltage for the breadth length ratio by changing metal-oxide-semiconductor；
The phase inverter, for the output signal shaping to the negative circuit.
4. a kind of Schmitt trigger circuit according to claim 3, it is characterised in that the negative circuit includes PMOS
Pipe MP5, NMOS tube MN3 and NMOS tube MN5, the feedback circuit include NMOS tube MN6, and the phase inverter includes PMOS MP6
With NMOS tube MN4；
The grid of the NMOS tube MN5 meets input, source electrode and Substrate ground VSS, and drain electrode connects NMOS tube MN3 source electrode；It is described
NMOS tube MN3 grid connects input, and source electrode connects NMOS tube MN5 drain electrode, and drain electrode connects PMOS MP5 drain electrode, Substrate ground
VSS；The grid of the PMOS MP5 connects input, and source electrode and substrate meet power vd D；The grid of the NMOS tube MN4 meets PMOS
Pipe MP5 drain electrode and NMOS tube MN3 drain electrode, source electrode and substrate meet VSS, and drain electrode and the MP6 drain electrode connections of the PMOS are same
Shi Zuowei output ends；The grid of the PMOS MP6 connects NMOS tube MN4 grid, and source electrode and substrate meet power vd D；It is described
NMOS tube MN6 grids meet PMOS MP6 drain electrode and NMOS tube MN4 drain electrode, source electrode and Substrate ground VSS, and drain electrode meets NMOS
Pipe MN5 drain electrode and NMOS tube MN3 source electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720315736.7U CN207039555U (en) | 2017-03-28 | 2017-03-28 | A kind of Schmitt trigger circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720315736.7U CN207039555U (en) | 2017-03-28 | 2017-03-28 | A kind of Schmitt trigger circuit |
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| Publication Number | Publication Date |
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| CN207039555U true CN207039555U (en) | 2018-02-23 |
Family
ID=61473293
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| CN201720315736.7U Active CN207039555U (en) | 2017-03-28 | 2017-03-28 | A kind of Schmitt trigger circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108667440A (en) * | 2017-03-28 | 2018-10-16 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
| CN110380710A (en) * | 2019-08-14 | 2019-10-25 | 中国电子科技集团公司第五十八研究所 | A kind of waveform convertion circuit of double Schmidt's structures |
| CN113114173A (en) * | 2021-03-31 | 2021-07-13 | 成都锐成芯微科技股份有限公司 | Schmitt trigger |
-
2017
- 2017-03-28 CN CN201720315736.7U patent/CN207039555U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108667440A (en) * | 2017-03-28 | 2018-10-16 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
| CN110380710A (en) * | 2019-08-14 | 2019-10-25 | 中国电子科技集团公司第五十八研究所 | A kind of waveform convertion circuit of double Schmidt's structures |
| CN113114173A (en) * | 2021-03-31 | 2021-07-13 | 成都锐成芯微科技股份有限公司 | Schmitt trigger |
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Address after: 518000 Shenzhen Nanshan High-tech Zone, Shenzhen City, Guangdong Province, Room 203, 11 Building, No. 1 Science and Technology Zone 2 Road, Shenzhen Software Park (Phase 2) Patentee after: Fengji Technology (Shenzhen) Co., Ltd Address before: 203, room 11, building two, two software park, Shenzhen Road, Nanshan District science and technology, Guangdong, Shenzhen 518057, China Patentee before: FORTIOR TECHNOLOGY (SHENZHEN) Co.,Ltd. |