CN108336075A - 发光二极管封装结构、发光二极管封装模块及其成形方法 - Google Patents
发光二极管封装结构、发光二极管封装模块及其成形方法 Download PDFInfo
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- CN108336075A CN108336075A CN201710048340.5A CN201710048340A CN108336075A CN 108336075 A CN108336075 A CN 108336075A CN 201710048340 A CN201710048340 A CN 201710048340A CN 108336075 A CN108336075 A CN 108336075A
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- 238000005538 encapsulation Methods 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 230000000007 visual effect Effects 0.000 claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000013078 crystal Substances 0.000 claims abstract description 44
- 238000006243 chemical reaction Methods 0.000 claims description 74
- 238000002310 reflectometry Methods 0.000 claims description 35
- 239000000463 material Substances 0.000 claims description 21
- 238000010276 construction Methods 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 3
- 238000000407 epitaxy Methods 0.000 claims description 2
- 238000012417 linear regression Methods 0.000 abstract description 12
- 238000004458 analytical method Methods 0.000 abstract description 10
- 238000010586 diagram Methods 0.000 description 22
- 239000004065 semiconductor Substances 0.000 description 18
- 238000013461 design Methods 0.000 description 9
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 7
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 7
- 239000003292 glue Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 229920001296 polysiloxane Polymers 0.000 description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 229910002601 GaN Inorganic materials 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- 239000012141 concentrate Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 238000004020 luminiscence type Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000007788 roughening Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- VFQHLZMKZVVGFQ-UHFFFAOYSA-N [F].[Kr] Chemical compound [F].[Kr] VFQHLZMKZVVGFQ-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 239000000741 silica gel Substances 0.000 description 2
- 229910002027 silica gel Inorganic materials 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- JNDMLEXHDPKVFC-UHFFFAOYSA-N aluminum;oxygen(2-);yttrium(3+) Chemical compound [O-2].[O-2].[O-2].[Al+3].[Y+3] JNDMLEXHDPKVFC-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000000571 coke Substances 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 210000004209 hair Anatomy 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hcl hcl Chemical compound Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000006101 laboratory sample Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 229910019655 synthetic inorganic crystalline material Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910019901 yttrium aluminum garnet Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/0041—Devices characterised by their operation characterised by field-effect operation
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
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- H—ELECTRICITY
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
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Abstract
一种可提供预定视角的发光二极管封装结构的成形方法,包括至少下列步骤:放置一覆晶式芯片于一承载基板上;填入底胶于所述覆晶式芯片的电极间的空隙以支撑所述覆晶式芯片;激光剥离所述覆晶式芯片的一成长基板而形成一薄型化芯片,并且外露出的所述薄型化芯片的一磊晶结构;粗化所述薄型化芯片外露的所述磊晶结构;提供一视角调整结构于所述薄型化芯片;以及选定一预定的视角,依据线性回归分析的算式调整所述视角调整结构以实现所述预定的视角。
Description
技术领域
本发明涉及一种可提供预定视角的发光二极管封装结构、发光二极管封装模块、及其成形方法,特别涉及一种发光二极管封装结构具有视角调整结构,以依据线性回归分析的算式调整所述视角调整结构以实现所述预定的视角。
背景技术
一般车用及闪光灯等发光二极管(LED)应用,常需要较小的视角以搭配二次光学透镜,达到所需的光形及最佳的光利用率。目前多以透镜的光学设计来调整LED的视角大小,产品通常有薄型化的需求,例如手机闪光灯会使用较薄的菲涅尔透镜。除了较小的视角外,为符合不同应用的需求,常需要特定的视角用以搭配特定设计的二次光学透镜。二次光学透镜在设计上与制造上均增加成本。
塑料电极芯片载体(PLCC)LED或灯泡形(Lamp type)LED是以碗杯设计或封装体结构设计来控制视角,若要调整视角便需要开发相关的模具,期间花费的时间、设备与成本较高。
模塑成型(Molding type)的LED,通过透镜的设计或是LED的形状,可以调整视角。一般为了达到缩小视角的效果,会于LED外围增加反射墙结构,但反射墙会吸收芯片的侧向光,造成亮度下降。
发明内容
本发明所要解决的技术问题,在于提供一种可提供预定视角的发光二极管封装结构的成形方法及发光二极管结构,通过调整视角调整结构的波长转换层整体厚度、反射墙的反射率及二者相对应的高度,而实现所述预定的视角,使得光学设计的弹性空间更大。
为了能更进一步了解本发明为实现既定目的所采取的技术、方法及技术效果,请参阅以下有关本发明的详细说明、附图,相信本发明的目的、特征与特点,当可由此得以深入且具体的了解,然而附图与附件仅提供参考与说明用,并非用来对本发明加以限制者。
附图说明
图1为本发明的发光二极管结构的芯片接合示意图。
图1A为本发明的覆晶式芯片一种覆晶结构实施例的示意图。
图2为本发明的覆晶式芯片粘贴于承载基板的示意图。
图3为本发明的覆晶式芯片的剥离流程示意图。
图4为本发明的薄型化芯片的粗化磊晶结构的示意图。
图4A为本发明图4中A部分的局部放大示意图。
图5为本发明的薄型化芯片贴合波长转换层的示意图。
图5A为本发明的薄型化芯片贴合波长转换层另一实施例的示意图。
图5B为本发明的薄型化芯片贴合波长转换层又一实施例的示意图。
图5C为本发明的薄型化芯片贴合波长转换层再一实施例的示意图。
图6为本发明第一实验例数据的坐标图。
图7为本发明依图4未贴附波长转换层的0度视角的光形图。
图8为本发明具有反射墙的发光二极管封装结构的示意图。
图8A为本发明具有另一种反射墙的发光二极管封装结构的示意图。
图8B为本发明配合图5C加上反射墙的发光二极管封装结构的示意图。
图9为本发明依据图8配合反射墙反射率100%的光形图。
图10为本发明不同反射墙材料与光线波长的反射率的曲线图。
图10A为本发明依第二实验例实验数据的坐标分布图。
图10B为本发明依第三实验例实验数据的坐标分布图。
图11为本发明的发光二极管封装模块的俯视图。
具体实施方式
请参考图1,为本发明的发光二极管结构的芯片接合示意图。本发明提供一种发光二极管结构的制造方法,首先,第一步骤是提供一覆晶式芯片100。该覆晶式芯片100具有一成长基板20、以及一形成于该成长基板20上的磊晶结构10、以及至少一对芯片金属垫14、17形成于该磊晶结构10上,该对芯片金属垫14、17具有一间隔空隙S。
本实施例的成长基板20可以是蓝宝石基板(Sapphire substrate)。覆晶式芯片100具有彼此相对地的一第一表面100a(如图1的上侧)及一第二表面100b(如图1的下侧),第一表面侧为生长基板20,第二表面侧具有至少一P型接触垫(P-contact pad)17及至少一N型接触垫(N-contact pad)14作为电极,且该两接触垫(14,17)之间具有间隔空隙S。
请参阅图1A,每一覆晶式芯片100的磊晶结构10形成在成长基板20上表面,磊晶结构10包含有缓冲层11、N型半导体层12、发光层13、及P型半导体层15。其中缓冲层11可以是未掺杂的氮化镓(undoped-GaN),N型半导体层12可以是N型的氮化镓,发光层13可以是多层量子井(MQW,multiple quantum well)的半导体结构;P型半导体层15可以是P型的氮化镓。N型接触垫(N-contact pad)14连接N型半导体层12,P型接触垫(P-contact pad)17连接P型半导体层15。更进一步的说,该相隔的空隙S亦延伸至相对应的P型半导体层15与N型半导体层12之间。
上述磊晶结构10的层状结构仅为一举例说明。本发明不限制于上述磊晶结构10的层状结构,例如,可以省略缓冲层11,直接将N型半导体层12形成于成长基板20上。此外,P型半导体层15可以额外再形成一金属层、或透明电极层…等,然后再形成上述P型接触垫17。
请再参阅图1,将本发明的覆晶式芯片100接合于一承载基板30,承载基板30具有电路结构31、32,作为电极的N型接触垫14与P型接触垫17接触于电路结构31、32。然后再将底胶材料填入N型接触垫14与P型接触垫17之间的空隙S。电路结构31、32可以依据设计需要,延伸至承载基板30的底面或其他位置。
如图2所示,为本发明的覆晶式芯片接合于基板的示意图。本实施例的底胶材料填入于覆晶式芯片100与承载基板30之间的空隙S,而形成一填充层40。
其中,要注意的是,本实施例的填充层40除填入N型接触垫14与P型接触垫17之间的空隙S外,较佳的亦填入覆晶式芯片100的第二表面100b与承载基板30之间所有空间,以期达到覆晶式芯片100借着填充层40能有效地获得承载基板30支撑。换句话说,填充层40需接触覆晶式芯片100的第二表面100b以及承载基板30的上表面,且环绕N型接触垫14、P型接触垫17以及电路结构31、32外围。再者,填充层40亦可延伸至磊晶结构10的位置。
如图3所示,为本发明的覆晶式芯片的剥离流程示意图。本发明第二流程,对该覆晶式芯片100的成长基板20进行激光剥离(laser lift off,LLO),也就是形成本发明的无成长基板20的一薄型化芯片,亦可称为薄膜覆晶式芯片。较佳是以芯片等级进行激光剥离,可避免晶圆等级的激光剥离所产生的过大的应力,其使整片晶圆严重翘曲。举例而言,本实施例可以使用紫外光激光,如波长248nm的氪氟准分子激光(KrF excimer laser)。其优点在于氮化镓(GaN)对248nm氪氟准分子激光的吸收是數较高,雷射能量大多在界面就被吸收完毕。相较之下,氮化镓(GaN)对波长355nm的掺钕钇铝石榴石固态激光(Nd:YAG laser)的吸收是數较小,雷射穿透深度深,导致大多缺陷都在材料内部形成。
上述激光剥离流程,具体举例如下,当成长基板20为蓝宝石基板时,首先,聚焦于缓冲层11,本实施例为氮化镓层,以适当的激光能量剥离蓝宝石基板,如750至1100mJ(微焦耳)。以45密耳(Mil)覆晶式芯片为例,950mJ(微焦耳)即能完全剥离。能量不足会使蓝宝石基板剥离不完全导致发光层破损。再者,激光束大小须略大于欲剥除的覆晶式芯片尺寸,较佳的,边长范围比覆晶式芯片多40微米(um)以上。以45密耳(Mil)的覆晶式芯片为例,边长1143微米(um),每边预留60微米(um)左右,激光束大小可为1260微米(um),确保样品完全受激光辐照。补充说明,由于激光光源的能量呈高斯分布,若有能量不均,可能造成芯片破损,因此可依情况调整光源位置。
如图4及图4A所示,为本发明的薄型化芯片的粗化磊晶结构的示意图,图4A为图4中A部分的放大图。本发明第三流程,为粗化因剥离成长基板20后外露的磊晶结构10的一半导体层;其中上述半导体层为N型半导体层12,本实施例为N型氮化镓层。粗化半导体层的流程,包括下列步骤:以碱性氢氧化物进行湿式蚀刻,直到半导体层的上表面121生成的角锥1211占表面积20%以上。必要时,其中上述湿式蚀刻的流程还包括以紫外光或热能辅助蚀刻,以增加形成角锥。
本实施例,举例说明,其中上述湿式蚀刻的流程包括下列步骤,浸泡已移除成长基板20的覆晶式芯片100于3M(体积莫耳浓度mol/L)的氢氧化钾(KOH)的溶液中10分钟以上,以氢氧离子粗化N型半导体层12的表面。然后,取出该覆晶式芯片100,并以去离子水超音波震荡一预定时间,例如10分钟。若有残余的镓金属粒子,可被浓度更高的氢氧化钾(KOH)或酸类,例如盐酸(HCl)清除。
请参阅图5,为本发明的薄型化芯片的贴合波长转换层的示意图。本发明第四流程,为接合一可透光的波长转换层50于上述薄型化芯片的磊晶结构10。依图1A的实施例,也就是位于磊晶结构10顶面的N型半导体层12。因而形成一发光二极管封装结构200。本实施例的波长转换层50为一具有波长转换材料的透光层,如荧光粉片。本发明的波长转换层50可以是荧光粉片或包含波长转换材料的胶材。
举例而言,上述接合该波长转换层50的流程包括以荧光粉片贴合于该磊晶结构10上,也就是说,荧光粉片贴合于如图1A所示的该磊晶结构10的N型半导体层12上,一种较佳实施例,其中荧光粉片可以是荧光粉末与胶体、陶瓷或玻璃制成混合的片状,荧光粉片固化后硬度大于萧氏(Shore)硬度D40,厚度可控制于60微米(μm)至350微米(μm)之间。尺寸可大于或等于薄型化芯片的磊晶结构10。一种实际的作法,以固晶机台贴片,约120g轻压薄型化芯片(由覆晶式芯片100移除成长基板20)确保完整贴合。
举例而言,就胶材而言,其中上述粘贴该波长转换层的流程包括以胶材直接覆盖于该磊晶结构10上。一种实际的作法,可以将具有波长转换材料的胶材覆盖薄型化芯片(亦即已移除成长基板20的覆晶式芯片)所有外露表面,包含磊晶结构10的上表面121及其四个侧面。如图5A所示,波长转换层50a延伸至磊晶结构10的两侧,完全盖住磊晶结构10,而形成发光芯片二极管结构200a。此外,因胶材会直接接触覆晶式芯片100,需要使用耐热与耐光的胶材,如折射率1.4的硅胶。
请参阅图5B,为本发明的覆晶式芯片贴合波长转换层又一实施例的示意图。与上述实施例不同的地方在于,发光芯片二极管结构200b的波长转换层50b的宽度大致等于磊晶结构10的宽度。请再参阅图5C,为本发明的覆晶式芯片贴合波长转换层再一实施例的示意图。本实施例的发光芯片二极管结构200b的波长转换层50b的宽度大致等于磊晶结构10的宽度,另外,填充层40进一步延伸大致覆盖于上述磊晶结构10的侧边。此外,本实施例的填充层40较佳的是不透明的底胶材料,框住薄型化芯片的发光层。不透明的底胶材料可以缩小整体视角,具有控制视角的功能,胶材可使用硅胶或环氧树脂,较佳为白色底胶材料可维持亮度。综上各种实施例,本发明的波长转换层的宽度可以大于或等于磊晶结构10的宽度。
本实施例经过移除成长基板20,以Epistar 45密耳(mil)覆晶式芯片为例,蓝光芯片本身的视角约为130度,若移除成长基板20,厚度可减少约140μm,减少光的折射与散射,磊晶结构10也就是芯片的发光层厚度(参图5A的H0)仅约8~10μm,视角可达约117度。另外,由于厚度小于10μm,蓝光几乎只剩正向发光,大部分蓝光皆可被波长转换层转换为白光。此外,移除成长基板20后,具有波长转换材料的波长转换层50,50a,50b可加强整体结构,并且可通过控制可透光的波长转换层的宽度避免发光层13的蓝光漏出。
本实施例的其中一项特点在于,通过利用控制上述波长转换层50的厚度,进而改变发光二极管封装结构200的整体视角。进一步根据预期的视角制造所需要视角的发光二极管封装结构200。上述波长转换层可视为视角调整结构。
本实施例依图5A的结构进行实验,以EPISTAR(晶元光电公司)45密耳(mil)覆晶式芯片经过激光剥离成长基板为例,其中H0代表移除成长基板20后的磊晶结构10厚度,约10μm;H1代表波长转换层顶面至磊晶结构10顶面的厚度。其中H0+H1的厚度,以H表示波长转换层整体厚度,等于由波长转换层50a顶面至磊晶结构10的底面的厚度。请参下列第一实验例的表1。
表1
由上述表1,随着波长转换层的厚度增加,视角跟着增大。波长转换层整体厚度由350μm调整至60μm时,视角可由133.7度达到120.4度。上述视角的量测是依光形图最大的光强度的50%的范围,其中对照例,为依图4未贴附波长转换层的0度视角光形图参图7。如图6所示,为本发明依上述表1画出第一实验例数据的坐标图,可分析视角(View angle)与波长转换层整体厚度之间的关系大致呈线性关系。本发明依据线性回归分析(linearregression),根据自变量X(波长转换层整体厚度)和因变量Y(视角)的相关关系,建立X与Y的线性回归方程进行预测的方法,可以整理得着下列关系式:
算式一:视角=117°+0.05×波长转换层整体厚度(H)
综上,本发明可以依据上述线性回归方程,依据发光二极管封装结构的产品所需要的视角,贴附相对应的波长转换层的厚度在磊晶结构10,即可实现。借此可以避免多余的试验。
请参阅图8,为本发明具有反射墙的发光二极管封装结构的示意图。此流程,可称为白墙成型流程。除了上面实施例的波长转换层50,本实施例以与磊晶结构10等大的波长转换层50、及反射墙70形成发光二极管封装结构400。反射墙70包覆磊晶结构10与波长转换层50,反射墙70与波长转换层50顶面等高或略高10~50μm,可覆盖或不覆盖波长转换层50顶面。一种实施的方法,例如,将白色树脂以模塑方式包覆磊晶结构10与波长转换层50的周围,减小视角。其优点在于,白色树脂可作为反射杯,且因芯片的发光层只剩10μm,反射杯结构对侧向光影响甚小,能在亮度不减的结构下缩小视角。上述波长转换层50及反射墙70可视为视角调整结构。
本实施例的其中一项优点在于利用反射墙70的不同反射率,以调整发光二极管封装结构400的整体视角。具体的实验如下:
控制反射墙的反射率可调整整体的视角大小,以0%反射率至100%反射率为例,分别以四种反射墙材料搀入不同比例的反射颗粒,而形成编号硅树脂1-4的试验样本。
本发明的第二实验例,以反射墙70与波长转换层50顶面等高(如图8所示);本发明的第三实验例,以反射墙70高于波长转换层50顶面(如图8A或图8B所示,其中图8A是配合图5的结构,图8B是配合图5C的结构),其中反射墙70高于波长转换层50顶面10~50μm即可缩小视角;反射墙的反射率越高时(大于70%),影响越明显。
本发明依据图8配合反射墙反射率100%,经过量测后,视角可由142.0度缩小至115.3度,其中115.3度请参图9的光形图。整理成下列表2,具有反射墙的发光二极管封装结构的视角实验表格。
表2
上述表2中反射墙材料的颜色、以及对于光线波长449nm的反射率各自如下:
硅树脂1颜色为透明(transparent)、反射率0%;
硅树脂2颜色为灰白(gray-white)、反射率74.7%;
硅树脂3颜色为类白(off-white)、反射率89.1%;
硅树脂4颜色为白色(white)、反射率100%。
请参阅图10,上述反射墙70的反射率,本实施例的编号硅树脂2~4为板状厚度0.5mm的实验样品,选择光线波长449nm。实际上可以适用于大于波长425nm以上,即有明显的差异。波长大于450nm光线,硅树脂3~4的反射率开始降低。
请参阅图10A,为本发明依第二实验例实验数据的坐标分布图。由第二实验例的坐标图,可分析视角与反射墙的反射率之间的关系大致呈线性关系。本发明依据线性回归分析,根据自变量X(反射墙的反射率,R)和因变量Y(视角)的相关关系,建立X与Y的线性回归方程进行预测的方法,可以整理得着下列关系式:
算式二:视角=141.8°-0.2709×反射墙的反射率%
再者,请参阅图10B,为本发明依第三实验例实验数据的坐标分布图。反射墙70高于波长转换层50顶面20μm。由第三实验例的坐标图,可分析视角与反射墙的反射率之间的关系大致呈线性关系。本发明依据线性回归分析,根据自变量X(反射墙的反射率)和因变量Y(视角)的相关关系,建立X与Y的线性回归方程进行预测的方法,可以整理得着下列关系式:
算式三:视角=141.9°-0.2809×反射墙的反射率%
由表2,反射墙70的反射率100%时,反射墙与波长转换层顶面的高度差20μm可减少视角1.2至1.3度。反射墙70的反射率愈高,视角减少愈明显。本发明另外测试,高度差50μm时减少约2度,两者之间相差约0.7至0.8。为使反射墙达到最佳的缩小视角效果,略高的反射墙70结构需紧邻波长转换层50顶面。
综上,本发明可以依据上述线性回归分析所获得算式进行预测,依据发光二极管封装结构的产品所需要的视角,以相符合的反射率的反射墙围绕在磊晶结构10及波长转换层50,即可实现。借此可以避免多余的试验。
本实施例该覆晶式芯片100经过激光剥离该成长基板后,或称薄型化芯片,其包含磊晶结构10及作为电极的接触垫。因厚度减薄,侧向光骤减,光形更为集中。分别以不同应用所需的光照角度做为比较基准,例如投影机应用只需±10度的光,脸部辨识需±40度内的光,照明应用需±60度内的光。以蓝光芯片为例,移除成长基板后即可于±10度内有3%光强度(luminous intensity,candlepower,I)增加。光强度的单位为坎德拉(candela,cd)=lm/sr(立体角内的光通量[lm]/立体角Ω[sr])
以封装后的白光组件为例,移除成长基板之后的光强也有增加,而略高反射墙结构可使光形更为集中。较薄的厚度也有助于光形的集中。以不同反射率的反射墙做比较,反射率高的反射墙于小角度时有较高的光强,证明高反射率的反射墙可使光形更为集中。依据第一实验例的表1,量测不同光照角度的光强度(%)如下表3,第一实验例的光强度表。
表3
此外,依据第二及第三实验例的表2,量测不同光照角度的光强度(%)如下表4,光强度表。
表4
此外,依据第二及第三实验例的表2,量测不同光照角度的光强度(%)如下表5,光强度表。以不同反射率的反射墙做比较,反射率高的反射墙于小角度时有较高的光强,证明高反射率反射墙可使光形更为集中。
表5,光强度表
再者,依据上述实施例,积分视角内的光强度面积为分母,±40度以内为分子,比值越大表示其光形越集中于±40度以内。显示本发明的发光二极管结构相当具有实用性。
为量化其集中度,定义±10度的光强度占23~27%,10~40度内的光强度占50~53%。因此可见,本发明的发光二极管封装结构发出的光在光照角度±40度的光强度总和与在视角角度以内的光强面积比值大于0.7;其中0~10度,比值0.23~0.27;其中10~40度,比值0.50~0.53。
请再参阅图11,为本发明的发光二极管封装模块的俯视图。本发明还可应用于一种发光二极管封装模块的成形方法,与上述实施例的差异在于,将数个覆晶式芯片以数组的方式放置于一承载基板30上,例如图标2x2的数组,但数量不限于此。先将该些数个覆晶式芯片的电极分别与承载基板30上的相对应电路结构接合,之后类似于上述发光二极管封装结构的成形方法,经过填入底胶、激光剥离、粗化磊晶结构的步骤,然后再个别将可透光的波长转换层50置于上述薄型化芯片的磊晶结构。最后,形成反射墙70以环绕每一所述波长转换层50与每一所述薄型化芯片,而形成一发光二极管封装模块500。
必要时,可以沿着图11中的虚线切割上述发光二极管封装模块500,而形成多个发光二极管封装结构400(如图8、8A、8B所示)。
本发明的特点及功能在于,通过控制波长转换层的厚度,进而改变发光二极管封装结构的整体视角根据期望的视角,依线性回归分析所获得算式进行预测,制造所需要视角的发光二极管封装结构。此外,通过控制反射墙的反射率,可调整发光二极管封装结构的整体的视角大小。本发明在LED本身的视角与厚度上加以调整,可使光学设计的弹性空间更大。
以上所述仅为本发明的较佳可行实施例,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。
Claims (12)
1.一种可提供预定视角的发光二极管封装结构的成形方法,其特征在于,包括至少下列步骤:
放置一覆晶式芯片于一承载基板上;
填入底胶于所述覆晶式芯片的电极间的空隙以支撑所述覆晶式芯片;
激光剥离所述覆晶式芯片的一成长基板而形成一薄型化芯片,并且外露出所述薄型化芯片的一磊晶结构;
粗化所述薄型化芯片外露的所述磊晶结构;
提供一视角调整结构于所述薄型化芯片;以及
选定一预定的视角,依据下列其中一算式调整所述视角调整结构以实现所述预定的视角,其中视角的单位为度;
算式一:视角=117+0.05×波长转换层整体厚度;其中所述视角调整结构包括一波长转换层,所述波长转换层贴附于所述磊晶结构;其中所述波长转换层整体厚度是由波长转换层顶面至所述磊晶结构的底面的厚度;或
算式二:视角=141.8-0.2709×反射墙的反射率%;其中视角调整结构包括一波长转换层及一反射墙,所述反射墙包覆所述磊晶结构与所述波长转换层;其中反射墙与波长转换层顶面等高;或
算式三:视角=141.9-0.2809×反射墙的反射率%;其中视角调整结构包括一波长转换层及一反射墙,所述反射墙包覆所述磊晶结构与所述波长转换层;其中反射墙高于波长转换层的顶面。
2.如权利要求1所述的可提供预定视角的发光二极管封装结构的成形方法,其特征在于,依据算式一,所述波长转换层延伸至所述磊晶结构的两侧,完全所述盖住所述磊晶结构。
3.如权利要求1所述的可提供预定视角的发光二极管封装结构的成形方法,其特征在于,所述波长转换层的宽度大于或等于所述磊晶结构的宽度。
4.如权利要求1所述的可提供预定视角的发光二极管封装结构的成形方法,其特征在于,依据算式三,所述反射墙超过所述波长转换层的顶面10~50μm。
5.如权利要求1所述的可提供预定视角的发光二极管封装结构的成形方法,其特征在于,所述承载基板具有电路结构,所述覆晶式芯片的所述电极电性接触于所述承载基板的所述电路结构。
6.一种可提供预定视角的发光二极管封装结构,其特征在于,其是利用权利要求1方式所形成。
7.一种发光二极管封装结构,其特征在于,包含:
一承载基板,具有电路结构;
一薄型化芯片位于所述承载基板上,所述薄型化芯片具有一磊晶结构、及位于其底面的成对电极,所述电极接触于所述电路结构;
一底胶,位于所述薄型化芯片的所述电极间的空隙以支撑所述薄型化芯片;
一波长转换层,至少覆盖于所述薄型化芯片的所述磊晶结构上;以及
一反射墙,环绕所述波长转换层与所述薄型化芯片,其中该反射墙的反射率大于70%,并且高于所述波长转换层顶面10~50μm。
8.如权利要求7所述的发光二极管封装结构,其特征在于,所述底胶为一不透光材料。
9.如权利要求7所述的发光二极管封装结构,其特征在于,上述发光二极管结构发出的光在光照角度±40度的光强度总和与在视角角度以内的光强面积比值需大于0.7;
其中0~10度,比值0.23~0.27;
其中10~40度,比值0.50~0.53。
10.一种可提供预定视角的发光二极管封装模块的成形方法,其特征在于,包括至少下列步骤:
放置数个覆晶式芯片于一承载基板上;
填入底胶于每一所述覆晶式芯片的电极间的空隙以支撑所述覆晶式芯片;
激光剥离每一所述覆晶式芯片的一成长基板而形成一薄型化芯片,并且外露出每一所述薄型化芯片的一磊晶结构;
粗化每一所述薄型化芯片外露的所述磊晶结构;
提供一视角调整结构于每一所述薄型化芯片;以及
选定一预定的视角,依据下列其中一算式调整所述视角调整结构以实现所述预定的视角,其中视角的单位为度;
算式一:视角=117+0.05×波长转换层整体厚度;其中所述视角调整结构包括一波长转换层,所述波长转换层贴附于所述磊晶结构;其中所述波长转换层整体厚度是由波长转换层顶面至所述磊晶结构的底面的厚度;或
算式二:视角=141.8-0.2709×反射墙的反射率%;其中视角调整结构包括一波长转换层及一反射墙,所述反射墙包覆所述磊晶结构与所述波长转换层;其中反射墙与波长转换层顶面等高;或
算式三:视角=141.9-0.2809×反射墙的反射率%;其中视角调整结构包括一波长转换层及一反射墙,所述反射墙包覆所述磊晶结构与所述波长转换层;其中反射墙高于波长转换层的顶面。
11.一种发光二极管封装模块,其特征在于,包括:
一承载基板,具有电路结构;
数个薄型化芯片置于所述承载基板上,每一所述薄型化芯片具有一磊晶结构、及位于其底面的成对电极,所述电极接触于所述电路结构;
一底胶,位于每一所述薄型化芯片的所述电极间的空隙以支撑所述薄型化芯片;
一波长转换层,至少覆盖于每一所述薄型化芯片的所述磊晶结构上;以及
一反射墙,环绕每一所述波长转换层与每一所述薄型化芯片,其中该反射墙的反射率大于70%,并且高于所述波长转换层顶面10~50μm。
12.如权利要求11所述的发光二极管封装模块,其特征在于,所述波长转换层的宽度大于或等于所述磊晶结构的宽度。
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CN111293199A (zh) | 2020-06-16 |
US10103291B2 (en) | 2018-10-16 |
KR20180086103A (ko) | 2018-07-30 |
US10141479B1 (en) | 2018-11-27 |
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US20180212106A1 (en) | 2018-07-26 |
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