CN108091357B - 半导体存储器装置及其操作方法 - Google Patents

半导体存储器装置及其操作方法 Download PDF

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Publication number
CN108091357B
CN108091357B CN201710577075.XA CN201710577075A CN108091357B CN 108091357 B CN108091357 B CN 108091357B CN 201710577075 A CN201710577075 A CN 201710577075A CN 108091357 B CN108091357 B CN 108091357B
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semiconductor memory
memory device
pvt
delay
clock
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CN108091357A (zh
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林相吾
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SK Hynix Inc
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SK Hynix Inc
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093Input synchronization
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2254Calibration

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  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Memory System (AREA)
CN201710577075.XA 2016-11-21 2017-07-14 半导体存储器装置及其操作方法 Active CN108091357B (zh)

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KR10-2016-0154976 2016-11-21
KR1020160154976A KR102649157B1 (ko) 2016-11-21 2016-11-21 반도체 메모리 장치 및 그것의 동작 방법

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CN108091357A CN108091357A (zh) 2018-05-29
CN108091357B true CN108091357B (zh) 2021-06-11

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US (1) US10074412B2 (ko)
KR (1) KR102649157B1 (ko)
CN (1) CN108091357B (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10796054B2 (en) * 2018-02-02 2020-10-06 Samsung Electronics Co., Ltd. Chip design method of optimizing circuit performance according to change in PVT operation conditions
CN110993005B (zh) * 2019-12-11 2021-03-26 海光信息技术股份有限公司 电路结构、芯片、训练方法及训练装置
US10978130B1 (en) * 2020-03-25 2021-04-13 Micron Technology, Inc. Temperature-based access timing for a memory device
JP7043578B1 (ja) 2020-12-18 2022-03-29 華邦電子股▲ふん▼有限公司 半導体記憶装置
TWI734656B (zh) * 2020-12-25 2021-07-21 華邦電子股份有限公司 半導體記憶裝置
KR102636380B1 (ko) * 2021-09-10 2024-02-15 에스케이키파운드리 주식회사 임베디드 플래시 메모리 및 그의 동작 방법
CN117153208A (zh) * 2022-05-23 2023-12-01 长鑫存储技术有限公司 一种延时调整方法、存储芯片架构和半导体存储器
CN116580742B (zh) * 2023-07-14 2023-09-26 芯天下技术股份有限公司 Nor flash的复位方法、装置、存储芯片及设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103258561A (zh) * 2012-02-20 2013-08-21 爱思开海力士有限公司 半导体装置的数据输出定时控制电路
US8847645B1 (en) * 2013-06-28 2014-09-30 SK Hynix Inc. Semiconductor device and semiconductor system including the same
CN104283556A (zh) * 2013-07-11 2015-01-14 爱思开海力士有限公司 时钟延迟检测电路及利用时钟延迟检测电路的半导体装置
CN104380650A (zh) * 2012-05-31 2015-02-25 松下知识产权经营株式会社 时钟转换电路、影像处理系统、以及半导体集成电路

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7253495B2 (en) * 2002-10-15 2007-08-07 Marvell World Trade Ltd. Integrated circuit package with air gap
US7936203B2 (en) * 2006-02-08 2011-05-03 Micron Technology, Inc. Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuit
KR101003126B1 (ko) * 2009-01-28 2010-12-21 주식회사 하이닉스반도체 멀티 페이즈 클럭 생성회로
KR101605463B1 (ko) * 2009-03-04 2016-03-22 삼성전자 주식회사 피브이티 변동에 둔감한 딜레이 라인을 갖는 지연 고정 루프회로
US8004345B2 (en) 2009-06-25 2011-08-23 International Business Machines Corporation Minimizing non-linearity errors
KR101075496B1 (ko) * 2010-07-06 2011-10-20 주식회사 하이닉스반도체 반도체 메모리 장치
KR101110795B1 (ko) * 2010-10-15 2012-02-27 주식회사 하이닉스반도체 임피던스 코드 생성회로 및 이를 포함하는 반도체 장치
KR101743115B1 (ko) * 2010-11-02 2017-06-02 삼성전자 주식회사 전압 검출 장치 및 이를 포함하는 반도체 장치
US20130076416A1 (en) 2011-09-23 2013-03-28 Conexant Systems, Inc. Sub-micron cmos vco that uses delay-based calibration and method of operation
KR101876997B1 (ko) 2012-01-19 2018-07-10 삼성전자 주식회사 오실레이터 오토 트리밍 방법 및 오실레이터 오토 트리밍 기능을 갖는 반도체 장치
KR20140030568A (ko) 2012-09-03 2014-03-12 에스케이하이닉스 주식회사 반도체 장치의 전압 트리밍 회로
KR20140146690A (ko) * 2013-06-17 2014-12-29 에스케이하이닉스 주식회사 지연 조정 회로

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103258561A (zh) * 2012-02-20 2013-08-21 爱思开海力士有限公司 半导体装置的数据输出定时控制电路
CN104380650A (zh) * 2012-05-31 2015-02-25 松下知识产权经营株式会社 时钟转换电路、影像处理系统、以及半导体集成电路
US8847645B1 (en) * 2013-06-28 2014-09-30 SK Hynix Inc. Semiconductor device and semiconductor system including the same
CN104283556A (zh) * 2013-07-11 2015-01-14 爱思开海力士有限公司 时钟延迟检测电路及利用时钟延迟检测电路的半导体装置

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US20180144781A1 (en) 2018-05-24
US10074412B2 (en) 2018-09-11
KR20180056971A (ko) 2018-05-30
KR102649157B1 (ko) 2024-03-20
CN108091357A (zh) 2018-05-29

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