CN107808829A - 一种针对微小焊盘芯片二次焊线方法 - Google Patents

一种针对微小焊盘芯片二次焊线方法 Download PDF

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CN107808829A
CN107808829A CN201710998512.5A CN201710998512A CN107808829A CN 107808829 A CN107808829 A CN 107808829A CN 201710998512 A CN201710998512 A CN 201710998512A CN 107808829 A CN107808829 A CN 107808829A
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chip
ball
pad
bonding wire
bonding
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彭林源
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Nanjing Mircobonding Technology Co Ltd
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Nanjing Mircobonding Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
    • H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4941—Connecting portions the connecting portions being stacked
    • H01L2224/4942—Ball bonds
    • H01L2224/49421—Ball bonds on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

本发明公开了一种针对微小焊盘芯片二次焊线方法，该方法步骤包括：首先在芯片焊盘上做植球,通过在基板上焊球(第一棒焊接)与焊线将植球连接(第二棒焊接)；然后在芯片植球点第二棒上面焊球通过焊线与基板焊盘焊接，形成二次焊线。本发明能够解决超过设计规范的需求二次焊线的电性能要求，不会造成焊线短路，塌陷等异常问题。

Description

一种针对微小焊盘芯片二次焊线方法
技术领域
本发明涉及微电子、芯片封装设计及焊线工艺等半导体制造领域，具体地说是涉及一种针对芯片设计中微小焊盘二次焊线工艺的方法,以满足产品电性能要求。
背景技术
在微电子、芯片封装,框架或基板材料等行业的设计,加工中,需要产品的设计尺寸在一定规范内,但偶尔因设计的改变或实际应用需要,会要求到超出设计规范的改动,针对微小芯片焊盘,当焊盘尺寸小于常规设计要求,而需要二次焊线时,这样的设计通常需要规避。
发明内容
为解决上述问题，本发明提供了一种针对微小焊盘芯片二次焊线方法，所述方法步骤包括：首先在芯片焊盘上做植球,通过在基板上焊球(第一棒焊接)与焊线将植球连接(第二棒焊接)；然后在芯片植球点第二棒上面焊球通过焊线与基板焊盘焊接，形成二次焊线。
所述方法包括两种芯片封装焊线方式:芯片对框架/基板和芯片对芯片的焊接。
所述双芯片方法包括：首先需要对二次焊线的焊盘大小做对比，确认在最小的焊盘上做叠球焊线，在较大焊盘上做并排焊线。芯片焊盘选择为并排焊线，左侧芯片焊盘做叠球焊线。线在左侧芯片焊盘上植球，然后在右侧芯片焊球后连接，紧接其后在左侧植球上焊球后与右侧焊盘上的植球焊接，完成二次焊线。
有益结果
本发明能够解决超过设计规范的需求二次焊线的电性能要求，不会造成焊线短路，塌陷等异常问题。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要的附图做简单的介绍：
图1是根据本发明实施例的一个焊接图；
图2是芯片与基板焊盘焊接的正视图；
图3是芯片与芯片焊接的正视图；
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。
实施例1
当同一微小芯片焊盘3或基板上焊盘7设计过小,但需求二次焊线时的解决方案:在芯片1与基板焊盘焊接时要求二次焊线，其焊线步骤为:首先在芯片焊盘上做植球6，下一步通过在基板上焊球4(第一棒焊接)与焊线5将植球6连接(第二棒焊接)；紧接着在芯片植球点第二棒上面焊球4通过焊线5与基板焊盘焊接，形成二次焊线。
所述方法包括两种芯片封装焊线方式:芯片对框架/基板和芯片对芯片的焊接。
所述双芯片方法包括：首先需要对二次焊线的焊盘大小做对比，确认在最小的焊盘上做叠球焊线，在较大焊盘上做并排焊线。芯片焊盘选择为并排焊线，左侧芯片焊盘做叠球焊线。线在左侧芯片焊盘上植球，然后在右侧芯片焊球后连接，紧接其后在左侧植球上焊球后与右侧焊盘上的植球焊接，完成二次焊线。
以上所述，仅为本发明最佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，根据本发明的技术方案及其发明构思加以等同替换或改变，都应涵盖在本发明的保护范围之内。

Claims (3)

1.一种针对微小焊盘芯片二次焊线方法，其特征在于，所述方法步骤包括：首先在芯片焊盘上做植球,通过在基板上焊球(第一棒焊接)与焊线将植球连接(第二棒焊接)；然后在芯片植球点第二棒上面焊球通过焊线与基板焊盘焊接，形成二次焊线。
2.根据权利要求1所述的方法，其特征在于，所述方法包括两种芯片封装焊线方式:芯片对框架/基板和芯片对芯片的焊接。
3.根据权利要求1所述的方法，其特征在于，所述双芯片方法包括：首先需要对二次焊线的焊盘大小做对比，确认在最小的焊盘上做叠球焊线，在较大焊盘上做并排焊线。芯片焊盘选择为并排焊线，左侧芯片焊盘做叠球焊线。线在左侧芯片焊盘上植球，然后在右侧芯片焊球后连接，紧接其后在左侧植球上焊球后与右侧焊盘上的植球焊接，完成二次焊线。
CN201710998512.5A 2017-10-24 2017-10-24 一种针对微小焊盘芯片二次焊线方法 Pending CN107808829A (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1642391A (zh) * 2004-01-18 2005-07-20 敦南科技股份有限公司 电路板封装的焊线方法
US20070215993A1 (en) * 2006-03-16 2007-09-20 Advanced Semiconductor Engineering Inc. Chip Package Structure
CN103327737A (zh) * 2012-03-22 2013-09-25 鸿富锦精密工业（深圳）有限公司 芯片组装结构及芯片组装方法
CN103378046A (zh) * 2012-04-26 2013-10-30 鸿富锦精密工业（深圳）有限公司 芯片组装结构及芯片组装方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1642391A (zh) * 2004-01-18 2005-07-20 敦南科技股份有限公司 电路板封装的焊线方法
US20070215993A1 (en) * 2006-03-16 2007-09-20 Advanced Semiconductor Engineering Inc. Chip Package Structure
TW200737445A (en) * 2006-03-16 2007-10-01 Advanced Semiconductor Eng Chip package structure
CN103327737A (zh) * 2012-03-22 2013-09-25 鸿富锦精密工业（深圳）有限公司 芯片组装结构及芯片组装方法
CN103378046A (zh) * 2012-04-26 2013-10-30 鸿富锦精密工业（深圳）有限公司 芯片组装结构及芯片组装方法

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