CN107683032A - Two-sided etching burying capacitance circuit board manufacture craft - Google Patents
Two-sided etching burying capacitance circuit board manufacture craft Download PDFInfo
- Publication number
- CN107683032A CN107683032A CN201710772008.3A CN201710772008A CN107683032A CN 107683032 A CN107683032 A CN 107683032A CN 201710772008 A CN201710772008 A CN 201710772008A CN 107683032 A CN107683032 A CN 107683032A
- Authority
- CN
- China
- Prior art keywords
- layer
- copper foil
- internal
- acoustic aperture
- foil layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a kind of two-sided etching burying capacitance circuit board manufacture craft, first etched simultaneously on the two-sided copper foil layer of internal substrate and bury appearance figure in what is be dislocatedly distributed, then dielectric layer and outer copper foil layer are pressed again, final etch outer-layer circuit figure, obtain two-sided etching burying capacitance circuit board.Present invention reduces the wiring board technological process of production, reduce the loss and unnecessary carrying action of process materials, greatly reduce manufacturing cost, solve tradition and bury the easy plate damage of the two-sided etching of capacity materials, and can only the etching of gradation one side problem;It can make to bury and hold the directly two-sided pressing of plate, process plate damage can be greatly reduced, and can effectively control material harmomegathus and deformation, lift the reliability of product;Can meet the demand that client makes to the NPTH acoustic aperture shading ring of small spacing, and can be outstanding control acoustic aperture and shading ring concentricity, acoustic aperture caused by solving the problems, such as existing process off normal and shading ring concentricity deficiency.
Description
Technical field
The invention belongs to printed substrate technical field, particularly relates to a kind of two-sided etching burying capacitance circuit board and makes
Technique.
Background technology
Existing burying capacitance circuit board, due to burying capacity materials self structure low intensity, lack burying for support and hold layer material easily
Breakage, therefore existing burying capacitance circuit board is making, generally use " etching bury the first face of capacity materials figure → picture surface pressing →
The picture surface pressing of the face of the second face of capacity materials figure → second is buried in etching " technique complete.Such a mode can avoid burying appearance layer
Two-sided while exposed no support causes breakage, the problem of causing condenser failure.But the wiring board processing process of such a mode
The loss of long, process materials, the deformation of with high costs and material harmomegathus are whard to control, with the lifting of product reliability requirement, into
The demand of this reduction, bury capacity materials by several times etching one side figure technique there is an urgent need to reform.
The content of the invention
In order to overcome drawbacks described above, the invention provides a kind of two-sided etching burying capacitance circuit board manufacture craft, reduces circuit
Plate manufacturing cost, improve the reliability of wiring board.
The present invention in order to solve its technical problem used by technical scheme be:
A kind of two-sided etching burying capacitance circuit board manufacture craft, comprises the following steps:
Step 1, some internal substrates, intermediate dielectric layer and outer copper foil layer are prepared, the internal substrate is situated between including internal layer
Electric layer and the first internal layer copper foil layer and the second internal layer copper foil layer on two relative sides of the inner layer dielectric layer;
Step 2, it will simultaneously be etched on the first internal layer copper foil layer and the second internal layer copper foil layer of the internal substrate and bury appearance
Figure, capacitor layers are formed, the two neighboring gap portion held between figure that buries is designated as the first figure on the first internal layer copper foil layer
Shape spacing, the two neighboring gap portion held between figure that buries is designated as second graph spacing, institute on the second internal layer copper foil layer
It is in be dislocatedly distributed that the first figure spacing and second graph spacing, which are stated, on the inner layer dielectric layer;
Step 3, according to the order of outer copper foil layer, intermediate dielectric layer, capacitor layers, intermediate dielectric layer and outer copper foil layer,
The capacitor layers, intermediate dielectric layer and outer copper foil are laminated to close and form one, obtains pressing printed board;
Step 4, outer-layer circuit figure will be etched on two outer copper foil layers of the pressing printed board, obtains two-sided erosion
Carve burying capacitance circuit board.
As a further improvement on the present invention, in the step 3, if the capacitor layers are dried layer, and adjacent two layers electric capacity
Intermediate dielectric layer is provided between layer.
As a further improvement on the present invention, in the step 1, the first internal layer copper foil layer of the internal substrate, second
It is provided with least one of which of internal layer copper foil layer and the outer copper foil layer in the periphery of default acoustic aperture position and stops electric current
The shading ring in loop.
As a further improvement on the present invention, in the step 4, first on the default acoustic aperture position of the pressing printed board
Acoustic aperture is drilled out, then while outer-layer circuit figure is etched on two outer copper foil layers of the pressing printed board by described in
Acoustic aperture etched in hole, the acoustic aperture is located at the portion perimeter of copper foil layer and forms acoustic aperture shading ring.
The beneficial effects of the invention are as follows:
1st, solve tradition and bury the two-sided etching of capacity materials easy plate damage, and can only the etching of gradation one side problem;
2nd, significantly shorten flow and reduce difficulty of processing, improve production efficiency and reduce cost, and in processing work
It is obviously improved in terms of skill, the reliability of product;
3rd, the corresponding shading ring needed for NPTH acoustic aperture is produced using the method for anti-etch-back after drilling, solves existing process
The problem of acoustic aperture caused by off normal is with shading ring concentricity deficiency.
Brief description of the drawings
Fig. 1 is internal substrate structural representation of the present invention;
Fig. 2 is the structural representation of capacitor layers of the present invention;
Fig. 3 is pressing printed board schematic of the present invention;
Fig. 4 is pressing another example structure schematic diagram of printed board of the present invention;
Fig. 5 is copper foil layer top view of the present invention;
Fig. 6 is the shading ring structural representation of blocking current loop of the present invention;
Fig. 7 is acoustic aperture structural representation of the present invention;
Fig. 8 is acoustic aperture of the present invention and acoustic aperture shading ring structural representation.
With reference to accompanying drawing, make the following instructions:
1 --- internal substrate;2 --- intermediate dielectric layer;
3 --- outside copper foil layer;4 --- stop the shading ring of current loop;
5 --- acoustic aperture;6 --- acoustic aperture shading ring;
10 --- capacitor layers;11 --- inner layer dielectric layer;
12 --- the first internal layer copper foil layer;13 --- the second internal layer copper foil layer;
14 --- the first figure spacing;15 --- second graph spacing.
Embodiment
With reference to accompanying drawing, the present invention is elaborated, but protection scope of the present invention is not limited to following embodiments, i.e., in every case
The simple equivalent changes and modifications made with scope of the present invention patent and description, all still belong to patent of the present invention and contain
Within the scope of lid.
Refering to Fig. 1-4, it is a kind of two-sided etching burying capacitance circuit board manufacture craft of the present invention, comprises the following steps:
Step 1, internal substrate 1, intermediate dielectric layer 2 and outer copper foil layer 3 are prepared, wherein, internal substrate is situated between including internal layer
Electric layer 11 and the first internal layer copper foil layer 12 and the second internal layer copper foil layer 13 on two relative sides of the inner layer dielectric layer,
Refering to Fig. 1;
Step 2, it will simultaneously be etched on the first internal layer copper foil layer and the second internal layer copper foil layer of internal substrate 1 and bury appearance figure
Shape, capacitor layers 10 are formed, the two neighboring gap portion held between figure that buries is designated as the first figure on the first internal layer copper foil layer 12
Spacing 15, the two neighboring gap portion held between figure that buries is designated as second graph spacing 16 on the second internal layer copper foil layer 13, the
One figure spacing and second graph spacing on the internal substrate where it inner layer dielectric layer in being dislocatedly distributed, refering to Fig. 2;
Step 3, according to the order of outer copper foil layer, intermediate dielectric layer, capacitor layers, intermediate dielectric layer and outer copper foil layer,
Capacitor layers, intermediate dielectric layer and outer copper foil are laminated to close and form one, obtains pressing printed board, wherein, Fig. 3 is set to be a kind of
The example of one layer capacitance layer, Fig. 4 are the example for setting two layers of capacitor layers, when setting two layers or during multi-layer capacity layer, adjacent two electricity
Need to set intermediate dielectric layer before pressing again between appearance layer;
Step 4, outer-layer circuit figure will be etched on two outer copper foil layers of the pressing printed board, obtains two-sided erosion
Carve burying capacitance circuit board.
It is above-mentioned two-sided etching burying capacitance circuit board of the invention its acoustic aperture manufacture craft when making, such as refering to Fig. 5-8
Under:
In above-mentioned steps 1, by the first internal layer copper foil layer 11, the second internal layer copper foil layer 12 and outer layer of internal substrate 1
The shading ring 4 for stopping current loop is set at least one of which of copper foil layer 3 in the periphery of default acoustic aperture position, then upper
State in step 4, first drill out acoustic aperture 5 on the default acoustic aperture position of pressing printed board, then in two outer layers of pressing printed board
The acoustic aperture etch in hole while etching outer-layer circuit figure on copper foil layer, acoustic aperture is located at the part of copper foil layer
Periphery forms acoustic aperture shading ring 6.
The present invention buries the spacing staggered floor design for holding layer two-side graph, i.e. the first figure spacing and second in initial designs
Figure spacing on the internal substrate where it inner layer dielectric layer in being dislocatedly distributed, ensure that most one sides bury hold layer can be naked
Dew, i.e., first and second figure spacing staggers, and guarantee is buried appearance dielectric layer at least single-sided conductive copper foil and supported.
During to ensure electroplated ni au surface treatment, ni/au layers will not be plated at the anti-etch-back of acoustic aperture 5, in the sound of anti-etch-back
The default circle in the periphery of hole shading ring 6 blocks the shading ring 4 of current loop.
As can be seen here, present invention reduces the wiring board technological process of production, the loss of process materials and unnecessary is reduced
Carrying acts, and greatly reduces manufacturing cost, solves tradition and buries the easy plate damage of the two-sided etching of capacity materials, and can only gradation one side
The problem of etching;Can make to bury and hold the directly two-sided pressing of plate, process plate damage can be greatly reduced, and can effectively control material harmomegathus and
Deformation, lift the reliability of product;The demand that client makes to the NPTH acoustic aperture shading ring of small spacing can be met, and can be outstanding
Acoustic aperture and the concentricity of shading ring are controlled, acoustic aperture caused by solving existing process off normal is asked with shading ring concentricity deficiency
Topic.
Claims (4)
1. a kind of two-sided etching burying capacitance circuit board manufacture craft, it is characterised in that comprise the following steps:
Step 1, some internal substrates (1), intermediate dielectric layer (2) and outer copper foil layer (3) are prepared, the internal substrate includes interior
Layer dielectric layer (11) and the first internal layer copper foil layer (12) and the second internal layer on two relative sides of the inner layer dielectric layer
Copper foil layer (13);
Step 2, it will simultaneously be etched on the first internal layer copper foil layer and the second internal layer copper foil layer of the internal substrate and bury appearance figure,
Capacitor layers (10) are formed, the two neighboring gap portion held between figure that buries is designated as the first figure on the first internal layer copper foil layer
Spacing (14), the two neighboring gap portion held between figure that buries is designated as second graph spacing on the second internal layer copper foil layer
(15), the first figure spacing and second graph spacing are in be dislocatedly distributed on the inner layer dielectric layer;
Step 3, according to the order of outer copper foil layer, intermediate dielectric layer, capacitor layers, intermediate dielectric layer and outer copper foil layer, by institute
State capacitor layers, intermediate dielectric layer and outer copper foil lamination to close and form one, obtain pressing printed board;
Step 4, outer-layer circuit figure will be etched on two outer copper foil layers of the pressing printed board, obtains two-sided etching and bury
Hold wiring board.
2. two-sided etching burying capacitance circuit board manufacture craft according to claim 1, it is characterised in that:In the step 3, institute
If it is dried layer to state capacitor layers, and intermediate dielectric layer is provided between adjacent two layers capacitor layers.
3. two-sided etching burying capacitance circuit board manufacture craft according to claim 1, it is characterised in that:In the step 1, institute
State at least one of which of the first internal layer copper foil layer of internal substrate, the second internal layer copper foil layer and the outer copper foil layer
The periphery of default acoustic aperture position is provided with the shading ring (4) for stopping current loop.
4. two-sided etching burying capacitance circuit board manufacture craft according to claim 3, it is characterised in that:In the step 4, first
Acoustic aperture (5) is drilled out on the default acoustic aperture position of the pressing printed board, then in two outer layer copper of the pressing printed board
The acoustic aperture etch in hole while etching outer-layer circuit figure in layers of foil, the acoustic aperture is located at the portion of copper foil layer
Exceptionally week forms acoustic aperture shading ring (6).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710772008.3A CN107683032A (en) | 2017-08-31 | 2017-08-31 | Two-sided etching burying capacitance circuit board manufacture craft |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710772008.3A CN107683032A (en) | 2017-08-31 | 2017-08-31 | Two-sided etching burying capacitance circuit board manufacture craft |
Publications (1)
Publication Number | Publication Date |
---|---|
CN107683032A true CN107683032A (en) | 2018-02-09 |
Family
ID=61136165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710772008.3A Pending CN107683032A (en) | 2017-08-31 | 2017-08-31 | Two-sided etching burying capacitance circuit board manufacture craft |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107683032A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111343553A (en) * | 2020-04-09 | 2020-06-26 | 江苏普诺威电子股份有限公司 | MEMS microphone cavity plate with high alignment precision and manufacturing method thereof |
CN112218449A (en) * | 2019-07-09 | 2021-01-12 | 梅州市鸿利线路板有限公司 | Double-sided circuit board processing technology |
CN114585157A (en) * | 2020-12-01 | 2022-06-03 | 深南电路股份有限公司 | Capacitor-embedded circuit board and manufacturing method thereof |
CN115483033A (en) * | 2022-09-02 | 2022-12-16 | 深圳聚源新材科技有限公司 | Capacitor, circuit board and circuit board embedding process |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101009970A (en) * | 2006-01-24 | 2007-08-01 | 财团法人工业技术研究院 | Multi-functional compound substrate structure |
CN101465626A (en) * | 2007-12-19 | 2009-06-24 | 中国科学院微电子研究所 | Broadband low-pass high-frequency filter based on embedded capacitor |
CN102543426A (en) * | 2010-12-29 | 2012-07-04 | 深南电路有限公司 | Built-in capacitor and manufacturing method thereof |
CN103140050A (en) * | 2011-12-05 | 2013-06-05 | 深南电路有限公司 | Machining method of burying capacitance circuit board |
CN103313524A (en) * | 2012-03-16 | 2013-09-18 | 联想(北京)有限公司 | Capacitor configuration method, electronic equipment and printed circuit board |
CN104470203A (en) * | 2013-09-25 | 2015-03-25 | 深南电路有限公司 | HDI circuit board and interlayer interconnection structure and machining method thereof |
CN105392302A (en) * | 2015-11-24 | 2016-03-09 | 安捷利电子科技(苏州)有限公司 | Method for preparing embedded-capacitor circuit board |
CN105934094A (en) * | 2016-06-21 | 2016-09-07 | 深圳市景旺电子股份有限公司 | Circuit board with embedded capacitor and manufacturing method of circuit board |
CN106658964A (en) * | 2015-10-28 | 2017-05-10 | 碁鼎科技秦皇岛有限公司 | Circuit board and production method thereof |
CN107046778A (en) * | 2017-03-04 | 2017-08-15 | 吉安市满坤科技有限公司 | A kind of preparation method of buried capacitor printed circuit board |
-
2017
- 2017-08-31 CN CN201710772008.3A patent/CN107683032A/en active Pending
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101009970A (en) * | 2006-01-24 | 2007-08-01 | 财团法人工业技术研究院 | Multi-functional compound substrate structure |
CN101465626A (en) * | 2007-12-19 | 2009-06-24 | 中国科学院微电子研究所 | Broadband low-pass high-frequency filter based on embedded capacitor |
CN102543426A (en) * | 2010-12-29 | 2012-07-04 | 深南电路有限公司 | Built-in capacitor and manufacturing method thereof |
CN103140050A (en) * | 2011-12-05 | 2013-06-05 | 深南电路有限公司 | Machining method of burying capacitance circuit board |
CN103313524A (en) * | 2012-03-16 | 2013-09-18 | 联想(北京)有限公司 | Capacitor configuration method, electronic equipment and printed circuit board |
CN104470203A (en) * | 2013-09-25 | 2015-03-25 | 深南电路有限公司 | HDI circuit board and interlayer interconnection structure and machining method thereof |
CN106658964A (en) * | 2015-10-28 | 2017-05-10 | 碁鼎科技秦皇岛有限公司 | Circuit board and production method thereof |
CN105392302A (en) * | 2015-11-24 | 2016-03-09 | 安捷利电子科技(苏州)有限公司 | Method for preparing embedded-capacitor circuit board |
CN105934094A (en) * | 2016-06-21 | 2016-09-07 | 深圳市景旺电子股份有限公司 | Circuit board with embedded capacitor and manufacturing method of circuit board |
CN107046778A (en) * | 2017-03-04 | 2017-08-15 | 吉安市满坤科技有限公司 | A kind of preparation method of buried capacitor printed circuit board |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112218449A (en) * | 2019-07-09 | 2021-01-12 | 梅州市鸿利线路板有限公司 | Double-sided circuit board processing technology |
CN111343553A (en) * | 2020-04-09 | 2020-06-26 | 江苏普诺威电子股份有限公司 | MEMS microphone cavity plate with high alignment precision and manufacturing method thereof |
CN111343553B (en) * | 2020-04-09 | 2021-02-19 | 江苏普诺威电子股份有限公司 | MEMS microphone cavity plate with high alignment precision and manufacturing method thereof |
CN114585157A (en) * | 2020-12-01 | 2022-06-03 | 深南电路股份有限公司 | Capacitor-embedded circuit board and manufacturing method thereof |
CN115483033A (en) * | 2022-09-02 | 2022-12-16 | 深圳聚源新材科技有限公司 | Capacitor, circuit board and circuit board embedding process |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107683032A (en) | Two-sided etching burying capacitance circuit board manufacture craft | |
CN101695224B (en) | Method for processing multilayer printed circuit board | |
CN107960019A (en) | A kind of PCB production methods for realizing zero stub and PCB | |
CN101990355B (en) | Soft-hard circuit board and process thereof | |
WO2005013653A1 (en) | Printed-wiring board and method of producing the same | |
CN104244597A (en) | Method for manufacturing coreless substrates of symmetrical structure | |
CN106163120A (en) | Control processing method and the circuit board of deep stepped hole | |
JP2011129665A (en) | Method of manufacturing laminated wiring board | |
CN102045964B (en) | Making method of circuit board | |
US10609824B2 (en) | Manufacturing method of a multi-layer circuit board | |
CN105578704A (en) | Multilayer flexible circuit board and manufacturing method thereof | |
CN103517581B (en) | A kind of multi-layer PCB board manufacture method and multi-layer PCB board | |
CN104685978A (en) | Multilayer wiring board, and method for manufacturing multilayer wiring board | |
CN104902675B (en) | A kind of step groove circuit board and its processing method | |
CN104902683A (en) | Step-groove circuit board and processing method thereof | |
CN104902700B (en) | The processing method of inner-layer thick copper circuit board and inner-layer thick copper circuit board | |
CN106550555B (en) | A kind of odd number layer package substrate and its processing method | |
CN104902698A (en) | A circuit board golden finger processing method and a circuit board having golden fingers | |
JP2012089818A (en) | Laminate type ceramic electronic component manufacturing method | |
CN206100600U (en) | Pcb | |
CN110300498A (en) | A kind of multilayer circuit board laminated structure | |
JPWO2011152085A1 (en) | Manufacturing method of aggregate substrate | |
JP2017098390A (en) | Wiring board manufacturing method | |
CN104754868A (en) | Circuit board and implementation method for interlayer interconnection structure thereof and processing method for circuit board | |
CN212910168U (en) | Multilayer circuit board that roughness is high |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180209 |