CN206100600U - Pcb - Google Patents

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Publication number
CN206100600U
CN206100600U CN201621007948.0U CN201621007948U CN206100600U CN 206100600 U CN206100600 U CN 206100600U CN 201621007948 U CN201621007948 U CN 201621007948U CN 206100600 U CN206100600 U CN 206100600U
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CN
China
Prior art keywords
layer
composite bed
line layer
pcb board
wiring underlayer
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CN201621007948.0U
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Chinese (zh)
Inventor
张传明
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MFS TECHNOLOGY (HUNAN) CO LTD
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MFS TECHNOLOGY (HUNAN) CO LTD
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Priority to CN201621007948.0U priority Critical patent/CN206100600U/en
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Abstract

The utility model discloses a PCB, include from the last at least two -layer composite bed of down arranging in proper order, the composite bed includes line layer and insulating layer, the line layer is by constituteing via the upper of twice figure transfer and etching formation and lower floor respectively, the lower floor of line layer inlays the upper surface of insulating layer, the lower surface of the insulating layer in the adjacent composite bed in top is inlayed on the upper strata of the line layer in each composite bed. The utility model discloses the size is less, the circuit is more intensive, the line layer is thicker, has improved product electrical apparatus performance and quality.

Description

A kind of pcb board
Technical field
More particularly to a kind of pcb board of this utility model.
Background technology
As shown in figure 1, existing pcb board includes the line layer of insulating barrier 11 and laminating hot pressing on 11 surface of insulating barrier 12, wherein line layer 12 is shifted by Copper Foil Jing singles figure and etching is formed.
Side corrosion size during due to etching is closely bound up with the line-spacing size of required etch copper thickness and line layer 12, if setting The copper thickness of meter is larger, then side corrosion is larger, and the side Compensation that need to subsequently do is also larger, therefore it is required that the line of line layer 12 Away from also larger, so as to cause circuit sparse, pcb board size is larger.
Therefore, in order to by pcb board size limitation, within the specific limits, in existing pcb board, 12 thickness of line layer is respectively less than 3 ounces.
With the development of PCB industries, it is desirable to which pcb board is smaller, circuit is more dense, line layer 12 is thicker, existing PCB Hardened structure obviously can not take into account above-mentioned technical requirements simultaneously.
The content of the invention
The purpose of this utility model is, for above-mentioned the deficiencies in the prior art, there is provided a kind of size is less, circuit is closeer The thicker pcb board of collection, line layer.
To solve above-mentioned technical problem, the technical scheme adopted by this utility model is:
A kind of pcb board, including at least two-layer composite bed being arranged in order from top to bottom;The composite bed include line layer and Insulating barrier, the line layer are made up of the upper and lower shifted via secondary image respectively and etching is formed, the line layer Lower floor be embedded in the upper surface of the insulating barrier;It is adjacent compound that the upper strata of the line layer in each composite bed is embedded in top The lower surface of the insulating barrier in layer.
By said structure, in the case of circuit thickness degree identical, compared to structure of the prior art, due to this reality It is divided into the upper and lower with new middle line layer, the upper and lower are shifted via secondary image respectively and etched and formed, therefore this In application, the depth of single etch only has half of the prior art, it is therefore desirable to side Compensation also only have prior art in Half, therefore the line-spacing in wiring board equally only has half of the prior art, due to circuit closeness it is high, therefore pcb board Size greatly reduce.During design, can on cloth on the PCB of same unit area more circuits, meet more electrical equipment Performance requirement.
Further, the upper surface of the line layer in the composite bed of the top is covered with upper anti-solder ink layer.
Upper anti-solder ink layer is used for the problems such as circuit oxidation, open circuit or short circuit for preventing the line layer of the top from occurring.
Further, also include the wiring underlayer layer under the composite bed of bottom, the wiring underlayer layer by point The upper and lower composition for being formed is not shifted and is etched via secondary image, and the upper strata of the wiring underlayer layer is embedded in bottom The lower surface of the insulating barrier in composite bed.
Further, the underlying surfaces of the wiring underlayer layer are covered with lower anti-solder ink layer.
Lower anti-solder ink layer is used for the problems such as circuit oxidation, open circuit or short circuit for preventing wiring underlayer layer from occurring.
Further, in the composite bed, the thickness of line layer is more than 7 ounces.
Further, the thickness of the wiring underlayer layer is more than 7 ounces.
Compared to line layer of the prior art, the thickness of line layer and wiring underlayer layer in this utility model composite bed Can accomplish bigger.
Based on same inventive concept, this utility model also invented a kind of pcb board, including one layer of composite bed;It is described multiple Closing layer includes line layer and insulating barrier, and the line layer is by the upper and lower shifted via secondary image respectively and etching is formed Composition, the lower floor of the line layer are embedded in the upper surface of the insulating barrier.
Further, the upper surface of the line layer in the composite bed is covered with anti-solder ink layer.
Further, also include the wiring underlayer layer under composite bed, the wiring underlayer layer is by respectively via two The upper and lower composition that secondary figure transfer and etching are formed, the upper strata of the wiring underlayer layer is embedded in the insulation in composite bed The lower surface of layer.
Further, the underlying surfaces of the wiring underlayer layer are covered with lower anti-solder ink layer.
Compared with prior art, this utility model size is less, circuit comparatively dense, line layer are thicker, improves product electricity Device performance and quality.
Description of the drawings
Fig. 1 is prior art construction schematic diagram.
Fig. 2 is one example structure schematic diagram of this utility model.
Wherein, 1 is composite bed, and 11 is insulating barrier, and 12 is line layer, and 2 is wiring underlayer layer, and 3 is upper anti-solder ink layer, 4 For lower anti-solder ink layer.
Specific embodiment
As shown in Fig. 2 an embodiment of the present utility model includes 3 layers of composite bed 1 being arranged in order from top to bottom;It is described multiple Closing layer 1 includes line layer 12 and insulating barrier 11, and the line layer 12 is by shifting via secondary image respectively and that etching is formed is upper Layer and lower floor's composition, the lower floor of the line layer 12 are embedded in the upper surface of the insulating barrier 11;Circuit in each composite bed 1 The upper strata of layer 12 is embedded in the lower surface of the insulating barrier 11 in the adjacent composite bed 1 in top.Also include positioned at the compound of bottom Wiring underlayer layer 2 under layer 1, the wiring underlayer layer 2 by shift via secondary image respectively and the upper strata that formed of etching with Lower floor constitutes, and the upper strata of the wiring underlayer layer 2 is embedded in the lower surface of the insulating barrier 11 in bottom composite bed 1.
The upper surface of the line layer 12 in the composite bed 1 of the top is covered with upper anti-solder ink layer 3.
The underlying surfaces of the wiring underlayer layer 2 are covered with lower anti-solder ink layer 4.
In the composite bed 1, the thickness of line layer 12 is more than 7 ounces.The thickness of the wiring underlayer layer 2 is more than 7 ounces.
In this utility model, the line layer 12 in wiring underlayer layer 2 and all composite beds 1 is using pure copper foil processing life Produce, all press corresponding insulating barrier 11 per sandwich circuit layer 12 after the transfer of first time figure and etching is completed, then do second figure Shape is shifted and is etched.For different requirements, different lamination number of times and laminated stacked plate structure can be adopted from monolayer to multilamellar, Produce and meet the different thick copper dense wire pcb boards for requiring of client.
The manufacturing process of the present embodiment is as follows:
The line layer 12 in wiring underlayer layer 2 and all composite beds 1 is carried out into the figure transfer of half storey first and is etched, then To complete in the middle of the transfer of first time figure and the lower floor of second layer line layer 12 for etching and the upper strata of third layer line layer 12 Press plus insulating barrier 11(Complete in second layer line layer 12 first time figure transfer and etch half storey upward, third layer Complete in line layer 12 first time figure transfer and etch half storey down), then to the upper strata of second layer line layer 12 and The lower floor of third layer line layer 12 carries out second figure transfer and etching, will then complete the transfer of first time figure and etch Ground floor line layer 12 lower floor and complete in the middle of the upper strata of the transfer of second figure and the second layer line layer 12 for etching Pressed plus insulating barrier 11, the upper strata of the transfer of first time figure and the wiring underlayer layer 2 for etching will be completed and completed The lower floor of second figure transfer and the third layer line layer 12 for etching is pressed plus insulating barrier 11, finally to the first layer line The upper strata of road floor 12 and the lower floor of wiring underlayer floor 2 carry out second figure transfer and etching, on the upper strata of first line layer 12 Anti-solder ink layer 3 in surface-coated, the anti-solder ink layer 4 under the underlying surfaces coating of wiring underlayer layer 2, that is, obtain such as Fig. 2 institutes The pcb board for showing.
Wiring underlayer layer 2 and lower anti-solder ink layer 4 in the present embodiment can also, only retain three layers of 1 He of composite bed Upper anti-solder ink layer 3, obtains another embodiment of the present utility model.
Another embodiment of the present utility model is:Pcb board is provided only with monolayer composite bed 1, for this kind of situation, described compound Layer 1 includes line layer 12 and insulating barrier 11, and the line layer 12 is by the upper strata shifted via secondary image respectively and etching is formed Constitute with lower floor, the lower floor of the line layer 12 is embedded in the upper surface of the insulating barrier 11.Also include under composite bed 1 Wiring underlayer layer 2, the wiring underlayer layer 2 is by shifting via secondary image respectively and the upper and lower group that formed of etching Into the upper strata of the wiring underlayer layer 2 is embedded in the lower surface of the insulating barrier 11 in composite bed 1.
The upper surface of the line layer 12 in the composite bed 1 is covered with anti-solder ink layer 3.The wiring underlayer layer 2 Underlying surfaces are covered with lower anti-solder ink layer 4.
Embodiment of the present utility model is described above in conjunction with accompanying drawing, but this utility model is not limited to The specific embodiment stated, above-mentioned specific embodiment be only it is schematic rather than circumscribed, this area it is common Technical staff under enlightenment of the present utility model, without departing from this utility model objective and scope of the claimed protection situation Under, many forms can be also made, these are belonged within protection domain of the present utility model.

Claims (10)

1. a kind of pcb board, it is characterised in that including at least two-layer composite bed being arranged in order from top to bottom(1);The composite bed (1)Including line layer(12)And insulating barrier(11), the line layer(12)Formed by shifting via secondary image respectively and etching The upper and lower composition, the line layer(12)Lower floor be embedded in the insulating barrier(11)Upper surface;
Each composite bed(1)In line layer(12)Upper strata be embedded in the adjacent composite bed in top(1)In insulating barrier(11) Lower surface.
2. pcb board as claimed in claim 1, it is characterised in that positioned at the composite bed of the top(1)In line layer(12)'s Upper surface is covered with anti-solder ink layer(3).
3. pcb board as claimed in claim 1 or 2, it is characterised in that also include the composite bed positioned at bottom(1)Under Wiring underlayer layer(2), the wiring underlayer layer(2)By the upper and lower group for shifting via secondary image respectively and etching is formed Into the wiring underlayer layer(2)Upper strata be embedded in bottom composite bed(1)In insulating barrier(11)Lower surface.
4. pcb board as claimed in claim 3, it is characterised in that the wiring underlayer layer(2)Underlying surfaces be covered with down it is anti-welding Ink layer(4).
5. pcb board as claimed in claim 1 or 2, it is characterised in that the composite bed(1)Middle line layer(12)Thickness it is big In 7 ounces.
6. pcb board as claimed in claim 3, it is characterised in that the wiring underlayer layer(2)Thickness be more than 7 ounces.
7. a kind of pcb board, it is characterised in that including one layer of composite bed(1);The composite bed(1)Including line layer(12)And absolutely Edge layer(11), the line layer(12)It is made up of the upper and lower shifted via secondary image respectively and etching is formed, it is described Line layer(12)Lower floor be embedded in the insulating barrier(11)Upper surface.
8. pcb board as claimed in claim 7, it is characterised in that the composite bed(1)In line layer(12)Upper surface It is covered with anti-solder ink layer(3).
9. pcb board as claimed in claim 7 or 8, it is characterised in that also include positioned at composite bed(1)Under wiring underlayer Layer(2), the wiring underlayer layer(2)It is made up of the upper and lower shifted via secondary image respectively and etching is formed, it is described Wiring underlayer layer(2)Upper strata be embedded in composite bed(1)In insulating barrier(11)Lower surface.
10. pcb board as claimed in claim 9, it is characterised in that the wiring underlayer layer(2)Underlying surfaces be covered with it is lower anti- Solder paste layer of ink(4).
CN201621007948.0U 2016-08-31 2016-08-31 Pcb Active CN206100600U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621007948.0U CN206100600U (en) 2016-08-31 2016-08-31 Pcb

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621007948.0U CN206100600U (en) 2016-08-31 2016-08-31 Pcb

Publications (1)

Publication Number Publication Date
CN206100600U true CN206100600U (en) 2017-04-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621007948.0U Active CN206100600U (en) 2016-08-31 2016-08-31 Pcb

Country Status (1)

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CN (1) CN206100600U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108601111A (en) * 2018-05-23 2018-09-28 深圳市新宜康科技股份有限公司 The production method of the accurate controllable type fever tablet of size

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108601111A (en) * 2018-05-23 2018-09-28 深圳市新宜康科技股份有限公司 The production method of the accurate controllable type fever tablet of size
CN108601111B (en) * 2018-05-23 2021-02-12 深圳市新宜康科技股份有限公司 Manufacturing method of heating sheet with accurate and controllable size

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