CN205984970U - Multilayer electron bearing structure - Google Patents
Multilayer electron bearing structure Download PDFInfo
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- CN205984970U CN205984970U CN201620929946.0U CN201620929946U CN205984970U CN 205984970 U CN205984970 U CN 205984970U CN 201620929946 U CN201620929946 U CN 201620929946U CN 205984970 U CN205984970 U CN 205984970U
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- bearing structure
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Abstract
The utility model relates to a multilayer electron bearing structure, the structure includes the pin, the pin includes first layer characteristic layer (1), second floor characteristic layer (2) and third layer characteristic layer (3), second floor characteristic layer (2) and third layer characteristic layer (3) form through once electroplating, third layer characteristic layer (3) is not less than first layer characteristic layer (1), first layer characteristic layer (1), second floor characteristic layer (2) and the outer cladding in third layer characteristic layer (3) have dielectric material (4), third layer characteristic layer (3) surface is provided with little etching recess (5). The utility model relates to a multilayer electron bearing structure, it has been solved, and the traditional handicraft is unable to realize or the shortcoming of cost cycle inferior position that the thickness of product is possible ultra -thin moreover to the competitive advantage of product on market is greatly improved.
Description
Technical field
This utility model is related to a kind of multi-layer support structure, belongs to technical field of semiconductor encapsulation.
Background technology
Current semicon industry, electronic component its size of demand that becomes increasingly complex is less and less, such as computer and electricity
The integrated level more and more higher of the consumer electronics such as letter equipment, needs supporting construction such as printed substrate to have high density and pass through dielectric
Multiple conductive layers that material is electrically insulated from each other.
General requirement for this supporting construction is reliability and suitable electric property, thinness, hardness, smooth
Degree, excellent thermal diffusivity and competitive unit price.
There are multiple manufacture methods can realize the making of supporting construction at present, wherein have a kind of relatively new type wiring board to lead to
Cross solid copper pin interconnection conducting, than traditional by dielectric in the hole set electrodeposited coating interconnection conducting by way of be easier control and can
By property more preferably, therefore, the interconnection conduction mode of solid copper pin is more uses in multilayer electronic structure.
Traditional interconnects, by solid copper pin, the method that conduction mode makes multi-layer support structure, needs:1. the bottom of at
Photoresist layer is covered on plate, 2. exposure imaging forms the negativity characteristic pattern of required figure, 3. plating obtains ground floor characteristic layer,
4. continue to cover photoresist layer, 5. exposure imaging forms the negativity characteristic pattern of required figure, 6. plating obtains second layer feature
Layer, 7. removes photoresist layer, 8. uses dielectric material filling bag metal-clad, 9. grinds to expose metal level, 10. covers light again
Photoresist layer, 11. expose and are developed in be formed on base plate and need to expose the pattern of metal covering, 12. etchings to expose metal layer image,
13. surface treatments, as shown in figure 1, this technique is subject to energy power restriction, it must assure that its multi-layer support structure being obtained
Second layer characteristic layer metal surface less than ground floor so that inside and outside a lot of demands the design of metal covering formed objects cannot realize.
Thus have the upgraded version of this technique, its 1 ~ 9 with above-mentioned 1 ~ 9 step, 10. second feature aspect whole face deposited metal, 11.
Cover photoresist layer, 12. exposure imagings obtain the negativity figure of third layer metallic pattern, 13. plating obtain third layer metal level,
14. covering photoresist layers, 15. exposure imagings obtain the negativity figure of the 4th layer of metallic pattern, and 16. plating obtain the 4th layer of gold
Belong to layer, 17 removing photoresist layers, characteristic metal layer is coated by 18. using dielectric material, and 19. grind to expose metal level, 20. tables
Face is processed, its multi-layer support structure being obtained as shown in Fig. 2 the first above-mentioned technique cannot to realize customer drawings upper and lower
The demand of metal level similar size, and second technological process production cycle, low cost materials are all relatively many one times, lack cost
Advantage.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of multilayer electronic to support knot for above-mentioned prior art
Structure, it solve traditional handicraft cannot realize or cost cycle inferior position shortcoming, and the thickness of product can accomplish ultra-thin, from
And substantially increase product competitive advantage commercially.
The technical scheme in the invention for solving the above technical problem is:A kind of multi-layer support structure, it includes
Pin, described pin includes ground floor characteristic layer, second layer characteristic layer and third layer characteristic layer, described second layer characteristic layer and
Three layers of characteristic layer pass through once plating and are formed, and described third layer characteristic layer is not less than ground floor characteristic layer, described ground floor feature
Layer, second layer characteristic layer and third layer characteristic layer are coated with dielectric material, and described third layer feature layer surface is provided with microetch
Fluting.
Protruding features layer is arranged on described microetch fluting.
Compared with prior art, the utility model has the advantage of:
A kind of multi-layer support structure of this utility model, it solves prior art long flow path, encapsulates thick, high cost asking
Topic.From the point of view of processing technology, it adopts pre-packaged method to make substrate, is optimized, different from former work in original technique
The needs of skill are pre-packaged twice it is only necessary to once pre-packaged can realize inside and outside lead layer pattern identical demand, original
Production cost, production cycle can reduce half, and the thickness of product can also be accomplished thinner, and solving traditional handicraft cannot be real
The shortcoming of existing or cost cycle inferior position;From the point of view of product structure, it achieves the design of inside and outside trace layer formed objects, thus saving
About wiring space so that package dimension is less, realizes higher integrated level;And because the area of inside and outside metal level is all big
In metallic intermediate layer so that metal can form stronger supporting role with dielectric material, form superior lock colloidality energy.This is real
With the high integration of new structure, ultrathin, the optimization of smaller szie, superior lock colloidality energy and technological process, life
Product cycle, the reduction of cost make product competitive advantage commercially greatly improve.
Brief description
Fig. 1 is the schematic diagram that traditional solid copper pin interconnects the multi-layer support structure that conduction mode makes.
Fig. 2 is the signal of the multi-layer support structure of upgrading process making that traditional solid copper pin interconnects conduction mode
Figure.
Fig. 3 is a kind of schematic diagram of multi-layer support structure of this utility model.
Fig. 4 ~ Figure 16 is a kind of each operation flow chart of this utility model multi-layer support structure manufacture method.
Wherein:
Ground floor characteristic layer 1
Second layer characteristic layer 2
Third layer characteristic layer 3
Dielectric material 4
Microetch fluting 5.
Specific embodiment
Below in conjunction with accompanying drawing embodiment, this utility model is described in further detail.
As shown in figure 3, one of the present embodiment multi-layer support structure, it includes pin, and described pin includes
One layer of characteristic layer 1, second layer characteristic layer 2 and third layer characteristic layer 3, described second layer characteristic layer 2 and third layer characteristic layer 3 pass through
Once plating is formed, and described third layer characteristic layer 3 is not less than ground floor characteristic layer 1, and described ground floor characteristic layer 1, the second layer are special
Levy layer 2 and third layer characteristic layer 3 is coated with dielectric material 4, described third layer characteristic layer 3 surface is provided with microetch fluting 5;
Protruding features layer is arranged on described microetch fluting 5.
Its manufacture method is as follows:
Step one, referring to Fig. 4, take a metallic plate as base plate;
Step 2, referring to Fig. 5, base plate covers photoresist layer, exposing and be developed in base plate front, to form ground floor special
Levy the negativity characteristic pattern of layer required figure;
Step 3, referring to Fig. 6, plating is to make fisrt feature layer;
Step 4, referring to Fig. 7, continue to second layer photoresist layer, expose and be developed in base plate front formed the second layer
The negativity characteristic pattern of characteristic layer required figure;
Step 5, referring to Fig. 8, continue to third layer photoresist layer, expose and be developed in base plate front formed third layer
The negativity characteristic pattern of characteristic layer required figure;
Step 6, referring to Fig. 9, once electroplate and make second and third layer of characteristic layer simultaneously;
Step 7, referring to Figure 10, remove photoresist layer;
Step 8, referring to Figure 11, coat all characteristic layers with dielectric material;
Step 9, referring to Figure 12, grind dielectric material face to expose outermost layer feature layer pattern;
Step 10, referring to Figure 13, two sides covers photoresist layer, exposes and is developed in the base plate back side and form windowing required figure
Pattern, etching windowing to expose the figure of ground floor characteristic layer;
Step 11, referring to Figure 14, remove photoresist layer;
Step 12, referring to Figure 15, in outermost layer feature layer surface, groove is formed by microetch;
Step 13, referring to Figure 16, grooved area carry out plating formed protruding features layer.
Described step 5 may be repeated repeatedly, thus the characteristic layer of more number of plies;
Adding two kinds of surface treatment modes of step 13 by step 12 or step 12 can make outermost layer feature respectively
Layer is realized falling in or raised next structure.
In addition to the implementation, this utility model also includes other embodiment, all employing equivalents or equivalent
The technical scheme that substitute mode is formed, all should fall within this utility model scope of the claims.
Claims (2)
1. a kind of multi-layer support structure it is characterised in that:It includes pin, and described pin includes ground floor characteristic layer(1)、
Second layer characteristic layer(2)With third layer characteristic layer(3), described second layer characteristic layer(2)With third layer characteristic layer(3)By once
Plating is formed, described third layer characteristic layer(3)Not less than ground floor characteristic layer(1), described ground floor characteristic layer(1), the second layer
Characteristic layer(2)With third layer characteristic layer(3)It is coated with dielectric material(4), described third layer characteristic layer(3)Surface is provided with micro-
Etched recesses(5).
2. a kind of multi-layer support structure according to claim 1 it is characterised in that:Described microetch fluting(5)On
Setting protruding features layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620929946.0U CN205984970U (en) | 2016-08-23 | 2016-08-23 | Multilayer electron bearing structure |
Applications Claiming Priority (1)
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CN201620929946.0U CN205984970U (en) | 2016-08-23 | 2016-08-23 | Multilayer electron bearing structure |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106158811A (en) * | 2016-08-23 | 2016-11-23 | 江阴芯智联电子科技有限公司 | A kind of multi-layer support structure and manufacture method thereof |
CN107403770A (en) * | 2016-08-29 | 2017-11-28 | 上海兆芯集成电路有限公司 | Electronic structure and electronic structure array |
-
2016
- 2016-08-23 CN CN201620929946.0U patent/CN205984970U/en active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106158811A (en) * | 2016-08-23 | 2016-11-23 | 江阴芯智联电子科技有限公司 | A kind of multi-layer support structure and manufacture method thereof |
CN106158811B (en) * | 2016-08-23 | 2019-05-14 | 江阴芯智联电子科技有限公司 | A kind of multi-layer support structure and its manufacturing method |
CN107403770A (en) * | 2016-08-29 | 2017-11-28 | 上海兆芯集成电路有限公司 | Electronic structure and electronic structure array |
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