CN106158811A - A kind of multi-layer support structure and manufacture method thereof - Google Patents

A kind of multi-layer support structure and manufacture method thereof Download PDF

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Publication number
CN106158811A
CN106158811A CN201610707982.7A CN201610707982A CN106158811A CN 106158811 A CN106158811 A CN 106158811A CN 201610707982 A CN201610707982 A CN 201610707982A CN 106158811 A CN106158811 A CN 106158811A
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China
Prior art keywords
layer
characteristic
support structure
characteristic layer
expose
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Application number
CN201610707982.7A
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Chinese (zh)
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CN106158811B (en
Inventor
王新潮
陈灵芝
张凯
陆晓燕
周佳炜
任姣
王津
林昀涛
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Jiangyin Xinzhilian Electronics Technology Co ltd
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Jiangyin Xinzhilian Electronics Technology Co ltd
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Priority to CN201610707982.7A priority Critical patent/CN106158811B/en
Publication of CN106158811A publication Critical patent/CN106158811A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49534Multi-layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Ceramic Engineering (AREA)

Abstract

The present invention relates to a kind of multi-layer support structure and manufacture method thereof, described structure includes pin, described pin includes ground floor characteristic layer (1), second layer characteristic layer (2) and third layer characteristic layer (3), described second layer characteristic layer (2) and third layer characteristic layer (3) are formed by once plating, described third layer characteristic layer (3) is not less than ground floor characteristic layer (1), described ground floor characteristic layer (1), second layer characteristic layer (2) and third layer characteristic layer (3) are coated with dielectric material (4), described third layer characteristic layer (3) surface configuration has microetch groove (5).A kind of multi-layer support structure of the present invention and manufacture method thereof, it solve traditional handicraft and cannot realize or the shortcoming of cost cycle inferior position, and the thickness of product can be accomplished ultra-thin, thus substantially increase product competitive advantage commercially.

Description

A kind of multi-layer support structure and manufacture method thereof
Technical field
The present invention relates to a kind of multi-layer support structure and manufacture method thereof, belong to technical field of semiconductor encapsulation.
Background technology
Current semicon industry, electronic component its size of demand that becomes increasingly complex is less and less, such as computer and electricity The integrated level of the consumer electronics such as letter equipment is more and more higher, needs supporting construction such as printed substrate have high density and pass through dielectric Multiple conductive layers that material is electrically insulated from each other.
It is reliability and suitable electric property, thinness, hardness, smooth for the general requirement of this supporting construction Degree, excellent thermal diffusivity and competitive unit price.
There is multiple preparation method can realize the making of supporting construction at present, wherein have a kind of relatively new type wiring board to lead to Cross solid copper pin interconnection conducting, than traditional by being easier to control and can by way of setting electrodeposited coating interconnection conducting in dielectric hole More preferable by property, therefore, the interconnection conduction mode of solid copper pin more uses in multilayer electronic structure.
Traditional method being made multi-layer support structure by solid copper pin interconnection conduction mode, is needed: 1. the end of at Covering photoresist layer on plate, 2. exposure imaging forms the negativity characteristic pattern of required figure, and 3. plating obtains ground floor characteristic layer, 4. continuing to cover photoresist layer, 5. exposure imaging forms the negativity characteristic pattern of required figure, and 6. plating obtains second layer feature Layer, 7. removes photoresist layer, 8. with dielectric material filling bag metal-clad, 9. grinds to expose metal level, 10. again covers light Photoresist layer, 11. expose and are developed on base plate the pattern that formation needs to expose metal covering, and 12. etch to expose metal layer image, 13. surface treatments, its multi-layer support structure preparing is as it is shown in figure 1, this technique is limited by ability, and it must assure that Second layer characteristic layer metal surface is less than ground floor so that the design of metal covering formed objects inside and outside a lot of demands cannot realize. Thus having had the upgraded version of this technique, it is 1 ~ 9 with above-mentioned 1 ~ 9 step, 10. second feature aspect whole face deposition metal, and 11. Covering photoresist layer, 12. exposure imagings obtain the negativity figure of third layer metallic pattern, and 13. plating obtain third layer metal level, 14. covering photoresist layers, 15. exposure imagings obtain the negativity figure of the 4th layer of metallic pattern, and 16. plating obtain the 4th layer of gold Belonging to layer, 17 removing photoresist layers, characteristic metal layer use dielectric material is coated with by 18., and 19. grind to expose metal level, 20. tables Face process, its multi-layer support structure preparing is as in figure 2 it is shown, the first above-mentioned technique cannot realize that customer drawings is upper and lower The demand of metal level similar size, and the second technological process production cycle, low cost materials are all relatively many one times, lack cost Advantage.
Content of the invention
The technical problem to be solved be for above-mentioned prior art provide a kind of multi-layer support structure and Its manufacture method, it solves traditional handicraft and cannot realize or the shortcoming of cost cycle inferior position, and the thickness of product can do To ultra-thin, thus substantially increase product competitive advantage commercially.
The technical scheme that the present invention solves that the problems referred to above are used is: a kind of multi-layer support structure, and it includes pin, Described pin includes ground floor characteristic layer, second layer characteristic layer and third layer characteristic layer, described second layer characteristic layer and third layer Characteristic layer is formed by once plating, and described third layer characteristic layer is not less than ground floor characteristic layer, described ground floor characteristic layer, the Two layers of characteristic layer and third layer characteristic layer are coated with dielectric material, and described third layer characteristic layer surface configuration has microetch recessed Groove.
On described microetch groove, protruding features layer is set.
The manufacture method of a kind of multi-layer support structure, described method comprises the steps:
Step one, take a metallic plate as base plate;
Step 2, on base plate, cover photoresist layer, expose and be developed in base plate front and form figure needed for ground floor characteristic layer Negativity characteristic pattern;
Step 3, plating are to make fisrt feature layer;
Step 4, continue to second layer photoresist layer, expose and be developed in base plate front and form the required figure of second layer characteristic layer The negativity characteristic pattern of shape;
Step 5, continue to third layer photoresist layer, expose and be developed in base plate front and form the required figure of third layer characteristic layer The negativity characteristic pattern of shape;
Step 6, once electroplate and make second and third layer of characteristic layer simultaneously;
Step 7, removal photoresist layer;
Step 8, with the dielectric material all characteristic layer of cladding;
Step 9, grinding medium electric material face are to expose outermost layer characteristic layer figure;
Step 10, two sides cover photoresist layer, expose and are developed in the pattern that the base plate back side forms required figure of windowing, etch open Window is to expose the figure of ground floor characteristic layer;
Step 11, removal photoresist layer;
Step 12, surface treatment.
Described step 5 repeats repeatedly.
The surface treatment mode of described step 12 is for forming groove on outermost layer characteristic layer surface by microetch.
Recess region carries out plating and forms protruding features layer.
Compared with prior art, it is an advantage of the current invention that:
A kind of multi-layer support structure of the present invention and manufacture method thereof, it solves prior art long flow path, encapsulation is thick, cost is high Problem.From the point of view of manufacture craft, it uses pre-packaged method to make substrate, is optimized, is different from original technique The needs of former technique are pre-packaged twice, it is only necessary to the once pre-packaged demand that i.e. can realize that inside and outside trace layer figure is identical, former Some production costs, production cycle can reduce half, and the thickness of product also can be accomplished thinner, solve traditional handicraft without Method realization or the shortcoming of cost cycle inferior position;From the point of view of product structure, it achieve the design of inside and outside trace layer formed objects, from And saved wiring space so that package dimension is less, it is achieved higher integrated level;And the area due to inside and outside metal level Both greater than metallic intermediate layer so that metal can form stronger supporting role with dielectric material, forms superior lock colloidality energy. The optimization of the high integration of the structure of this invention, ultrathin, smaller szie, superior lock colloidality energy and technological process, life Product cycle, the reduction of cost make product competitive advantage commercially be greatly improved.
Brief description
The schematic diagram of the multi-layer support structure that the solid copper pin interconnection conduction mode that Fig. 1 is traditional makes.
Fig. 2 is the signal of the multi-layer support structure of the upgrading process making of traditional solid copper pin interconnection conduction mode Figure.
Fig. 3 is the schematic diagram of a kind of multi-layer support structure of the present invention.
Fig. 4 ~ Figure 16 is each process flow chart of the present invention a kind of multi-layer support structure manufacture method.
Wherein:
Ground floor characteristic layer 1
Second layer characteristic layer 2
Third layer characteristic layer 3
Dielectric material 4
Microetch groove 5.
Detailed description of the invention
Below in conjunction with accompanying drawing embodiment, the present invention is described in further detail.
As it is shown on figure 3, a kind of multi-layer support structure in the present embodiment, it includes pin, and described pin includes One layer of characteristic layer the 1st, second layer characteristic layer 2 and third layer characteristic layer 3, described second layer characteristic layer 2 and third layer characteristic layer 3 pass through Once plating is formed, and described third layer characteristic layer 3 is not less than ground floor characteristic layer 1, and described ground floor characteristic layer the 1st, the second layer is special Levying layer 2 and third layer characteristic layer 3 being coated with dielectric material 4, described third layer characteristic layer 3 surface configuration has microetch groove 5;
On described microetch groove 5, protruding features layer is set.
Its manufacture method is as follows:
Step one, see Fig. 4, take a metallic plate as base plate;
Step 2, see Fig. 5, base plate covers photoresist layer, expose and be developed in base plate front and form ground floor characteristic layer The negativity characteristic pattern of required figure;
Step 3, seeing Fig. 6, plating is to make fisrt feature layer;
Step 4, see Fig. 7, continue to second layer photoresist layer, expose and be developed in base plate front and form second layer feature The negativity characteristic pattern of the required figure of layer;
Step 5, see Fig. 8, continue to third layer photoresist layer, expose and be developed in base plate front and form third layer feature The negativity characteristic pattern of the required figure of layer;
Step 6, see Fig. 9, once electroplate and make second and third layer of characteristic layer simultaneously;
Step 7, see Figure 10, remove photoresist layer;
Step 8, see Figure 11, with all characteristic layers of dielectric material cladding;
Step 9, seeing Figure 12, grinding medium electric material face is to expose outermost layer characteristic layer figure;
Step 10, seeing Figure 13, two sides covers photoresist layer, exposes and be developed in the figure that the base plate back side forms required figure of windowing Case, etching is windowed to expose the figure of ground floor characteristic layer;
Step 11, see Figure 14, remove photoresist layer;
Step 12, see Figure 15, form groove on outermost layer characteristic layer surface by microetch;
Step 13, seeing Figure 16, recess region carries out plating and forms protruding features layer.
Described step 5 may be repeated repeatedly, thus the characteristic layer of more number of plies;
Adding two kinds of surface treatment modes of step 13 by step 12 or step 12 can make outermost layer characteristic layer real respectively Now fall in or protruding next structure.
In addition to the implementation, present invention additionally comprises other embodiments, all employing equivalents or equivalence are replaced The technical scheme that mode is formed, all should fall within the scope of the hereto appended claims.

Claims (6)

1. a multi-layer support structure, it is characterised in that: it includes pin, described pin include ground floor characteristic layer (1), Second layer characteristic layer (2) and third layer characteristic layer (3), described second layer characteristic layer (2) and third layer characteristic layer (3) are by once Plating is formed, and described third layer characteristic layer (3) is not less than ground floor characteristic layer (1), described ground floor characteristic layer (1), the second layer Characteristic layer (2) and third layer characteristic layer (3) are coated with dielectric material (4), and described third layer characteristic layer (3) surface configuration has micro- Etched recesses (5).
2. a kind of multi-layer support structure according to claim 1, it is characterised in that: on described microetch groove (5) Protruding features layer is set.
3. the manufacture method of a multi-layer support structure, it is characterised in that described method comprises the steps:
Step one, take a metallic plate as base plate;
Step 2, on base plate, cover photoresist layer, expose and be developed in base plate front and form figure needed for ground floor characteristic layer Negativity characteristic pattern;
Step 3, plating are to make fisrt feature layer;
Step 4, continue to second layer photoresist layer, expose and be developed in base plate front and form the required figure of second layer characteristic layer The negativity characteristic pattern of shape;
Step 5, continue to third layer photoresist layer, expose and be developed in base plate front and form the required figure of third layer characteristic layer The negativity characteristic pattern of shape;
Step 6, once electroplate and make second and third layer of characteristic layer simultaneously;
Step 7, removal photoresist layer;
Step 8, with the dielectric material all characteristic layer of cladding;
Step 9, grinding medium electric material face are to expose outermost layer characteristic layer figure;
Step 10, two sides cover photoresist layer, expose and are developed in the pattern that the base plate back side forms required figure of windowing, etch open Window is to expose the figure of ground floor characteristic layer;
Step 11, removal photoresist layer;
Step 12, surface treatment.
4. the manufacture method of a kind of multi-layer support structure according to claim 3, it is characterised in that: described step 5 Repeat repeatedly.
5. the manufacture method of a kind of multi-layer support structure according to claim 3, it is characterised in that: described step 10 The surface treatment mode of two is for forming groove on outermost layer characteristic layer surface by microetch.
6. the manufacture method of a kind of multi-layer support structure according to claim 5, it is characterised in that: recess region is entered Row plating forms protruding features layer.
CN201610707982.7A 2016-08-23 2016-08-23 A kind of multi-layer support structure and its manufacturing method Active CN106158811B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100096744A1 (en) * 2008-10-21 2010-04-22 International Business Machines Corporation Printed wiring board and method for manufacturing the same
CN103052268A (en) * 2011-10-11 2013-04-17 欣兴电子股份有限公司 Method for making circuit structure
CN103400770A (en) * 2013-08-06 2013-11-20 江苏长电科技股份有限公司 Packaging-prior-to-etching chip-flipped bump type three-dimensional system-level metal circuit board and process method thereof
CN205984970U (en) * 2016-08-23 2017-02-22 江阴芯智联电子科技有限公司 Multilayer electron bearing structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100096744A1 (en) * 2008-10-21 2010-04-22 International Business Machines Corporation Printed wiring board and method for manufacturing the same
CN103052268A (en) * 2011-10-11 2013-04-17 欣兴电子股份有限公司 Method for making circuit structure
CN103400770A (en) * 2013-08-06 2013-11-20 江苏长电科技股份有限公司 Packaging-prior-to-etching chip-flipped bump type three-dimensional system-level metal circuit board and process method thereof
CN205984970U (en) * 2016-08-23 2017-02-22 江阴芯智联电子科技有限公司 Multilayer electron bearing structure

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