CN107403841A - 低温多晶硅薄膜晶体管及其制作方法、显示设备 - Google Patents

低温多晶硅薄膜晶体管及其制作方法、显示设备 Download PDF

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CN107403841A
CN107403841A CN201710624547.2A CN201710624547A CN107403841A CN 107403841 A CN107403841 A CN 107403841A CN 201710624547 A CN201710624547 A CN 201710624547A CN 107403841 A CN107403841 A CN 107403841A
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polysilicon layer
layer
doped polysilicon
gate insulator
etch stop
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李松杉
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to PCT/CN2017/100580 priority patent/WO2019019266A1/zh
Priority to US15/578,155 priority patent/US20190221637A1/en
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Abstract

本发明提供了一种低温多晶硅薄膜晶体管，其包括：基板；栅极，设置于基板上；栅极绝缘层，设置于基板和栅极上；多晶硅层，设置于栅极绝缘层上，多晶硅层上具有凹槽；掺杂多晶硅层，设置于多晶硅层上且具有完全暴露凹槽的通孔；蚀刻阻挡层，设置于栅极绝缘层和掺杂多晶硅层上并填充通孔和凹槽，且具有暴露掺杂多晶硅层的第一过孔和第二过孔；源极和漏极，设置于蚀刻阻挡层上，源极和漏极分别填充第一过孔和第二过孔，以分别与掺杂多晶硅层接触；钝化层，设置于源极、漏极和刻蚀阻挡层上。本发明还提供了一种低温多晶硅薄膜晶体管的制作方法及显示设备。本发明能防止源极和漏极与多晶硅层直接接触，从而减小低温多晶硅薄膜晶体管的漏电流。

Description

低温多晶硅薄膜晶体管及其制作方法、显示设备
技术领域
本发明属于薄膜晶体管制作技术领域，具体地讲，涉及一种低温多晶硅薄膜晶体管及其制作方法、显示设备。
背景技术
随着光电与半导体技术的演进，也带动了平板显示器(FlatPanel Display)的蓬勃发展，而在诸多平板显示器中，液晶显示器(Liquid Crystal Display，简称LCD)和有机发光二极管(OLED)显示器因具有高空间利用效率、低消耗功率、无辐射以及低电磁干扰等诸多优越特性，已成为市场的主流。
目前，作为LCD和OLED显示器的开关元件而广泛采用的是非晶硅薄膜三极管(a-SiTFT)，但a-Si TFT LCD在满足薄型、轻量、高精细度、高亮度、高可靠性、低功耗等要求仍受到限制。低温多晶硅(Lower Temperature Polycrystal Silicon，LTPS)TFT与a-Si TFT相比，在满足上述要求方面，具有明显优势。
然而在目前的低温多晶硅薄膜晶体管中，由于源极和漏极能够与未掺杂离子的多晶硅层接触，因此会导致低温多晶硅薄膜晶体管漏电流Ioff增大，从而影响低温多晶硅薄膜晶体管的特性，进而会影响LCD和OLED显示器的显示质量。
发明内容
为了解决上述现有技术的问题，本发明的目的在于提供一种能够减小漏电流的低温多晶硅薄膜晶体管及其制作方法、显示设备。
根据本发明的一方面，提供了一种低温多晶硅薄膜晶体管，其包括：基板；栅极，设置于所述基板上；栅极绝缘层，设置于所述基板和所述栅极上；多晶硅层，设置于所述栅极绝缘层上，所述多晶硅层上具有凹槽；掺杂多晶硅层，设置于所述多晶硅层上，所述掺杂多晶硅层中具有通孔，所述通孔完全暴露所述凹槽；蚀刻阻挡层，设置于所述栅极绝缘层和所述掺杂多晶硅层上并填充所述通孔和所述凹槽，所述蚀刻阻挡层中具有第一过孔和第二过孔，所述第一过孔和所述第二过孔分别暴露出掺杂多晶硅层；源极和漏极，设置于所述蚀刻阻挡层上，所述源极填充所述第一过孔，以与所述第一过孔暴露出的掺杂多晶硅层接触，所述漏极填充所述第二过孔，以与所述第二过孔暴露出的掺杂多晶硅层接触；钝化层，设置于所述源极、所述漏极和所述刻蚀阻挡层上。
可选地，所述掺杂多晶硅层中掺杂有硼离子。
可选地，所述蚀刻阻挡层由硅的氧化物和/或硅的氮化物制成。
根据本发明的另一方面，还提供了一种显示设备，其包括上述的低温多晶硅薄膜晶体管。
根据本发明的又一方面，又提供了一种低温多晶硅薄膜晶体管的制作方法，其包括步骤：提供一基板；在所述基板上制作形成栅极；在所述基板和所述栅极上制作形成栅极绝缘层；在所述栅极绝缘层上制作形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层；在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽，所述通孔完全暴露所述凹槽；在所述掺杂多晶硅层、所述栅极绝缘层和所述多晶硅层上制作形成蚀刻阻挡层；在所述蚀刻阻挡层中制作形成第一过孔和第二过孔，所述第一过孔和所述第二过孔分别暴露出掺杂多晶硅层；在所述蚀刻阻挡层上制作形成源极和漏极，所述源极填充所述第一过孔，以与所述第一过孔暴露出的掺杂多晶硅层接触，所述漏极填充所述第二过孔，以与所述第二过孔暴露出的掺杂多晶硅层接触；在所述源极、所述漏极和所述刻蚀阻挡层上制作形成钝化层。
可选地，所述步骤“在所述栅极绝缘层上制作形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层”的方法包括：在所述栅极绝缘层上制作形成非晶硅层；利用离子植入技术在所述非晶硅层中植入离子；利用快速热退火的方式技术使所述非晶硅层再结晶，从而形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层。
可选地，所述步骤“在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽”的方法包括：利用半色调掩膜工艺在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽。
可选地，所述蚀刻阻挡层由硅的氧化物和/或硅的氮化物制成。
可选地，所述利用离子植入技术植入的离子为硼离子。
本发明的有益效果：本发明能防止源极和漏极与多晶硅层直接接触，从而减小低温多晶硅薄膜晶体管的漏电流，进而可以大幅度改善低温多晶硅薄膜晶体管的特性。
附图说明
通过结合附图进行的以下描述，本发明的实施例的上述和其它方面、特点和优点将变得更加清楚，附图中：
图1是根据本发明的实施例的低温多晶硅薄膜晶体管的结构示意图；
图2A至图2I是根据本发明的实施例的低温多晶硅薄膜晶体管的制程图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。
在附图中，为了清楚器件，夸大了层和区域的厚度。相同的标号在整个说明书和附图中表示相同的元器件。
将理解的是，当诸如层、膜、区域或基板的元件被称作“在”另一元件“上”时，该元件可以直接在所述另一元件上，或者也可以存在中间元件。可选择地，当元件被称作“直接在”另一元件“上”时，不存在中间元件。
图1是根据本发明的实施例的低温多晶硅薄膜晶体管的结构示意图。
参照图1，根据本发明的实施例的低温多晶硅薄膜晶体管包括基板100、栅极200、栅极绝缘层300、多晶硅层400、蚀刻阻挡层500、源极600、漏极700、钝化层800和掺杂多晶硅层900。
具体而言，基板100可例如是透明的玻璃基板或者树脂基板，但本发明并不限制于此。
栅极200设置于基板100上。栅极200可以是钼铝钼(MoAlMo)结构或钛铝钛(TiAlTi)结构，也可以是单层的钼结构或者单层的铝结构，但本发明并不限制于此。
栅极绝缘层300设置于栅极200和基板100上。这里，栅极绝缘层300可例如是在栅极200和基板100上形成的SiNx/SiOx结构，但本发明并不限制于此，例如栅极绝缘层300也可以是单层的SiNx结构或SiOx结构。
多晶硅层400设置于栅极绝缘层300上。多晶硅有源层400上具有凹槽410。
掺杂多晶硅层900设置于多晶硅层400上。掺杂多晶硅层900中具有通孔910，该通孔910完全暴露凹槽410。
蚀刻阻挡层500设置于掺杂多晶硅层900和栅极绝缘层300上，并且蚀刻阻挡层500填充通孔910和凹槽410，以与多晶硅层400接触。此外，蚀刻阻挡层500具有第一过孔510和第二过孔520，第一过孔510暴露出位于通孔910和凹槽410一侧(左侧)的掺杂多晶硅层900，而第二过孔520暴露出位于通孔910和凹槽410另一侧(右侧)的掺杂多晶硅层900。在本实施例中，蚀刻阻挡层500由SiNx和/或SiOx形成，但本发明并不限制于此。
源极600和漏极700设置于蚀刻阻挡层500上，源极600填充第一过孔510，以与位于通孔910和凹槽410一侧的掺杂多晶硅层900接触，漏极700填充第二过孔520，以与位于通孔910和凹槽410另一侧的掺杂多晶硅层900接触。源极600和漏极700可采用钼铝钼(MoAlMo)结构或钛铝钛(TiAlTi)结构，也可以是单层的钼结构或者单层的铝结构，但本发明并不限制于此。
钝化层800设置于源极600、漏极700和蚀刻阻挡层500。在本实施例中，钝化层800由硅的氧化物(诸如SiOx)形成，但本发明并不限制于此。
根据本发明的实施例的低温多晶硅薄膜晶体管可应用于显示设备中，诸如液晶显示设备和OLED显示设备中。本发明的实施例的低温多晶硅薄膜晶体管能防止源极600和漏极700与多晶硅层410直接接触，从而减小低温多晶硅薄膜晶体管的漏电流，进而可以大幅度改善低温多晶硅薄膜晶体管的特性。
以下对根据本发明的实施例的低温多晶硅薄膜晶体管的制作方法进行详细描述。
图2A至图2I是根据本发明的实施例的低温多晶硅薄膜晶体管的制程图。
根据本发明的实施例的金属氧化物薄膜晶体管的制作方法包括：
步骤一：参照图2A，提供一基板100。基板100可例如为一绝缘且透明的玻璃基板或树脂基板，但本发明并不限制于此。
步骤二：参照图2B，在基板100上制作形成栅极200。栅极400可以是钼铝钼(MoAlMo)结构或钛铝钛(TiAlTi)结构，也可以是单层的钼结构或者单层的铝结构，但本发明并不限制于此。
步骤三：参照图2C，在基板100和栅极200上制作形成栅极绝缘层300。这里，栅极绝缘层300可例如是在半导体本体层210上形成的SiNx/SiOx结构，但本发明并不限制于此，例如栅极绝缘层300也可以是单层的SiNx结构或SiOx结构。
步骤四：参照图2D，在栅极绝缘层300上制作形成多晶硅层400以及位于多晶硅层上的掺杂多晶硅层900。
这里，形成多晶硅层400以及位于多晶硅层上的掺杂多晶硅层900的方法具体包括：首先，利用等离子体增强化学气相沉积法(PECVD)在栅极绝缘层300上制作形成非晶硅层；接着，利用离子植入(Ion Implant)技术在所述非晶硅层中植入离子(诸如硼离子等)；接着，以快速热退火(Rapid ThermalAnneal)的方式使所述非晶硅层再结晶，从而生成多晶硅层400以及在多晶硅层400上的掺杂多晶硅层900。
步骤五：参照图2E，在掺杂多晶硅层900中形成通孔910，并在多晶硅层400上形成凹槽410，通孔910完全暴露凹槽410。
这里，形成通孔910和凹槽410的具体方法是：利用半色调掩膜(HalfTone Mask，HTM)工艺在掺杂多晶硅层900中形成通孔910，并在多晶硅层400上形成凹槽410，但本发明并不限制于此。
步骤六：参照图2F，在栅极绝缘层300、多晶硅层400和掺杂多晶硅层900上制作形成蚀刻阻挡层500。这里，蚀刻阻挡层500由硅的氧化物(诸如SiOx)和/或硅的氮化物(诸如SiNx)形成，但本发明并不限制于此。
步骤七，参照图2G，在蚀刻阻挡层500中制作形成第一过孔510和第二过孔520，第一过孔510暴露出位于通孔910和凹槽410一侧(左侧)的掺杂多晶硅层900，而第二过孔520暴露出位于通孔910和凹槽410另一侧(右侧)的掺杂多晶硅层900。
步骤八：参照图2H，在蚀刻阻挡层500上制作形成源极600和漏极700，源极600填充第一过孔510，以与位于通孔910和凹槽410一侧的掺杂多晶硅层900接触，漏极700填充第二过孔520，以与位于通孔910和凹槽410另一侧的掺杂多晶硅层900接触。源极600和漏极700可采用钼铝钼(MoAlMo)结构或钛铝钛(TiAlTi)结构，也可以是单层的钼结构或者单层的铝结构，但本发明并不限制于此。
步骤九：参照图2I，在源极600、漏极700和蚀刻阻挡层500上制作形成钝化层800。这里，钝化层800由硅的氧化物(诸如SiOx)形成，但本发明并不限制于此。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (9)

1.一种低温多晶硅薄膜晶体管，其特征在于，包括：
基板；
栅极，设置于所述基板上；
栅极绝缘层，设置于所述基板和所述栅极上；
多晶硅层，设置于所述栅极绝缘层上，所述多晶硅层上具有凹槽；
掺杂多晶硅层，设置于所述多晶硅层上，所述掺杂多晶硅层中具有通孔，所述通孔完全暴露所述凹槽；
蚀刻阻挡层，设置于所述栅极绝缘层和所述掺杂多晶硅层上并填充所述通孔和所述凹槽，所述蚀刻阻挡层中具有第一过孔和第二过孔，所述第一过孔和所述第二过孔分别暴露出掺杂多晶硅层；
源极和漏极，设置于所述蚀刻阻挡层上，所述源极填充所述第一过孔，以与所述第一过孔暴露出的掺杂多晶硅层接触，所述漏极填充所述第二过孔，以与所述第二过孔暴露出的掺杂多晶硅层接触；
钝化层，设置于所述源极、所述漏极和所述刻蚀阻挡层上。
2.根据权利要求1所述的低温多晶硅薄膜晶体管，其特征在于，所述掺杂多晶硅层中掺杂有硼离子。
3.根据权利要求1所述的低温多晶硅薄膜晶体管，其特征在于，所述蚀刻阻挡层由硅的氧化物和/或硅的氮化物制成。
4.一种显示设备，其特征在于，包括权利要求1至3任一项所述的低温多晶硅薄膜晶体管。
5.一种低温多晶硅薄膜晶体管的制作方法，其特征在于，包括步骤：
提供一基板；
在所述基板上制作形成栅极；
在所述基板和所述栅极上制作形成栅极绝缘层；
在所述栅极绝缘层上制作形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层；
在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽，所述通孔完全暴露所述凹槽；
在所述掺杂多晶硅层、所述栅极绝缘层和所述多晶硅层上制作形成蚀刻阻挡层；
在所述蚀刻阻挡层中制作形成第一过孔和第二过孔，所述第一过孔和所述第二过孔分别暴露出掺杂多晶硅层；
在所述蚀刻阻挡层上制作形成源极和漏极，所述源极填充所述第一过孔，以与所述第一过孔暴露出的掺杂多晶硅层接触，所述漏极填充所述第二过孔，以与所述第二过孔暴露出的掺杂多晶硅层接触；
在所述源极、所述漏极和所述刻蚀阻挡层上制作形成钝化层。
6.根据权利要求5所述的制作方法，其特征在于，所述步骤“在所述栅极绝缘层上制作形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层”的方法包括：
在所述栅极绝缘层上制作形成非晶硅层；
利用离子植入技术在所述非晶硅层中植入离子；
利用快速热退火的方式技术使所述非晶硅层再结晶，从而形成多晶硅层以及位于所述多晶硅层上的掺杂多晶硅层。
7.根据权利要求5所述的制作方法，其特征在于，所述步骤“在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽”的方法包括：利用半色调掩膜工艺在所述掺杂多晶硅层中形成通孔，并在所述多晶硅层上形成凹槽。
8.根据权利要求5所述的制作方法，其特征在于，所述蚀刻阻挡层由硅的氧化物和/或硅的氮化物制成。
9.根据权利要求6所述的制作方法，其特征在于，所述利用离子植入技术植入的离子为硼离子。
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