CN107093628B - 一种极化掺杂增强型hemt器件 - Google Patents
一种极化掺杂增强型hemt器件 Download PDFInfo
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- 230000010287 polarization Effects 0.000 title claims abstract description 16
- 230000004888 barrier function Effects 0.000 claims abstract description 57
- 230000000903 blocking effect Effects 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 10
- 239000004047 hole gas Substances 0.000 claims abstract description 6
- 230000006698 induction Effects 0.000 claims abstract description 3
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 229910002704 AlGaN Inorganic materials 0.000 claims description 10
- 238000002161 passivation Methods 0.000 claims description 7
- 238000005468 ion implantation Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 12
- 230000000779 depleting effect Effects 0.000 abstract description 4
- 230000001105 regulatory effect Effects 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 238000002360 preparation method Methods 0.000 abstract description 2
- 239000000463 material Substances 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
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Abstract
本发明属于半导体技术领域,涉及一种极化掺杂增强型HEMT器件。本发明的技术方案,通过在缓冲层上依次生长Al组分渐变的第一势垒层和第二势垒层,两层势垒层的Al组分变化趋势相反,势垒层内部由于极化差分别诱导产生三维电子气(3DEG)和三维空穴气(3DHG);同时,凹槽绝缘栅结构位于源极远离漏极的一侧且与源极接触。首先,由于整个第一势垒层中都存在较高浓度的电子,极大提升器件的导通电流;其次,3DHG夹断源极与3DEG之间的纵向导电沟道,从而实现增强型,由凹槽栅电极上施加电压实现对导电沟道进行控制,且可通过对部分导电沟道进行掺杂调控阈值电压;再次,3DEG‑3DHG形成极化超结,在阻断状态时辅助耗尽漂移区,优化器件的横向电场分布,提高器件耐压。本发明所公布的器件制备工艺与传统工艺兼容。
Description
技术领域
本发明属于半导体技术领域,具体的说是涉及一种极化掺杂增强型HEMT器件。
背景技术
基于GaN材料的高电子迁移率晶体管(High Electron Mobility Transistor,HEMT),由于高电子饱和速度、高密度二维电子气(2DEG)以及较高临界击穿电场,使其在大电流、低功耗、高频和高压开关应用领域具有巨大的应用前景。
功率开关器件的关键是实现高击穿电压、低功耗和高可靠性,GaN材料临界击穿电场是Si的十倍,目前GaN功率器件的耐压远未达到其理论极限,其重要原因之一是栅极电场集中效应使器件提前击穿,此时漂移区并未完全耗尽。过大的峰值电场使得器件电场分布很不均匀,器件容易在较低源漏电压下便被击穿,无法充分发挥GaN材料的高耐压优势。
场板技术是一种改善器件耐压的常用终端技术,文献(J.Li,et.al.“Highbreakdown voltage GaN HFET with field plate”IEEE Electron Lett.,vol.37,no.3,pp.196–197,February.2001.)采用了与栅短接的场板,如图1所示,场板的引入可以降低主结的曲率效应和电场尖峰,从而提高耐压。然而场板的引入会使器件寄生电容增大,影响器件的高频和开关特性文献。(Akira Nakajima,et.al.“GaN-Based Super HeterojunctionField Effect Transistors Using the Polarization Junction Concept”IEEEElectron Device Letters,vol.32,no.4,pp.542-544,2011)采用极化超结的思想,在漂移区部分的AlGaN势垒层上方生长一层顶层GaN,并在其界面形成二维空穴气(2DHG),2DHG与其下方的2DEG形成天然的“超结”,在阻断耐压时,辅助耗尽漂移区,优化器件横向电场,从而达到提高耐压的目的,如图2所示。但是顶层GaN与栅电极形成了空穴的欧姆接触,在正向导通时,栅压较大时会产生栅极泄漏电流,限制了栅压摆幅。
对于AlGaN/GaN HEMT器件而言,增强型HEMT器件比耗尽型HEMT器件具有更多的优势,其实现技术也是研究者们极其关注的问题。文献(W.Saito,et.al.,“Recessed-gatestructure approach toward normally off high-voltage AlGaN/GaN HEMT for powerelectronics applications,”IEEE Trans.Electron Devices,vol.53,no.2,pp.356-362,2006)报道了采用槽栅结构实现了一种准增强型高压AlGaN/GaN HEMT,如图3所示,凹栅刻蚀能够有效地耗尽栅极下方2DEG浓度,极大地提高阈值电压,但是凹栅刻蚀需要精确地控制刻蚀深度且会引起刻蚀损伤。常见实现增强型的方法还有氟离子注入栅下势垒层、P型GaN栅等,这些方法均是通过耗尽栅下2DEG来实现增强型,势必导致高阈值电压与大饱和输出电流的矛盾关系。
发明内容
本发明针对上述问题,提出一种极化掺杂增强型HEMT器件。
本发明的技术方案是,如图4所示:
一种极化掺杂增强型HEMT器件,包括从下至上依次叠层设置的衬底1、缓冲层2、势垒层3和帽层4;其特征在于:所述势垒层3由相互接触的第一势垒层31和第二势垒层32,所述第二势垒层32位于第一势垒层31上表面;所述第一势垒层31中Al组份的百分比含量自其下表面到上表面由0线性或非线性递的递增至x;所述第二势垒层32中Al组份的百分比含量自其下表面到上表面由x线性或非线性递的递减至0,其中0<x≤1;所述第一势垒层31上表面设置有欧姆接触的金属漏电极5;所述第二势垒层32、帽层4与金属漏电极5之间具有空穴阻断区9;所述帽层4上表面设置有金属源电极6,在所述金属源电极6远离金属漏电极5一侧形成凹槽绝缘栅结构,所述凹槽绝缘栅结构由位于凹槽壁的绝缘栅介质7及位于绝缘栅介质7内部的金属栅电极8构成,且绝缘栅介质7与缓冲层2、势垒层3、帽层4和金属源电极6相接触。
进一步的,所述空穴阻断区9为采用刻槽方式去除部分第二势垒层32及帽层4实现。
进一步的,所述空穴阻断区9采用离子注入实现,且所述帽层4中位于源极和漏极之间与空穴阻断区9接触的部分区域采用P型掺杂。
进一步的,所述帽层4及第二势垒层32中位于源电极下方的区域采用N型掺杂。
进一步的,所述帽层4上表面具有介质钝化层10。
进一步的,所述势垒层3采用的材料为AlxGa1-xN,其中0≤x≤1。
进一步的,所述绝缘栅介质7采用的材料为Al2O3、HfO2和SiO2中的一种或几种的组合。
进一步的,所述缓冲层2及帽层4采用的材料为GaN、AlN、AlGaN、InGaN、InAlN中的一种或几种的组合。
进一步的,所述衬底1采用的材料为蓝宝石、Si、SiC、AlN、GaN、AlGaN中的一种或几种的组合。
本发明的有益效果是:
1、通过在缓冲层上依次生长Al组分渐变的第一势垒层和第二势垒层,整个第一势垒层中都存在较高浓度的3DEG,器件的导通电流得到极大提升。
2、本发明通过第二势垒层中的3DHG夹断源极与3DEG之间的纵向导电沟道,从而实现增强型,进一步地,由凹槽栅电极上施加电压实现对导电沟道进行控制,且可通过对部分导电沟道进行掺杂调控阈值电压。
3、本发明中3DEG-3DHG形成极化超结,在阻断状态时辅助耗尽漂移区,优化器件的横向电场分布,提高器件耐压。
4、本发明所公布的器件制备工艺与传统工艺兼容。
附图说明
图1是具有栅场板的HEMT器件结构。
图2是具有与栅电极电气相连的极化超结HEMT器件结构。
图3是具有凹槽绝缘栅结构的HEMT器件结构。
图4是本发明提出的采用刻槽方式形成空穴阻断区的极化掺杂增强型HEMT器件结构。
图5是本发明提出的采用离子注入形成空穴阻断区的极化掺杂增强型HEMT器件结构。
图6是本发明提出的帽层及第二势垒层位于源电极下方采用N型掺杂的极化掺杂增强型HEMT器件结构。
图7是本发明提出的具有介质钝化层的极化掺杂增强型HEMT器件结构。
图8是本发明提出的极化掺杂增强型HEMT器件结构与传统增强型MIS HEMT器件结构的转移特性曲线比较图。
图9是本发明提出的极化掺杂增强型HEMT器件结构与传统增强型MIS HEMT器件结构的反向耐压时电场分布比较图。
具体实施方式
下面结合附图和实施例,详细描述本发明的技术方案:
实施例1
图4示出了一种极化掺杂增强型HEMT器件。本例器件包括:
从下至上依次叠层设置的衬底1、缓冲层2、势垒层3、帽层4;其特征在于:所述势垒层3从下至上依次包括第一势垒层31和第二势垒层32,所述第一势垒层31的Al组分从下表面的0线性或非线性递增至上表面的x(0<x≤1),所述第二势垒层32的Al组分从下表面的x(0<x≤1)线性或非线性递减至上表面的0;所述第一势垒层31上表面设置有欧姆接触的金属漏电极5;所述第二势垒层32、帽层4与漏电极5之间具有空穴阻断区9,所述空穴阻断区9在靠近漏端采用刻槽方式形成;所述帽层4上表面设置金属源电极6,所述源电极6远离漏电极5一侧形成凹槽绝缘栅结构,所述凹槽绝缘栅结构由位于凹槽壁的绝缘栅介质7及内部金属栅电极8构成,且绝缘栅介质7与缓冲层2、势垒层3、帽层4和源电极6相接触。
本发明通过在缓冲层上依次生长Al组分渐变的第一势垒层和第二势垒层,势垒层内部由于极化差分别诱导产生三维电子气(3DEG)和三维空穴气(3DHG)。首先,由于整个第一势垒层中都存在较高浓度的电子,器件的导通电流得到极大提升;其次,3DHG夹断源极与3DEG之间的纵向导电沟道,从而实现增强型,由凹槽栅电极上施加电压实现对导电沟道进行控制,且可通过对部分导电沟道进行掺杂调控阈值电压;再次,3DEG-3DHG形成极化超结,在阻断状态时辅助耗尽漂移区,优化器件的横向电场分布,提高器件耐压。
实施例2
与实施例1相比,本例器件在帽层4与漏电极5之间采用高浓度的N型离子注入实现空穴阻断区9,避免源极与漏极之间形成空穴导电通道;同时,在源漏之间接触空穴阻断区9的部分帽层中形成P型掺杂区域,避免电子从源极到漏极的泄漏路径,其他结构与实施例1相同,如图5所示。采用离子注入隔离更易实现,且对材料的损伤更小。同时,漏电极与源电极之间形成的NP结在器件阻断状态时也起到承受耐压的作用。
实施例3
与实施例1相比,本例器件在帽层4及第二势垒层32中位于源极下方采用N型掺杂,其他结构与实施例1相同,如图6所示。源电极下方的N型掺杂部分,一方面可以使源极金属与帽层更好的形成欧姆接触;另一方面,N型掺杂调制3DHG浓度,从而对阈值电压进行调控。
实施例4
与实施例1相比,本例器件在源漏之间的帽层4上表面形成介质钝化层10,其他结构与实施例1相同,如图7所示。采用介质钝化层可以改善器件的表面态,抑制电流崩塌。
本发明的上述几种实施例所描述的极化掺杂增强型HEMT器件,可以采用蓝宝石、Si、SiC、AlN、GaN、AlGaN中的一种或几种的组合作为衬底层1的材料;可以采用GaN、AlN、AlGaN、InGaN、InAlN中的一种或几种的组合作为缓冲层2、帽层4的材料;势垒层材料采用渐变AlxGa1-xN(0≤x≤1);对于钝化层10,业界常用的材料为SiNx,也可采用Al2O3,AlN等介质材料,绝缘栅介质7可采用与钝化层相同的材料;源电极6、漏电极5一般采用金属合金,常用的有Ti/Al/Ni/Au或Mo/Al/Mo/Au等;栅电极8一般采用功函数较大的金属合金,例如Ni/Au或Ti/Au等。
图8、图9分别是本发明提出的极化掺杂增强型HEMT结构与传统增强型MIS HEMT结构的转移特性曲线比较图及反向耐压时电场分布比较图。采用Sentaurus TCAD软件进行仿真,两种结构在栅漏距离均为5μm的条件下,本发明所提出的结构的饱和输出电流从传统增强型MIS HEMT的78mA/mm提高到179mA/mm,饱和输出电流提高129%,击穿电压从177V提升至858V。
Claims (9)
1.一种极化掺杂增强型HEMT器件,包括从下至上依次叠层设置的衬底(1)、缓冲层(2)、势垒层(3)和帽层(4);其特征在于:所述势垒层(3)由相互接触的第一势垒层(31)和第二势垒层(32),所述第二势垒层(32)位于第一势垒层(31)上表面;所述第一势垒层(31)中Al组份的百分比含量自其下表面到上表面由0线性或非线性递的递增至x;所述第二势垒层(32)中Al组份的百分比含量自其下表面到上表面由x线性或非线性递的递减至0,其中0<x≤1,势垒层内部由于极化差分别诱导产生三维电子气和三维空穴气,三维空穴气夹断源极与三维电子气之间的纵向导电沟道,从而实现增强型;三维电子气和三维空穴气形成极化超结;所述第一势垒层(31)上表面设置有欧姆接触的金属漏电极(5);所述第二势垒层(32)、帽层(4)与金属漏电极(5)之间具有空穴阻断区(9);所述帽层(4)上表面设置有金属源电极(6),在所述金属源电极(6)远离金属漏电极(5)一侧形成凹槽绝缘栅结构,所述凹槽绝缘栅结构由位于凹槽壁的绝缘栅介质(7)及位于绝缘栅介质(7)内部的金属栅电极(8)构成,且绝缘栅介质(7)与缓冲层(2)、势垒层(3)、帽层(4)和金属源电极(6)相接触。
2.根据权利要求1中所述的一种极化掺杂增强型HEMT器件,其特征在于,所述空穴阻断区(9)为采用刻槽方式去除部分第二势垒层(32)及帽层(4)实现。
3.根据权利要求1中所述的一种极化掺杂增强型HEMT器件,其特征在于,所述空穴阻断区(9)采用离子注入实现,且所述帽层(4)中位于源极和漏极之间与空穴阻断区(9)接触的部分区域采用P型掺杂。
4.根据权利要求1-3任意一项所述的一种极化掺杂增强型HEMT器件,其特征在于,所述帽层(4)及第二势垒层(32)中位于源电极下方的区域采用N型掺杂。
5.根据权利要求4所述的一种极化掺杂增强型HEMT器件,其特征在于,所述帽层(4)上表面具有介质钝化层(10)。
6.根据权利要求5所述的一种极化掺杂增强型HEMT器件,其特征在于,所述势垒层(3)采用的材料为AlxGa1-xN,其中0≤x≤1。
7.根据权利要求6所述的一种极化掺杂增强型HEMT器件,其特征在于,所述绝缘栅介质(7)采用的材料为Al2O3、HfO2和SiO2中的一种或几种的组合。
8.根据权利要求7所述的一种极化掺杂增强型HEMT器件,其特征在于,所述缓冲层(2)及帽层(4)采用的材料为GaN、AlN、AlGaN、InGaN、InAlN中的一种或几种的组合。
9.根据权利要求8所述的一种极化掺杂增强型HEMT器件,其特征在于,所述衬底(1)采用的材料为蓝宝石、Si、SiC、AlN、GaN、AlGaN中的一种或几种的组合。
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