CN107037651A - 一种阵列基板及光罩、显示装置 - Google Patents

一种阵列基板及光罩、显示装置 Download PDF

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CN107037651A
CN107037651A CN201710280444.9A CN201710280444A CN107037651A CN 107037651 A CN107037651 A CN 107037651A CN 201710280444 A CN201710280444 A CN 201710280444A CN 107037651 A CN107037651 A CN 107037651A
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layer
array base
base palte
insulating barrier
switch element
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赵凯祥
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to CN201710280444.9A priority Critical patent/CN107037651A/zh
Priority to PCT/CN2017/085840 priority patent/WO2018196072A1/zh
Priority to US15/539,810 priority patent/US10553615B2/en
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    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
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    • G06F3/047—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using sets of wires, e.g. crossed wires
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Abstract

本发明提供了一种阵列基板及光罩、显示装置，该阵列基板包括：衬底，其包括开关元件及栅线；公共电极层，其设置于衬底上，其设置有公共电极且在公共电极层上的预定位置设置有多个第一过孔；钝化层，其设置于公共电极层上，且具有多个与第一过孔一一对应同心设置的第二过孔；像素电极层，其设置于钝化层上，其设置有多个像素电极且通过对应的第二过孔连接开关元件；其中，沿栅线的输出近端至输出远端的方向，第一过孔的面积逐渐减小。本发明可以提升面板显示的均一性。

Description

一种阵列基板及光罩、显示装置
技术领域
本发明属于显示技术领域，具体地说，尤其涉及一种阵列基板及光罩、显示装置。
背景技术
在液晶显示面板进行画面显示时，每帧画面的切换是通过扫描线扫描的方式实现的。
由于扫描线由金属材料形成，金属材料具有电阻。随着传输距离的增大，扫描线上的电压会降低，这种现象称之为压降。如图1所示，随着像素A、像素B和像素C与栅线扫描信号输人端的距离由近至远，压降由低至高。
具体的，现有液晶显示面板中的栅线压降表示式为：
其中，ΔVp表示压降值，Cgs表示栅线与开关元件的源极/漏极之间的电容，Clc表示液晶电容，Cs表示存储电容，Vghl表示理想输入电压与实际输入电压的差值。沿栅线输出近端至输出远端的方向(即距离扫描信号驱动电路由近及远方向)，栅线实际输入电压逐渐降低，理想输入电压不变，因此Vghl逐渐增大。
如图2所示为像素A、像素B和像素C的压降示意图，随着像素A、像素B和像素C与栅线扫描信号输入端的距离由近至远，压降由低至高，即Va＜Vb＜Vc，Va表示像素A的压降，ΔVa表示像素A馈通电压，Vb表示像素B的压降，ΔVb表示像素B馈通电压，Vc表示像素C的压降，ΔVc表示像素B馈通电压，Vgh表示栅线理想输入电压。由上述表达式可知，ΔVp会造成靠近栅线输入端的画面较亮，远离栅线输入端的画面较暗，影响面板显示均一性。
发明内容
为解决以上问题，本发明提供了一种阵列基板及光罩、显示装置，用以提升面板显示的均一性。
根据本发明的一个方面，提供了一种阵列基板，包括：
衬底，其包括开关元件及栅线；
公共电极层，其设置于所述衬底上，其设置有公共电极且在所述公共电极层上的预定位置设置有多个第一过孔；
钝化层，其设置于所述公共电极层上，且具有多个与所述第一过孔一一对应同心设置的第二过孔；
像素电极层，其设置于所述钝化层上，其设置有多个像素电极且通过对应的所述第二过孔连接所述开关元件；
其中，沿所述栅线的输出近端至输出远端的方向，所述第一过孔的面积逐渐减小。
根据本发明的一个实施例，还包括：
介质层，其设置于所述公共电极层上；
触控布线层，其设置于所述介质层上，其上设置有所述钝化层。
根据本发明的一个实施例，所述公共电极用作触控电极，并连接所述触控布线层中的部分布线。
根据本发明的一个实施例，所述开关元件进一步包括：
沟道层，其设置于基底上，且包括多个导电沟道；
第一绝缘层，其设置于所述沟道层上；
第一导电层，其对应所述导电沟道设置于所述第一绝缘层上，包括所述开关元件的栅极；
第二绝缘层，其设置于所述第一导电层和裸露的第一绝缘层上；
第二导电层，其设置于所述第二绝缘层上，包括所述开关元件的源极和漏极，用于连接所述沟道层；
平坦层，其设置于所述第二导电层和裸露的第二绝缘层上，其上设置有所述公共电极层。
根据本发明的一个实施例，所述沟道层采用低温多晶硅材料制成，其还包括设置于所述导电沟道两端的离子重掺杂区，所述离子重掺杂区包括连接所述开关元件的漏极的漏极区和连接所述开关元件的源极的源极区。
根据本发明的一个实施例，在所述导电沟道与所述离子重掺杂区之间设置有离子轻掺杂区。
根据本发明的一个实施例，还包括遮光层，其对应所述导电沟道设置于所述基底上。
根据本发明的一个实施例，还包括第三绝缘层，其设置于所述遮光层和裸露的基底上，其上设置有所述沟道层。
根据本发明的另一个方面，还提供了一种用于制作以上所述阵列基板的光罩，所述光罩设置有对应多个第一过孔的透光区域，沿所述阵列基板上的栅线的输出近端至输出远端的方向，所述透光区域的面积逐渐减小。
根据本发明的再一个方面，还提供了一种显示装置，包括以上所述的阵列基板。
本发明的有益效果：
本发明通过使公共电极层上的第一过孔的面积沿栅线的输出近端至输出远端的方向逐渐减小，进而改变沿栅线的输出近端至输出远端的方向的各像素单元中的液晶电容的电容值，使得栅线上各处的压降相等，提升面板显示的均一性。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要的附图做简单的介绍：
图1是现有技术中的一种阵列基板布线示意图；
图2是对应图1的各像素驱动电压波形示意图；
图3是根据本发明的一个实施例的第一过孔大小渐变示意图；
图4是根据本发明的一个实施例的阵列基板结构示意图；
图5是根据本发明的一个实施例的光罩结构示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
如图4所示为根据本发明的一个实施例的阵列基板结构示意图，以下参考图4来对本发明进行详细说明。
该阵列基板包括衬底、公共电极层12、钝化层13和像素电极层14。衬底包括开关元件及栅线(未示出)。公共电极层12设置于衬底上，其设置有公共电极BITO且在公共电极层12上的预定位置设置有多个第一过孔121。钝化层13设置于公共电极层12上，且具有多个与第一过孔121一一对应同心设置的第二过孔131。像素电极层14设置于钝化层13上，其设置有多个像素电极TITO且通过对应的第二过孔131连接开关元件。其中，沿栅线的输出近端至输出远端的方向，第一过孔121的面积逐渐减小，用以改变公共电极与多个像素单元中的像素电极的正对面积。此处的沿栅线的输出近端至输出远端的方向(如图4中的箭头标注方向)指的是距离扫描信号驱动电路由近及远的方向，扫描信号驱动电路用于输出扫描信号。
由液晶显示面板中的栅线压降表达式可知，液晶电容Clc影响压降值ΔVp。Clc越大，ΔVp越小；Clc越小，ΔVp越大。在液晶显示面板中，可以将阵列基板和彩膜基板之间的液晶层等效为一个液晶电容。该液晶电容一端连接像素电极，另一端连接公共电极。像素电极和公共电极相当于液晶电容的两个极板。基于液晶电容计算公式：液晶电容Clc＝介电常数*电极间面积/电极间距离，介电常数为液晶分子材料的介电常数，电极间面积为像素电极和公共电极的正对面积，电极间距离为像素电极和公共电极之间的距离(实质为液晶层的厚度)。
由液晶电容Clc计算公式可知，像素电极和公共电极正对的面积越大，液晶电容Clc越大，ΔVp越小，反之亦然。因此，在本发明中，沿栅线的输出近端至输出远端的方向，将多个第一过孔的面积设置为逐渐减小，使得沿栅线的输出近端至输出远端的方向上公共电极与各像素电极的正对面积逐渐变大，如图3所示。这样就可以使得液晶电容Clc沿栅线的输出近端至输出远端的方向逐渐变大，进而使得变小。由于沿栅线的输出近端至输出远端的方向，Vghl逐渐增大，而变小，通过调整各第一过孔的面积，可使得栅线上各处Vghl与的乘积保持不变，使得栅线上各处的压降相等，进而使得栅线上各处像素单元中像素电极的压降相等，从而使得栅线上各处像素单元中像素电极电压相同，提升面板显示的均一性。
在本发明的一个实施例中，该阵列基板还包括介质层15和触控布线层16。如图4所示，介质层15设置于公共电极层12上，用于间隔公共电极层12和触控布线层16。触控布线层16设置于介质层上，其上设置有钝化层13。
在本发明的一个实施例中，该公共电极BITO用作触控电极，并连接触控布线层16中的部分布线。具体的，如图4所示，公共电极连接第一布线M161，第二布线M162连接其他结构。
在本发明的一个实施例中，该开关元件进一步包括沟道层111、第一绝缘层、第一导电层113、第二绝缘层、第二导电层115和平坦层116。其中，沟道层111设置于基底10上，且包括多个导电沟道1111。第一绝缘层设置于沟道层111上，包括由SiOx构成的绝缘层1121和由SiNx构成的绝缘层1122。第一导电层113对应导电沟道1111设置于第一绝缘层上，包括开关元件的栅极G。第二绝缘层设置于第一导电层113和裸露的第一绝缘层上，包括由SiOx构成的绝缘层1141和由SiNx构成的绝缘层1142。第二导电层115设置于第二绝缘层上，包括开关元件的源极S和漏极D，用于连接沟道层。平坦层116设置于第二导电层115和裸露的第二绝缘层上，其上设置有公共电极层12。
在本发明的一个实施例中，该沟道层111采用低温多晶硅材料制成，包括设置于导电沟道两端的离子重掺杂区N+，离子重掺杂区N+包括连接开关元件的漏极D的漏极区和连接开关元件的源极S的源极区。
在本发明的一个实施例中，在导电沟道与离子重掺杂区之间设置有离子轻掺杂区。具体的，如图4所示，在导电沟道1111与离子重掺杂区N+之间设置有离子轻掺杂区N-，用于减小对器件开态电流的影响。
在本发明的一个实施例中，该阵列基板还包括遮光层171。其中，遮光层171对应导电沟道1111设置于基底10上，用于防止背光照射导电沟道，影响开关器件性能，如图4所示。
在本发明的一个实施例中，该阵列基板还包括第三绝缘层。其中，第三绝缘层设置于遮光层171和裸露的基底10上，包括由SiOx构成的绝缘层1721和由SiNx构成的绝缘层1722，其上设置有沟道层111，如图4所示。
根据本发明的另一个方面，还提供了一种光罩，该光罩用于制作以上所述的阵列基板。具体的，如图5所示，该光罩21设置有对应多个第一过孔的透光区域211，沿阵列基板上的栅线的输出近端至输出远端的方向，透光区域的面积逐渐减小。
根据本发明的再一个方面，还提供了一种显示装置。该显示装置包括以上所述的阵列基板。该阵列基板包括衬底11、公共电极层12、钝化层13和像素电极层14。衬底11包括开关元件及栅线(未示出)。公共电极层12设置于衬底11上，其设置有公共电极BITO且在公共电极层12上的预定位置设置有多个第一过孔121。钝化层13设置于公共电极层12上，且具有多个与第一过孔121一一对应同心设置的第二过孔131。像素电极层14设置于钝化层13上，其设置有多个像素电极TITO且通过第二过孔131连接开关元件。其中，沿栅线的输出近端至输出远端的方向，第一过孔121的面积逐渐减小，用以改变公共电极与多个像素电极的正对面积，进而使得栅线上各处的压降相等，进而提高面板显示的均一性。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (10)

1.一种阵列基板，包括：
衬底，其包括开关元件及栅线；
公共电极层，其设置于所述衬底上，其设置有公共电极且在所述公共电极层上的预定位置设置有多个第一过孔；
钝化层，其设置于所述公共电极层上，且具有多个与所述第一过孔一一对应同心设置的第二过孔；
像素电极层，其设置于所述钝化层上，其设置有多个像素电极且通过对应的所述第二过孔连接所述开关元件；
其中，沿所述栅线的输出近端至输出远端的方向，所述第一过孔的面积逐渐减小。
2.根据权利要求1所述的阵列基板，其特征在于，还包括：
介质层，其设置于所述公共电极层上；
触控布线层，其设置于所述介质层上，其上设置有所述钝化层。
3.根据权利要求2所述的阵列基板，其特征在于，所述公共电极用作触控电极，并连接所述触控布线层中的部分布线。
4.根据权利要求1-3中任一项所述的阵列基板，其特征在于，所述开关元件包括：
沟道层，其设置于基底上，且包括多个导电沟道；
第一绝缘层，其设置于所述沟道层上；
第一导电层，其对应所述导电沟道设置于所述第一绝缘层上，并包括所述开关元件的栅极；
第二绝缘层，其设置于所述第一导电层和裸露的第一绝缘层上；
第二导电层，其设置于所述第二绝缘层上，包括所述开关元件的源极和漏极，用于连接所述沟道层；
平坦层，其设置于所述第二导电层和裸露的第二绝缘层上，其上设置有所述公共电极层。
5.根据权利要求4所述的阵列基板，其特征在于，所述沟道层采用低温多晶硅材料制成，其还包括设置于所述导电沟道两端的离子重掺杂区，所述离子重掺杂区包括连接所述开关元件的漏极的漏极区和连接所述开关元件的源极的源极区。
6.根据权利要求5所述的阵列基板，其特征在于，在所述导电沟道与所述离子重掺杂区之间设置有离子轻掺杂区。
7.根据权利要求6所述的阵列基板，其特征在于，还包括遮光层，其对应所述导电沟道设置于所述基底上。
8.根据权利要求7所述的阵列基板，其特征在于，还包括第三绝缘层，其设置于所述遮光层和裸露的基底上，其上设置有所述沟道层。
9.一种用于制作权利要求1-8中任一项所述阵列基板的光罩，其特征在于，所述光罩设置有对应多个第一过孔的透光区域，沿所述阵列基板上的栅线的输出近端至输出远端的方向，所述透光区域的面积逐渐减小。
10.一种显示装置，包括权利要求1-8中任一项所述的阵列基板。
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