CN106909525A - A kind of control Switching Module based on VPX buses - Google Patents
A kind of control Switching Module based on VPX buses Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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Abstract
The invention discloses a kind of control Switching Module based on VPX buses, master control borad and power board are split as by by control Switching Module, solve control Switching Module interface excessively and the limited contradiction of volume;According to actual task demand and resource service condition, can simultaneously be worked using the identical polylith control Switching Module of configuration, carry out Hot Spare and realize double remaining functions to ensure the reliability of whole system;The present invention also completes the interaction of data and order between master control borad and power board, the effectively flexibility of lifting control Switching Module, versatility and reliability using plate to plate high speed connector.
Description
Technical field
The invention belongs to Embedded real-time signal processing technical field, more specifically, it is related to a kind of control based on VPX buses
Switching Module processed.
Background technology
Following Information System will tie up the empty world one under the three-dimensional support of one towards land, sea, air, day, electricity five
The trend development of bodyization collaboration.The integrated information processing platform is the general airborne aviation electronics system of space-air-ground integration aircraft
System, its application is expanded to from traditional local aerospace region and is made up of aviation area, near space, orbit space
Global full extent of space, and many work(such as need to support hardware and software reconstruct to realize scouting, disturb, detect, communicate, attack
Can multitask.
Following Information System is developed and proposes requirement higher to the performance of the integrated information processing platform:Control is handed over
Mold changing block will also ensure that its is highly reliable while the performances high such as its calculating, data interaction are kept using methods such as redundancy backups
Property.
However, the bus such as traditional avionics system ARINC429,1553B and VME for being used, right by putting
The technology such as point, shared bus, parallel transmission realizes data communication, and maximum bandwidth is respectively 100kbps, 1Mbps, 320Mbps.It is aobvious
So, these bussing techniques can not meet integrated information processing platform system scale expand increasingly and transmission information species gradually
To data transmission, reliability, real-time performance requirement after increasing.Therefore need to be a kind of new bus system of the Platform Designing
Framework.
This patent proposes a kind of new control Switching Module based on high speed serialization VPX buses of new generation, it is ensured that control
The high-performance of calculating, the data interaction of Switching Module.It uses various high-performance switching fabrics, new bus in interfacing
Technology and new system folded and faulted belt, for example:GbE、SRIO、PCIE.The bus standard is believed using single-ended signal line and difference
Number two kinds of electrical codes of line realize physical layer signal transmission, solve electromagnetic interference during high speed data transfer, skew and shake
Problem, meets LVDS (low-voltage differential signal) level standard, and insertion loss is low, and strong antijamming capability is up in transmission rate
During 6.25Gbps, crosstalk can carry the high speed serial transmission protocols such as PCIE, SRIO, gigabit Ethernet GbE still less than 3%.
On the other hand, this patent proposes to carry out real-time online backup to main control switchboard using dual redundant framework, so as to protect
Its high reliability is demonstrate,proved.Improve under current space flight military project applied environment, in the design of the controller based on VPX buses, due to
Master control borad and power board are integrated on one piece of board, board interface resource is nervous and whole when controlling Switching Module to break down
Individual system will face the brought problem of paralysis.
Following Information System and the developing direction of embedded real time signal processing platform show:In signal processing platform
On the premise of overcoming strict volume, weight and power consumption limit, more to possess high-performance, it is high flexibly, it is high reliability, expansible
Feature.Therefore, a kind of new VPX bus marco switching fabrics need to be designed, VPX specifications is met in the switching fabric for ensureing new
Meanwhile, should also possess the data transmission and processing ability of high reliability, big data quantity, multi tate, it is ensured that the safety of data communication
Property, promptness and reliability.
The content of the invention
It is an object of the invention to overcome the deficiencies in the prior art, there is provided provide a kind of control based on VPX buses and exchange
Module, master control borad and power board are split as by by control Switching Module, solve control Switching Module interface excessively and volume
Limited contradiction, port breaches the limitation of traditional VPX standards;Master control borad and power board are completed to plate high speed connector using plate
Between data and order interaction, effectively the lifting control flexibility of Switching Module, versatility and reliability;Also achieve simultaneously
Dual redundant Hot Spare mechanism.
For achieving the above object, a kind of control Switching Module based on VPX buses of the present invention, it is characterised in that bag
Include master control borad and power board;
Described master control borad with PowerPC as core, including PowerPC, PCIE crosspoint, SRIO crosspoints,
PCIE-SATA conversion unit of protocol, plate reset to plate high speed connector, memory cell, Ethernet chip unit, FPGA and configure
Unit;
PowerPC is connected by the PCIEx4 interfaces of itself with PCIE crosspoints, is expanded by PCIE crosspoints, real
Existing 6 road PCIEx1 signals by the datum plane of VPX EBIs respectively with outside 6 VPX EBIs of payload module
Datum plane carries out data interaction;Realize datum plane and external load module of the 1 road PCIEx4 signals by VPX EBIs
It is connected;Realize that 1 road PCIEx2 signals are connected with PCIE-SATA conversion unit of protocol, then by PCIE-SATA conversion unit of protocol
It is expanded into 2 road SATA signals, and datum plane and the VPX EBIs of external storage plate module by VPX EBIs
Datum plane is connected;
PowerPC is connected by the SRIOx4 interfaces of itself with SRIO crosspoints, is expanded by SRIO crosspoints, real
Existing 3 road SRIOx4 signals, the datum plane by VPX EBIs and external redundant backup by wherein 2 road SRIOx4 signals
Control exchanges the datum plane interconnection of plate module VPX EBIs, realizes the data transfer of active and standby control power board intermodule;Will
Other 1 road SRIOx4 signals are connected to this control to plate high speed connector and exchange on the power board of plate module by plate, to realize
Datum plane with the VPX EBIs of outside each payload module carries out data interaction;
PowerPC is connected with plate by the 1 road SGMII interfaces of itself to plate high speed connector, and plate is connected at a high speed by plate
Connect device and exchange the power board of plate module with this control indirectly and be connected, expand 6 road GbE signals, the VPX with outside each payload module
The control plane of EBI is connected;Plate high speed connector is connected with plate by the RGMII interfaces of itself, it is high to plate by plate
The power board that fast connector exchanges plate module with this control is connected, and realizes the control pipe to the Ethernet switching chip of power board
Reason;The control that the other 1 road SGMII interfaces of itself are directly backed up by the control plane of VPX EBIs with external redundant
The control plane for exchanging plate module VPX EBIs is connected, and realizes active and standby control power board intermodule order transmission;
Memory cell uses tri- kinds of type of memory of SDRAM, Nor Flash, Nand Flash, wherein, SDRAM storages
Device uses DDR3 specifications designs, is docked with the DDR3 memory interfaces on central processor unit, is mainly used in storing configuration processor
And data;Nor flash storages are mainly used in storage program area and reset configuration words RCW;Nand flash storages are adopted
Interface design is carried out with controlling mechanism FCM, is mainly used in storage file system;
Ethernet chip unit is connected with ethernet PHY chip institute's structure by the RGMII interfaces of itself by PowerPC
Into, and the 1 road RGMII interface signals of PowerPC are converted into by 1000BASE-T Ethernets by ethernet PHY chip electrically believe
Number;
FPGA resets dispensing unit realizes that whole control exchanges the reset of plate module by FPGA;
Described power board includes SRIO crosspoints, GbE crosspoints and plate to plate high speed connector;
Wherein, plate is connected with master control borad and power board simultaneously to plate high speed connector, makes to pass through between master control borad and power board
Plate realizes data interaction to plate high speed connector;
To SRIO crosspoints, SRIO is handed over the 1 road SRIOx4 signal inputs that plate sends master control borad to plate high speed connector
The SRIOx4 signals that 1 road SRIOx4 signals are expanded into unit 8 tunnels are changed, then wherein 6 road SRIOx4 signals will be connect by VPX buses
The datum plane of mouth is connected with outside each payload module, and 2 road SRIOx4 signals walk master control by plate to plate high speed connector in addition
The datum plane of the VPX EBIs of plate exchanges plate module interconnection with the control with redundancy backup, realizes active and standby control power board
The data transfer of intermodule;
The 1 road GbE signal inputs that plate sends master control borad to plate high speed connector are to GbE crosspoints, GbE crosspoints
1 road GbE signals are expanded into the GbE signals on 7 tunnels, then by wherein 6 road GbE signals by the control plane of VPX EBIs with
Outside each payload module is connected, and 1 road GbE signals walk the VPX EBIs of master control borad by plate to plate high speed connector in addition
Control plane exchanges the control plane interconnection of plate module VPX EBIs with the control of redundancy backup, realizes that active and standby control is exchanged
Order transmission between plate module.
What goal of the invention of the invention was realized in:
Control Switching Module of the present invention based on VPX buses, master control borad and exchange are split as by by control Switching Module
Plate, solves control Switching Module interface excessively and the limited contradiction of volume;According to actual task demand and resource service condition,
Can simultaneously be worked using the identical polylith control Switching Module of configuration, carry out Hot Spare and realize double remaining functions to ensure
The reliability of whole system;The present invention also completes data and order between master control borad and power board using plate to plate high speed connector
Interaction, effectively the lifting control flexibility of Switching Module, versatility and reliability.
Meanwhile, control Switching Module of the present invention based on VPX buses also has the advantages that:
(1), the present invention propose it is a kind of new based on VPX signal processing platform frameworks, so that Balanced interface quantity is excessive and body
The limited contradiction of product, exchanges PCIE and PCIE-SATA protocol conversions stays in master control borad and carry out, SRIO and GbE agreements are exchanged then
It is placed on power board completion;Increase data channel redundancy on the basis of functional redundancy, improve reliability;
(2), control Switching Module employs SRIO, PCIE, three kinds of high speed bus interfaces of gigabit Ethernet, compared to tradition
A kind of bus as data link, the design are provided bigger data bandwidth and more preferable bus compatible by design.
(3), based on VPX agreements, VPX connector dual redundant bus interfaces are devised, realize the Hot Spare of data transfer,
I.e.:In VPX interface data plane, control plane and expansion plane, the high speed data bus of identical function is respectively provided with two groups;Control
Switching Module processed realizes the real-time monitoring of control Switching Module by bus bar;When one of which master control borad or power board are sent out
During raw failure, targetedly on-line reorganization is implemented to control Switching Module rapidly, exchanged by another group of control of identical function
Module and its bus adapter and complete independently data transfer task, it is ensured that support plate normal work, be greatly improved support plate can
By property and security.
(4), control Switching Module is under the basis of VPX specifications, it is ensured that in the case of the redundancy of system, without reduction band
Width, improves data transfer rate;
(5), master control borad supports the DMA transfer between high-speed interface, improves the real-time of data.
Brief description of the drawings
Fig. 1 is control Switching Module schematic diagram of the present invention based on VPX buses;
Fig. 2 is the master control borad schematic diagram shown in Fig. 1;
Fig. 3 is the power board schematic diagram shown in Fig. 1.
Specific embodiment
Specific embodiment of the invention is described below in conjunction with the accompanying drawings, so as to those skilled in the art preferably
Understand the present invention.Requiring particular attention is that, in the following description, when known function and design detailed description perhaps
When can desalinate main contents of the invention, these descriptions will be ignored herein.
Embodiment
Describe for convenience, first the relevant speciality term occurred in specific embodiment is illustrated:
1000BASE-T:It is newest ethernet technology, it is to be ratified by the ieee standard committee in June, 1999.
DDR3(Double Data Rate 3Synchronous Dynamic Random Access Memory):3rd
For Double Data Rate synchronous regime random access memory;
DMA (Direct Memory Access, direct memory access):Direct memory access;
DSP(Digital Signal Process):That is Digital Signal Processing;
eLBC(Enhanced Local Bus Controller):Enhanced local bus controller.
FCM(Flash Control Mechanism):Flash controlling mechanisms;
FPGA (Field-Programmable Gate Array):That is field programmable gate array;
Gbps:I.e. transmission speed is 1000 megabits per second;
GbE(Gigabit Ethernet):Gigabit Ethernet;
GHz:Conventional cps gigahertz (GHZ);
mA:Current unit milliampere;
MB:A kind of storage unit in computer, full name MByte;
Mb/s:MBPS, refers to Bit Per Second amount;
MHz:Conventional cps megahertz;
Nand Flash:One kind of Flash internal memories, it is internal using non-linear macroelement pattern, is in solid-state large-capacity
The realization deposited provides cheap effective solution.
Nor Flash:A kind of nonvolatile flash memory technology, is that Intel was created in 1988.
PCIE(Peripheral Component Interconnect Express):Ancillary equipment interconnection;
PHY(Physical Layer):Physical layer;
PowerPC(Performance Optimization With Enhanced RISC–Performance
Computing):A kind of central processing unit of reduced instruction set computer (RISC) framework;
RCW(Reset Configuration Word):Reset configuration words;
RGMII(Reduced Gigabit Media Independent Interface):Simplify gigabit medium independence
Interface;
SATA(Serial Advanced Technology Attachment):Serial Advanced Technology Attachment;
SDRAM(Synchronous Dynamic Random Access Memory):Synchronous DRAM;
SGMII(Serial Gigabit Media Independent Interface):Serial gigabit medium independence
Interface;
SRIO(Serial Rapid IO):A kind of high-speed serial bus;
USB(Universal Serial Bus):The abbreviation of USB, is an external bus standard, is used for
Specification computer is connected and communicate with external equipment;
VPX:It is organized in by VITA (VME International Trade Association, VME international trade associations)
The high-speed serial bus standard of new generation for being proposed on its VME bus foundation for 2007;
Fig. 1 is control Switching Module schematic diagram of the present invention based on VPX buses.
First, VPX EBIs are defined:VPX EBIs are processed as integrated restructural integrated information and carried
The data switching networks center of G system, employs three kinds of high-speed serial bus, is respectively GbE, SRIO, PCIE.Master control borad VPX
EBI compatibility SLT3-PAY-2F2U-14.2.3 standards.Wherein, as shown in Fig. 2 VPX EBIs 1 include VPX P0 again
Interface, VPX P1 interfaces and VPX P2 interfaces, VPX J1 and J2 interface have 16 differential paths respectively, for controlling Switching Module
With the connection of outside functional cards, and for control Switching Module provides input power interface;Wherein, as shown in Fig. 2 master control
Plate VPX P0 interfaces include input system signaling interface and input power interface;P0 universal planes interface provides input electricity for support plate
Source, reference clock and reset signal, in the present embodiment, VPX power interfaces be control Switching Module in power module and its
Its module provides power supply, there is provided the input power such as 3.3V, 5V, 12V.
As shown in Fig. 2 VPX P1, P2 interface unit can be subdivided into datum plane interface, control plane interface, extend and put down again
Face interface and User Defined interface;Wherein master control borad P1 interfaces include datum plane interface and control plane interface, match somebody with somebody respectively
It is set to 2 road SRIO X4 signals, 6 road PCIE X1 signals and 2 road GbE signals;
VPX P2 interfaces are used as User Defined interface, there is provided 16 road differential signal line interfaces and 8 road single-ended signal lines connect
Mouthful;
Master control borad is connected using plate with power board to plate high speed connector, constitutes a pair of male and female ports, is functionally led
Plate on control plate and power board, as a logic entirety, performs same function to plate high speed connector.
With reference to shown in Fig. 1, control Switching Module of the present invention based on VPX buses is described in detail, specifically such as
Under:
A kind of control Switching Module based on VPX buses includes master control borad and power board;
As shown in Fig. 2 master control borad is with PowerPC as core, including PowerPC, PCIE crosspoint, SRIO exchange single
Unit, PCIE-SATA conversion unit of protocol, plate reset to plate high speed connector, memory cell, Ethernet chip unit, FPGA
Dispensing unit;
In the present embodiment, Power PC core frequency of heart is in 1200-1500MHz, comprising 3 PCIE HSSI High-Speed Serial Interfaces, 2
Individual SRIO high-speed interfaces, 2 SATA2.0 interfaces, 2 USB interfaces, the DDR3/DDR3L 64-bit Memory controls of 1.33GHz
Device.According to the real needs of the present embodiment, port is configured to 1 road SRIOx4 signal, 1 road PCIEx4 signal, 2 road SGMII letters
Number, 2 road RGMII signals;
With PCIE crosspoints be connected the PCIEx4 signals on 1 tunnel by PowerPC, by after the expansion of PCIE crosspoints,
The PCIEx1 signals on 6 tunnels are connected by the datum plane of VPX EBIs with external load module;The PCIEx4 on 1 tunnel is believed
Number it is connected with external load module by the datum plane of VPX EBIs;The PCIEx2 signals on 1 tunnel and PCIE-SATA are assisted
View converting unit is connected, then is expanded into 2 road SATA signals by PCIE-SATA conversion unit of protocol, and by VPX EBIs
Datum plane be connected with external storage board;
In the present embodiment, as shown in Fig. 2 required clock is 25MHZ during PCIE-SATA conversion unit of protocol normal works
Differential clocks are not, it is necessary to tri- kinds of voltages of 3.3V, 1V and 1.8V, have the requirement of electrifying timing sequence;
With SRIO crosspoints be connected the SRIOx4 signals on 1 tunnel by PowerPC, and 3 tunnels are expanded into by SRIO crosspoints
SRIOx4 signals, then the SRIOx4 signals of wherein two-way are backed up by the datum plane of VPX EBIs with external redundant
The interconnection of control Switching Module, realize the data transfer between active and standby control Switching Module, 1 road SRIOx4 signal passes through plate pair in addition
Plate high speed connector is connected on the power board of this control Switching Module, to realize the data exchange with outside each payload module,
The purpose of so design is the independence that increased master control borad, and the number of SRIO can be also completed in the case of without power board
According to exchange;
By plate be connected 1 road SGMII signals to plate high speed connector with the power board of this control Switching Module by PowerPC
Connect, separate 6 road GbE signals, and be connected with outside each payload module;By 1 road RGMII signal by plate to plate high speed connector with
The power board of this control Switching Module is connected, and realizes the control management to the Ethernet switching chip of power board;By other 1 tunnel
The control Switching Module that SGMII signals are directly backed up by the control plane of VPX EBIs with external redundant is connected, and realizes
Transmission is ordered between active and standby control Switching Module;
Memory cell uses tri- kinds of type of memory of SDRAM, Nor Flash, Nand Flash, wherein, SDRAM storages
Device uses DDR3 specifications designs, and 4 DDR3 memory grains are employed altogether to constitute 1GB capacity needed for us, in 64 bit wides
Deposit;Every DDR3 memory grains size is 256MB, and data width is 16, and the capacity of the SDRAM memory after composition is 1GB,
Bit wide is 64;The big I of DDR3 changes extension according to use environment;
Nor flash storages size is 128MB, and data width is 16;The big I of Nor flash storages according to
Use environment change extension;
Nand flash storages size is 512MB, and data width is 8;The big I root of Nand flash storages
Change according to use environment and extend;Nand flash storages are mainly used as File system design;So entered using FCM control logics
Line interface is designed, and improves data storage efficiency.
With ethernet PHY chip be connected the 1 road RGMII interfaces of PowerPC by Ethernet chip unit, and by Ethernet
The RGMII signals on 1 tunnel of PowerPC are transformed into 1000BASE-T Ethernet electric signals by PHY chip;
FPGA resets dispensing unit realizes the reset of whole control Switching Module.Additionally, FPGA also needs to realize system pipes
Manage the connection of signal.FPGA confirms the master control identity of oneself by detecting the value of SYS_CON* for low.FPGA is also by drain electrode
Open circuit output driving SYSRESET*, SM [3:0] and the bus management signal such as NVMRO*.
As shown in figure 3, power board includes SRIO crosspoints, GbE crosspoints and plate to plate high speed connector;
In the present embodiment, the SRIO exchange chips that SRIO crosspoints are used have reserved 48 road SRIO signals, in this reality
Apply and wherein 36 road SRIO holding wires are used in example;The GbE exchange chips that GbE crosspoints are used have 16 road SGMII interfaces, and
1 road RGMII interfaces, use 11 road SGMII interfaces therein and 1 road RGMII interfaces in the present embodiment;
Wherein, plate is connected with master control borad and power board simultaneously to plate high speed connector, makes to pass through between master control borad and power board
Plate realizes data interaction to plate high speed connector;
To SRIO crosspoints, SRIO is handed over the 1 road SRIOx4 signal inputs that plate sends master control borad to plate high speed connector
The SRIOx4 signals that 1 road SRIOx4 signals are expanded into unit 8 tunnels are changed, then wherein 6 road SRIOx4 signals will be connect by VPX buses
The datum plane of mouth is connected with outside each payload module, and 2 road SRIOx4 signals walk master control by plate to plate high speed connector in addition
The datum plane of the VPX EBIs of plate is interconnected with the control Switching Module of redundancy backup, between realizing active and standby control Switching Module
Data transfer;
The 1 road GbE signal inputs that plate sends master control borad to plate high speed connector are to GbE crosspoints, GbE crosspoints
1 road GbE signals are expanded into the GbE signals on 7 tunnels, then by wherein 6 road GbE signals by the control plane of VPX EBIs with
Outside each payload module is connected, and 1 road GbE signals walk the control of master control borad VPX EBIs by plate to plate high speed connector in addition
Plane processed is interconnected with the control Switching Module of redundancy backup, realizes the order transmission between active and standby control Switching Module.
Although being described to illustrative specific embodiment of the invention above, in order to the technology of the art
Personnel understand the present invention, it should be apparent that the invention is not restricted to the scope of specific embodiment, to the common skill of the art
For art personnel, as long as various change is in appended claim restriction and the spirit and scope of the present invention for determining, these
Change is it will be apparent that all utilize the innovation and creation of present inventive concept in the row of protection.
Claims (3)
1. a kind of control Switching Module based on VPX buses, it is characterised in that including master control borad and power board;
Described master control borad is with PowerPC as core, including PowerPC, PCIE crosspoint, SRIO crosspoints, PCIE-
SATA protocol converting unit, plate are to plate high speed connector, memory cell, Ethernet chip unit, FPGA reset dispensing units;
PowerPC is connected by the PCIEx4 interfaces of itself with PCIE crosspoints, is expanded by PCIE crosspoints, realizes 6
Road PCIEx1 signal by the datum plane of VPX EBIs respectively with outside 6 data of the VPX EBIs of payload module
Plane carries out data interaction;Realize datum plane and external load module phase that 1 road PCIEx4 signals pass through VPX EBIs
Even;Realize that 1 road PCIEx2 signals are connected with PCIE-SATA conversion unit of protocol, then opened up by PCIE-SATA conversion unit of protocol
Transform into 2 road SATA signals, and datum plane and the number of the VPX EBIs of external storage plate module by VPX EBIs
It is connected according to plane;
PowerPC is connected by the SRIOx4 interfaces of itself with SRIO crosspoints, is expanded by SRIO crosspoints, realizes 3
Road SRIOx4 signals, by the control that wherein 2 road SRIOx signals are backed up by the datum plane of VPX EBIs with external redundant
The datum plane interconnection of plate module VPX EBIs is exchanged, the data transfer of active and standby control power board intermodule is realized;Will in addition
1 road SRIOx4 signals are connected to this control to plate high speed connector and exchange on the power board of plate module by plate, with realization and outward
The datum plane of the VPX EBIs of each payload module in portion carries out data interaction;
PowerPC is connected with plate by the 1 road SGMII interfaces of itself to plate high speed connector, by plate to plate high speed connector
The power board for exchanging plate module with this control indirectly is connected, and expands 6 road GbE signals, the VPX buses with outside each payload module
The control plane of interface is connected;Plate high speed connector is connected with plate by the RGMII interfaces of itself, plate is connected at a high speed by plate
Connect device the power board of plate module is exchanged with this control and be connected, realize the control management to the Ethernet switching chip of power board;
The control that the other 1 road SGMII interfaces of itself are directly backed up by the control plane of VPX EBIs with external redundant is exchanged
The control plane of plate module VPX EBIs is connected, and realizes active and standby control power board intermodule order transmission;
Memory cell uses tri- kinds of type of memory of SDRAM, Nor Flash, Nand Flash, wherein, SDRAM memory is adopted
DDR3 specifications designs are used, is docked with the DDR3 memory interfaces on central processor unit, be mainly used in storing configuration processor sum
According to;Nor flash storages are mainly used in storage program area and reset configuration words RCW;Nand flash storages are using control
Making mechanism FCM carries out Interface design, is mainly used in storage file system;
Ethernet chip unit is to be connected to be constituted with ethernet PHY chip by the RGMII interfaces of itself by PowerPC, and
The 1 road RGMII interface signals of PowerPC are converted into by 1000BASE-T Ethernet electric signals by ethernet PHY chip;
FPGA resets dispensing unit realizes that whole control exchanges the reset of plate module by FPGA;
Described power board includes SRIO crosspoints, GbE crosspoints and plate to plate high speed connector;
Wherein, plate is connected with master control borad and power board simultaneously to plate high speed connector, makes to pass through plate pair between master control borad and power board
Plate high speed connector realizes data interaction;
To SRIO crosspoints, SRIO exchanges single the 1 road SRIOx4 signal inputs that plate sends master control borad to plate high speed connector
1 road SRIOx4 signals are expanded into the SRIOx4 signals on 8 tunnels for unit, then by wherein 6 road SRIOx4 signals by VPX EBIs
Datum plane is connected with outside each payload module, and 2 road SRIOx4 signals walk master control borad by plate to plate high speed connector in addition
The datum plane of VPX EBIs exchanges plate module interconnection with the control with redundancy backup, realizes that active and standby control exchanges plate module
Between data transfer;
The 1 road GbE signal inputs that master control borad is sent are input to GbE crosspoints, GbE crosspoints by plate to plate high speed connector
1 road GbE signals are expanded into the GbE signals on 7 tunnels, then by wherein 6 road GbE signals by the control plane of VPX EBIs with
Outside each payload module is connected, and 1 road GbE signals walk the VPX EBIs of master control borad by plate to plate high speed connector in addition
Control plane exchanges the control plane interconnection of plate module VPX EBIs with the control of redundancy backup, realizes that active and standby control is exchanged
Order transmission between plate module.
2. a kind of control Switching Module based on VPX buses according to claim 1, it is characterised in that described VPX is total
Line interface uses modular VPX connectors, the connector to be contained within controllable impedance, and the interface of the connector defines compatibility VPX
SLT3-SWH-6F6U-14.4.1 and SLT3-PAY-2F2U-14.2.3 standards in standard interface definition.
3. a kind of control Switching Module based on VPX buses according to claim 1, it is characterised in that described SDRAM
Memory includes 4 DDR3 memory grains, and every DDR3 memory grains size is 256MB, and data width is 16, after composition
The capacity of SDRAM memory is 1GB, and bit wide is 64;
Described Nor flash storages size is 128MB, and data width is 16;
Described Nand flash storages size is 512MB, and data width is 8.
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Cited By (22)
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