CN106909525B - A kind of control Switching Module based on VPX bus - Google Patents
A kind of control Switching Module based on VPX bus Download PDFInfo
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- CN106909525B CN106909525B CN201710024845.8A CN201710024845A CN106909525B CN 106909525 B CN106909525 B CN 106909525B CN 201710024845 A CN201710024845 A CN 201710024845A CN 106909525 B CN106909525 B CN 106909525B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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Abstract
The invention discloses a kind of control Switching Modules based on VPX bus, are split as master control borad and power board by that will control Switching Module, solve the contradiction that control Switching Module interface is excessive and volume is limited；According to actual task demand and resource service condition, it can be worked at the same time using the identical muti-piece control Switching Module of configuration, carry out warm back-up and realize double redundancy function to guarantee the reliability of whole system；The present invention also uses plate to complete the interaction of data and order between master control borad and power board to plate high speed connector, effectively promotes flexibility, versatility and the reliability of control Switching Module.
Description
Technical field
The invention belongs to Embedded real-time signal processing technical fields, more specifically, are related to a kind of control based on VPX bus
Switching Module processed.
Background technique
Following Information System will tie up the empty world one under integrated solid is supported towards land, sea, air, outer space, electricity five
The trend development of bodyization collaboration.The integrated information processing platform is the general airborne aviation electronics system of space-air-ground integration aircraft
System, its application is expanded to from traditional local aerospace region to be made of aviation area, near space, orbit space
Global full extent of space, and hardware and software reconstruct is needed support to realize more function such as scouting, interference, detection, communication, attack
It can multitask.
More stringent requirements are proposed for performance of following Information System differentiation to the integrated information processing platform: control is handed over
Block is changed the mold while keeping the high performances such as its calculating, data interaction, also to guarantee that its is highly reliable using the methods of redundancy backup
Property.
However, the buses such as ARINC429,1553B and VME used in traditional avionics system, pass through point pair
The technologies such as point, shared bus, parallel transmission realize data communication, and maximum bandwidth is respectively 100kbps, 1Mbps, 320Mbps.It is aobvious
So, these bussing techniques are not able to satisfy integrated information processing platform system scale and expand increasingly and transmit information category gradually
To data transmission, reliable, real-time performance requirement after increasing.Therefore it needs for a kind of new bus system of the Platform Designing
Framework.
This patent proposes a kind of new control Switching Module based on high speed serialization VPX bus of new generation, ensure that control
The high-performance of calculating, the data interaction of Switching Module.It uses a variety of high-performance switching fabrics, new bus in interfacing
Technology and new system folded and faulted belt, such as: GbE, SRIO, PCIE.The bus standard is believed using single-ended signal line and difference
Two kinds of electrical codes of number line realize physical layer signal transmissions, solve electromagnetic interference when high speed data transfer, offset and shake
Problem meets LVDS (low-voltage differential signal) level standard, and insertion loss is low, strong antijamming capability, is up in transmission rate
When 6.25Gbps, crosstalk can carry the high speeds serial transmission protocols such as PCIE, SRIO, gigabit Ethernet GbE still less than 3%.
On the other hand, this patent proposes to carry out real-time online backup to main control switchboard using dual redundant framework, to protect
Its high reliability is demonstrate,proved.It improves under current space flight military project application environment, in the design of the controller based on VPX bus, due to
Master control borad and power board are integrated on one piece of board, board interface resource is nervous and whole when controlling Switching Module and breaking down
A system will face problem brought by paralysis.
The developing direction of following Information System and embedded real time signal processing platform shows: in signal processing platform
Under the premise of overcoming stringent volume, weight and power consumption limit, more to have high-performance, it is high flexibly, it is high reliability, expansible
Feature.Therefore, a kind of novel VPX bus marco switching fabric need to be designed, meets VPX specification in the new switching fabric of guarantee
Meanwhile should also have the data transmission and processing ability of high reliability, big data quantity, multi tate, it is ensured that the safety of data communication
Property, timeliness and reliability.
Summary of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide provide a kind of control exchange based on VPX bus
Module is split as master control borad and power board by that will control Switching Module, solves that control Switching Module interface is excessive and volume
Limited contradiction, port breach the limitation of traditional VPX standard；Master control borad and power board are completed to plate high speed connector using plate
Between data and order interaction, effectively promoted control Switching Module flexibility, versatility and reliability；It also achieves simultaneously
Dual redundant warm back-up mechanism.
For achieving the above object, a kind of control Switching Module based on VPX bus of the present invention, which is characterized in that packet
Include master control borad and power board；
The master control borad using PowerPC as core, including PowerPC, PCIE crosspoint, SRIO crosspoint,
PCIE-SATA conversion unit of protocol, plate reset configuration to plate high speed connector, memory cell, Ethernet chip unit, FPGA
Unit；
PowerPC is connected by the PCIEx4 interface of itself with PCIE crosspoint, is expanded by PCIE crosspoint, real
Existing 6 road PCIEx1 signals by the data plane of VPX bus interface respectively with the VPX bus interface of external 6 payload modules
Data plane carries out data interaction；Realize data plane and external load module of the 1 road PCIEx4 signal by VPX bus interface
It is connected；It realizes that 1 road PCIEx2 signal is connected with PCIE-SATA conversion unit of protocol, then passes through PCIE-SATA conversion unit of protocol
2 road SATA signals are expanded into, and pass through the VPX bus interface of the data plane and external storage plate module of VPX bus interface
Data plane is connected；
PowerPC is connected by the SRIOx4 interface of itself with SRIO crosspoint, is expanded by SRIO crosspoint, real
Existing 3 road SRIOx4 signals back up wherein 2 road SRIOx4 signals by the data plane and external redundant of VPX bus interface
The data transmitting of active and standby control power board intermodule is realized in the data plane interconnection of control exchange plate module VPX bus interface；It will
Other 1 road SRIOx4 signal is connected to this control to plate high speed connector by plate and exchanges on the power board of plate module, to realize
Data interaction is carried out with the data plane of the VPX bus interface of external each payload module；
PowerPC is connected to plate high speed connector with plate by the 1 road SGMII interface of itself, is connected by plate to plate high speed
It connects device and exchanges the power board of plate module with this control indirectly and be connected, expand 6 road GbE signals, the VPX with external each payload module
The control plane of bus interface is connected；It is connected with plate to plate high speed connector by the RGMII interface of itself, by plate to plate height
The power board that fast connector exchanges plate module with this control is connected, and realizes the control pipe to the Ethernet switching chip of power board
Reason；The other 1 road SGMII interface of itself is directly passed through to the control plane of VPX bus interface and the control of external redundant backup
The control plane of exchange plate module VPX bus interface is connected, and realizes active and standby control power board intermodule order transmitting；
Memory cell uses SDRAM, tri- kinds of Nor Flash, Nand Flash type of memory, wherein SDRAM storage
Device uses DDR3 specifications design, docks with the DDR3 memory interface on central processor unit, is mainly used for storage and executes program
And data；Nor flash storage is mainly used for storage program area and reset configuration words RCW；Nand flash storage is adopted
Interface design is carried out with controlling mechanism FCM, is mainly used for storage file system；
Ethernet chip unit is to be connected with ethernet PHY chip institute's structure by PowerPC by itself RGMII interface
At, and the 1 road RGMII interface signal of PowerPC is converted by 1000BASE-T Ethernet by ethernet PHY chip and is electrically believed
Number；
FPGA resets the reset that configuration unit realizes entire control exchange plate module by FPGA；
The power board includes SRIO crosspoint, GbE crosspoint and plate to plate high speed connector；
Wherein, plate is connected simultaneously to plate high speed connector with master control borad and power board, makes to pass through between master control borad and power board
Plate realizes data interaction to plate high speed connector；
The 1 road SRIOx4 signal that master control borad is sent plate high speed connector by plate is input to SRIO crosspoint, and SRIO is handed over
The SRIOx4 signal that 1 road SRIOx4 signal is expanded into 8 tunnels by unit is changed, then will wherein 6 road SRIOx4 signals be connect by VPX bus
The data plane of mouth is connected with external each payload module, and in addition 2 road SRIOx4 signals walk master control to plate high speed connector by plate
The data plane of the VPX bus interface of plate exchanges plate module interconnection with the control with redundancy backup, realizes active and standby control power board
The data of intermodule are transmitted；
The 1 road GbE signal that master control borad is sent plate high speed connector by plate is input to GbE crosspoint, GbE crosspoint
1 road GbE signal is expanded into the GbE signal on 7 tunnels, then by wherein 6 road GbE signals by the control plane of VPX bus interface with
External each payload module is connected, and in addition 1 road GbE signal walks the VPX bus interface of master control borad by plate to plate high speed connector
Control plane exchanges the control plane interconnection of plate module VPX bus interface with the control of redundancy backup, realizes active and standby control exchange
Order transmitting between plate module.
Goal of the invention of the invention is achieved in that
The present invention is based on the control Switching Modules of VPX bus, are split as master control borad and exchange by that will control Switching Module
Plate solves the contradiction that control Switching Module interface is excessive and volume is limited；According to actual task demand and resource service condition,
It can be worked at the same time using the identical muti-piece control Switching Module of configuration, carry out warm back-up and realize double redundancy function to guarantee
The reliability of whole system；The present invention also uses plate to complete data and order between master control borad and power board to plate high speed connector
Interaction, effectively promoted control Switching Module flexibility, versatility and reliability.
Meanwhile the present invention is based on the control Switching Modules of VPX bus also to have the advantages that
(1), the present invention proposes a kind of new based on VPX signal processing platform framework, with Balanced interface quantity is excessive and body
PCIE exchange and PCIE-SATA protocol conversion are stayed in master control borad and carried out by the limited contradiction of product, SRIO and GbE agreement exchanges then
It is placed on power board completion；Increase data channel redundancy on the basis of functional redundancy, improves reliability；
(2), control Switching Module uses three kinds of SRIO, PCIE, gigabit Ethernet high speed bus interfaces, compared to tradition
Using a kind of bus as data link, the design provides bigger data bandwidth and better bus compatible for design.
(3), it is based on VPX agreement, devises VPX connector dual redundant bus interface, realizes the warm back-up of data transmission,
That is: in VPX interface data plane, control plane and expansion plane, the high speed data bus of identical function is respectively provided with two groups；Control
Switching Module processed realizes the real-time monitoring of control Switching Module by bus bar；When wherein one group of master control borad or power board are sent out
When raw failure, targeted on-line reorganization is implemented to control Switching Module rapidly, is exchanged by the control of another group of identical function
Module and its bus adapter tube and complete independently data transfer task, it is ensured that support plate works normally, and be greatly improved support plate can
By property and safety.
(4), control Switching Module in the case of the redundancy that ensure that system, does not reduce band under the basis that VPX is standardized
Width improves data transfer rate；
(5), master control borad supports the DMA transfer between high-speed interface, improves the real-time of data.
Detailed description of the invention
Fig. 1 is the control Switching Module schematic diagram the present invention is based on VPX bus；
Fig. 2 is master control borad schematic diagram shown in FIG. 1；
Fig. 3 is power board schematic diagram shown in FIG. 1.
Specific embodiment
A specific embodiment of the invention is described with reference to the accompanying drawing, preferably so as to those skilled in the art
Understand the present invention.Requiring particular attention is that in the following description, when known function and the detailed description of design perhaps
When can desalinate main contents of the invention, these descriptions will be ignored herein.
Embodiment
For the convenience of description, being first illustrated to the relevant speciality term occurred in specific embodiment:
1000BASE-T: being newest ethernet technology, it is to be ratified by the ieee standard committee in June, 1999.
DDR3 (Double Data Rate 3Synchronous Dynamic Random Access Memory): third
For Double Data Rate synchronous regime random access memory；
DMA (Direct Memory Access, direct memory access): direct memory access；
DSP (Digital Signal Process): i.e. Digital Signal Processing；
ELBC (Enhanced Local Bus Controller): enhanced local bus controller.
FCM (Flash Control Mechanism): Flash controlling mechanism；
FPGA (Field-Programmable Gate Array): i.e. field programmable gate array；
Gbps: i.e. transmission speed is 1000 megabits per second；
GbE (Gigabit Ethernet): gigabit Ethernet；
GHz: common frequency unit gigahertz (GHZ)；
MA: current unit milliampere；
MB: one of computer stores unit, full name MByte；
Mb/s: megabits per second refers to Bit Per Second amount；
MHz: common frequency unit megahertz；
One kind of Nand Flash:Flash memory, it is internal to use non-linear macroelement mode, it is in solid-state large-capacity
The realization deposited provides cheap effective solution scheme.
Nor Flash: a kind of nonvolatile flash memory technology is that Intel was created in 1988.
PCIE (Peripheral Component Interconnect Express): peripheral equipment interconnection；
PHY (Physical Layer): physical layer；
PowerPC(Performance Optimization With Enhanced RISC–Performance
Computing): a kind of central processing unit of reduced instruction set computer (RISC) framework；
RCW (Reset Configuration Word): reset configuration words；
RGMII (Reduced Gigabit Media Independent Interface): it is independent to simplify gigabit medium
Interface；
SATA (Serial Advanced Technology Attachment): Serial Advanced Technology Attachment；
SDRAM (Synchronous Dynamic Random Access Memory): synchronous DRAM；
SGMII (Serial Gigabit Media Independent Interface): serial gigabit medium is independent
Interface；
A kind of SRIO (Serial Rapid IO): high-speed serial bus；
USB (Universal Serial Bus): the abbreviation of universal serial bus is an external bus standard, is used for
Specification computer and external equipment are connected and communicate with；
VPX: it is organized in by VITA (VME International Trade Association, VME international trade association)
The high-speed serial bus standard of new generation proposed on its VME bus foundation for 2007；
Fig. 1 is the control Switching Module schematic diagram the present invention is based on VPX bus.
Firstly, being defined to VPX bus interface: VPX bus interface is carried as the restructural integrated information processing of integration
The data switching networks center of G system uses three kinds of high-speed serial bus, is GbE, SRIO, PCIE respectively.Master control borad VPX
Bus interface is compatible with SLT3-PAY-2F2U-14.2.3 standard.Wherein, as shown in Fig. 2, VPX bus interface 1 includes VPX P0 again
Interface, VPX P1 interface and VPX P2 interface, VPX J1 and J2 interface have 16 differential paths respectively, for controlling Switching Module
With the connection of external functional cards, and to control Switching Module input power interface is provided；Wherein, as shown in Fig. 2, master control
Plate VPX P0 interface includes input system signaling interface and input power interface；P0 universal plane interface provides input electricity for support plate
Source, reference clock and reset signal, in the present embodiment, VPX power interface be control Switching Module in power module and its
Its module provides power supply, provides the input powers such as 3.3V, 5V, 12V.
As shown in Fig. 2, VPX P1, P2 interface unit can be subdivided into data plane interface, control plane interface, extend and put down again
Face interface and user's self defined interface；Wherein master control borad P1 interface includes data plane interface and control plane interface, is matched respectively
It is set to 2 road SRIO X4 signals, 6 road PCIE X1 signals and 2 road GbE signals；
VPX P2 interface provides 16 road differential signal line interfaces and 8 road single-ended signal lines connects as user's self defined interface
Mouthful；
Master control borad is connected to plate high speed connector using plate with power board, constitutes a pair of of male and female port, functionally leads
The plate on plate and power board is controlled to plate high speed connector as a logic entirety, executes same function.
Below with reference to shown in Fig. 1, the control Switching Module the present invention is based on VPX bus is described in detail, specifically such as
Under:
A kind of control Switching Module based on VPX bus includes master control borad and power board；
As shown in Fig. 2, master control borad is using PowerPC as core, including PowerPC, PCIE crosspoint, SRIO exchange are single
Member, PCIE-SATA conversion unit of protocol, plate reset plate high speed connector, memory cell, Ethernet chip unit, FPGA
Configuration unit；
In the present embodiment, Power PC core frequency of heart is in 1200-1500MHz, includes 3 PCIE HSSI High-Speed Serial Interfaces, and 2
A SRIO high-speed interface, 2 SATA2.0 interfaces, 2 USB interfaces, the DDR3/DDR3L 64-bit Memory control of 1.33GHz
Device.According to the specific requirements of the present embodiment, 1 road SRIOx4 signal, 1 road PCIEx4 signal, 2 road SGMII are configured by port and are believed
Number, 2 road RGMII signals；
The PCIEx4 signal on 1 tunnel is connected by PowerPC with PCIE crosspoint, after the expansion by PCIE crosspoint,
The PCIEx1 signal on 6 tunnels is connected by the data plane of VPX bus interface with external load module；The PCIEx4 on 1 tunnel is believed
Number it is connected by the data plane of VPX bus interface with external load module；By the PCIEx2 signal on 1 tunnel and PCIE to SATA
Conversion unit of protocol is connected, then is expanded into 2 road SATA signals by PCIE to SATA protocol converting unit, and total by VPX
The data plane of line interface is connected with external storage board；
In the present embodiment, as shown in Fig. 2, required clock is 25MHZ when PCIE-SATA conversion unit of protocol works normally
Differential clocks need tri- kinds of voltages of 3.3V, 1V and 1.8V, the not requirement of electrifying timing sequence；
The SRIOx4 signal on 1 tunnel is connected by PowerPC with SRIO crosspoint, is expanded into 3 tunnels by SRIO crosspoint
SRIOx4 signal, then the SRIOx4 signal of wherein two-way is backed up by the data plane of VPX bus interface and external redundant
Control Switching Module interconnection, realize it is active and standby control Switching Module between data transmitting, in addition 1 road SRIOx4 signal pass through plate pair
Plate high speed connector is connected on the power board of this control Switching Module, to realize the data exchange with external each payload module,
The purpose designed in this way is, increases the independence of master control borad, and the number of SRIO can be also completed in the case where no power board
According to exchange；
PowerPC is connected to plate high speed connector with plate by the 1 road SGMII interface of itself, is connected by plate to plate high speed
It connects device and exchanges the power board of plate module with this control indirectly and be connected, expand 6 road GbE signals, the VPX with external each payload module
The control plane of bus interface is connected；It is connected with plate to plate high speed connector by the RGMII interface of itself, by plate to plate height
The power board that fast connector exchanges plate module with this control is connected, and realizes the control pipe to the Ethernet switching chip of power board
Reason；The other 1 road SGMII interface of itself is directly passed through to the control plane of VPX bus interface and the control of external redundant backup
The control plane of exchange plate module VPX bus interface is connected, and realizes active and standby control power board intermodule order transmitting；
Memory cell uses SDRAM, tri- kinds of Nor Flash, Nand Flash type of memory, wherein SDRAM storage
Device uses DDR3 specifications design, uses 4 DDR3 memory grains altogether to form 1GB capacity needed for us, in 64 bit wides
It deposits；Every DDR3 memory grain size is 256MB, and data width is 16, and the capacity of the SDRAM memory after composition is 1GB,
Bit wide is 64；The size of DDR3 can change according to use environment to be extended；
Nor flash storage size is 128MB, and data width is 16；The size of Nor flash storage can basis
Use environment variation extension；
Nand flash storage size is 512MB, and data width is 8；The size of Nand flash storage can root
Change according to use environment and extends；Nand flash storage is mainly used as File system design；In this way using FCM control logic into
Line interface design, improves data storage efficiency.
The 1 road RGMII interface of PowerPC is connected by Ethernet chip unit with ethernet PHY chip, and passes through Ethernet
The RGMII signal on 1 tunnel of PowerPC is transformed into 1000BASE-T Ethernet electric signal by PHY chip；
FPGA resets the reset that configuration unit realizes entire control Switching Module.In addition, FPGA also needs to realize system pipes
Manage the connection of signal.FPGA by the value of detection SYS_CON* be it is low, to confirm oneself master control identity.FPGA also passes through drain electrode
Open a way output driving SYSRESET*, the bus managements signal such as SM [3:0] and NVMRO*.
As shown in figure 3, power board includes SRIO crosspoint, GbE crosspoint and plate to plate high speed connector；
In the present embodiment, the SRIO exchange chip that SRIO crosspoint uses has reserved 48 road SRIO signals, in this reality
It applies in example using wherein 36 road SRIO signal wire；The GbE exchange chip that GbE crosspoint uses shares 16 road SGMII interfaces, and
1 road RGMII interface uses 11 road SGMII interface therein and 1 road RGMII interface in the present embodiment；
Wherein, plate is connected simultaneously to plate high speed connector with master control borad and power board, makes to pass through between master control borad and power board
Plate realizes data interaction to plate high speed connector；
The 1 road SRIOx4 signal that master control borad is sent plate high speed connector by plate is input to SRIO crosspoint, and SRIO is handed over
The SRIOx4 signal that 1 road SRIOx4 signal is expanded into 8 tunnels by unit is changed, then will wherein 6 road SRIOx4 signals be connect by VPX bus
The data plane of mouth is connected with external each payload module, and in addition 2 road SRIOx4 signals walk master control to plate high speed connector by plate
The data plane of the VPX bus interface of plate and the control Switching Module of redundancy backup interconnect, between the active and standby control Switching Module of realization
Data transmitting；
The 1 road GbE signal that master control borad is sent plate high speed connector by plate is input to GbE crosspoint, GbE crosspoint
1 road GbE signal is expanded into the GbE signal on 7 tunnels, then by wherein 6 road GbE signals by the control plane of VPX bus interface with
External each payload module is connected, and in addition 1 road GbE signal walks the control of master control borad VPX bus interface by plate to plate high speed connector
The order transmitting between active and standby control Switching Module is realized in the interconnection of the control Switching Module of plane processed and redundancy backup.
Although the illustrative specific embodiment of the present invention is described above, in order to the technology of the art
Personnel understand the present invention, it should be apparent that the present invention is not limited to the range of specific embodiment, to the common skill of the art
For art personnel, if various change the attached claims limit and determine the spirit and scope of the present invention in, these
Variation is it will be apparent that all utilize the innovation and creation of present inventive concept in the column of protection.
Claims (3)
1. a kind of control Switching Module based on VPX bus, which is characterized in that including master control borad and power board；
The master control borad is using PowerPC as core, including PowerPC, PCIE crosspoint, SRIO crosspoint, PCIE-
SATA protocol converting unit, plate reset configuration unit to plate high speed connector, memory cell, Ethernet chip unit, FPGA；
PowerPC is connected by the PCIEx4 interface of itself with PCIE crosspoint, is expanded by PCIE crosspoint, realizes 6
Road PCIEx1 signal passes through the data plane of VPX bus interface data with the VPX bus interface of external 6 payload modules respectively
Plane carries out data interaction；Realize that 1 road PCIEx4 signal passes through the data plane and external load module phase of VPX bus interface
Even；It realizes that 1 road PCIEx2 signal is connected with PCIE-SATA conversion unit of protocol, then is opened up by PCIE-SATA conversion unit of protocol
Transform into 2 road SATA signals, and the number of the VPX bus interface by the data plane and external storage plate module of VPX bus interface
It is connected according to plane；
PowerPC is connected by the SRIOx4 interface of itself with SRIO crosspoint, is expanded by SRIO crosspoint, realizes 3
Wherein 2 road SRIOx4 signals are passed through the control of data plane and the external redundant backup of VPX bus interface by road SRIOx4 signal
The data transmitting of active and standby control power board intermodule is realized in the data plane interconnection for exchanging plate module VPX bus interface；It will in addition
1 road SRIOx4 signal is connected to this control to plate high speed connector by plate and exchanges on the power board of plate module, with realization and outside
The data plane of the VPX bus interface of each payload module in portion carries out data interaction；
PowerPC is connected to plate high speed connector with plate by the 1 road SGMII interface of itself, by plate to plate high speed connector
The power board for exchanging plate module with this control indirectly is connected, and expands 6 road GbE signals, the VPX bus with external each payload module
The control plane of interface is connected；It is connected with plate to plate high speed connector by the RGMII interface of itself, plate high speed is connected by plate
It connects device and exchanges the power board of plate module with this control and be connected, realize the control management to the Ethernet switching chip of power board；
The control plane that the other 1 road SGMII interface of itself directly passes through VPX bus interface is exchanged with the control that external redundant backs up
The control plane of plate module VPX bus interface is connected, and realizes active and standby control power board intermodule order transmitting；
Memory cell uses SDRAM, tri- kinds of Nor Flash, Nand Flash type of memory, wherein SDRAM memory is adopted
It with DDR3 specifications design, is docked with the DDR3 memory interface on central processor unit, executes program and data for storing；
Nor flash storage is mainly used for storage program area and reset configuration words RCW；Nand flash storage uses control machine
FCM processed carries out Interface design, is mainly used for storage file system；
Ethernet chip unit be connected to be constituted with ethernet PHY chip by itself RGMII interface by PowerPC, and
The 1 road RGMII interface signal of PowerPC is converted into 1000BASE-T Ethernet electric signal by ethernet PHY chip；
FPGA is resetted while configuration unit realizes master control borad and power board by FPGA and is resetted；
The power board includes SRIO crosspoint, GbE crosspoint and plate to plate high speed connector；
Wherein, plate is connected simultaneously to plate high speed connector with master control borad and power board, makes between master control borad and power board through plate pair
Plate high speed connector realizes data interaction；
The 1 road SRIOx4 signal that master control borad is sent plate high speed connector by plate is input to SRIO crosspoint, and SRIO exchange is single
1 road SRIOx4 signal is expanded into the SRIOx4 signal on 8 tunnels by member, then wherein 6 road SRIOx4 signals are passed through VPX bus interface
Data plane is connected with external each payload module, and in addition 2 road SRIOx4 signals walk master control borad to plate high speed connector by plate
The data plane of VPX bus interface exchanges plate module interconnection with the control of redundancy backup, realizes active and standby control power board intermodule
Data transmitting；
The 1 road GbE signal that master control borad is sent plate high speed connector by plate is input to GbE crosspoint, and GbE crosspoint is by 1
Road GbE signal is expanded into the GbE signal on 7 tunnels, then wherein 6 road GbE signals are passed through the control plane of VPX bus interface and outside
Each payload module is connected, and in addition 1 road GbE signal walks the control of the VPX bus interface of master control borad by plate to plate high speed connector
Plane exchanges the control plane interconnection of plate module VPX bus interface with the control of redundancy backup, realizes that active and standby control exchanges template die
Order transmitting between block.
2. a kind of control Switching Module based on VPX bus according to claim 1, which is characterized in that the VPX is total
Line interface uses modular VPX connector, contains controllable impedance in the connector, and the interface of the connector defines compatible VPX
SLT3-SWH-6F6U-14.4.1 and SLT3-PAY-2F2U-14.2.3 standard in standard interface definition.
3. a kind of control Switching Module based on VPX bus according to claim 1, which is characterized in that the SDRAM
Memory includes 4 DDR3 memory grains, and every DDR3 memory grain size is 256MB, and data width is 16, after composition
The capacity of SDRAM memory is 1GB, and bit wide is 64；
The Nor flash storage size is 128MB, and data width is 16；
The Nand flash storage size is 512MB, and data width is 8.
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| CN201710024845.8A CN106909525B (en) | 2017-01-13 | 2017-01-13 | A kind of control Switching Module based on VPX bus |
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| CN201710024845.8A CN106909525B (en) | 2017-01-13 | 2017-01-13 | A kind of control Switching Module based on VPX bus |
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| CN106909525A CN106909525A (en) | 2017-06-30 |
| CN106909525B true CN106909525B (en) | 2019-07-12 |
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| CN112069099A (en) * | 2020-08-07 | 2020-12-11 | 天津市英贝特航天科技有限公司 | VPX architecture RapidIO remote switching transmission circuit |
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