CN112069099A - VPX architecture RapidIO remote switching transmission circuit - Google Patents

VPX architecture RapidIO remote switching transmission circuit Download PDF

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Publication number
CN112069099A
CN112069099A CN202010786840.0A CN202010786840A CN112069099A CN 112069099 A CN112069099 A CN 112069099A CN 202010786840 A CN202010786840 A CN 202010786840A CN 112069099 A CN112069099 A CN 112069099A
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CN
China
Prior art keywords
vpx
local
remote
speed connector
rapidio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN202010786840.0A
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Chinese (zh)
Inventor
霍炳秀
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Tianjin Embedtec Co Ltd
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Tianjin Embedtec Co Ltd
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Application filed by Tianjin Embedtec Co Ltd filed Critical Tianjin Embedtec Co Ltd
Priority to CN202010786840.0A priority Critical patent/CN112069099A/en
Publication of CN112069099A publication Critical patent/CN112069099A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a VPX architecture RapidIO remote exchange transmission circuit, which comprises a global reset chip connected with local VPX equipment, a local high-speed connector and a remote high-speed connector connected with the remote VPX equipment, wherein the local high-speed connector is connected with the remote high-speed connector through a coupling cable, and a common ground circuit of a homologous high-precision differential clock circuit is also arranged between the local VPX equipment and the local high-speed connector. The technical scheme of the invention has the advantages and beneficial effects that: the local VPX RapidIO equipment generates a global reset signal and provides a homologous high-precision clock, and the consistency of the local equipment and the remote equipment is kept; the RapidIO bus is connected with a coupling cable through a high-speed connector and a weighting and de-weighting circuit to realize enumeration and information exchange of local equipment and remote equipment; the design has the characteristics of high integration level, convenience in connection, high stability and the like.

Description

VPX architecture RapidIO remote switching transmission circuit
Technical Field
The invention belongs to the technical field of computer communication, and particularly relates to a VPX architecture RapidIO remote switching transmission circuit.
Background
VPX is a new generation of inter-board high-speed serial bus standard developed by VITA organization on its VME bus in 2007. Since the advent of VPX, which has received much attention and interest from the related art, combined with redii has enabled systems with Gigabyte data transfer capabilities, as well as enhanced mechanical structure and greater cooling capabilities. From the perspective of inheritance and reliability, and the advantages of VPX, a great number of existing customers still exist in the fields of real-time control and military industry.
RapidIO is a high-performance, low-pin-count, packet-switching-based interconnect architecture pioneered by Motorola and Mercury, and is an open interconnect technology standard designed to meet the demand of high-performance embedded systems in the future. RapidIO is mainly applied to internal interconnection of an embedded system, supports communication from a chip to a chip and from a board to a board, and can be used as a backboard (Backplane) connection of embedded equipment.
The development of the technology leads different audiences to have more and more high-performance requirements, and the RapidIO interconnection system can realize the more and more loud requirement on the connection outside the board instead of the connection between the boards in a single way. Therefore, it is very important to realize the remote exchange transmission of the VPX architecture RapidIO.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a RapidIO remote switching transmission circuit based on a VPX architecture.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a VPX architecture RapidIO remote exchange transmission circuit comprises a global reset chip, a local high-speed connector and a remote high-speed connector, wherein the global reset chip is connected with local VPX equipment, the remote high-speed connector is connected with the remote VPX equipment, the local high-speed connector is connected with the remote high-speed connector through a coupling cable, and a common ground circuit of a homologous high-precision differential clock circuit is further arranged between the local VPX equipment and the local high-speed connector.
The local VPX device is coupled to the local high speed connector via an emphasis/de-emphasis circuit, and the remote VPX device is coupled to the remote high speed connector via an emphasis/de-emphasis circuit.
The global reset chip is coupled to an emphasis/de-emphasis circuit between the local VPX device and the local high speed connector.
The common ground circuit of the homologous high-precision differential clock circuit comprises a clock chip and a crystal oscillator, wherein the clock chip is respectively connected with the local VPX equipment and the local high-speed connector, and the crystal oscillator is connected with the clock chip.
The technical scheme of the invention has the advantages and beneficial effects that: the local VPX RapidIO equipment generates a global reset signal and provides a homologous high-precision clock, and the consistency of the local equipment and the remote equipment is kept; the RapidIO bus is connected with a coupling cable through a high-speed connector and a weighting and de-weighting circuit to realize enumeration and information exchange of local equipment and remote equipment; the design has the characteristics of high integration level, convenience in connection, high stability and the like.
Drawings
Fig. 1 is a schematic block diagram of a connection of a VPX architecture RapidIO remote switch transport according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the figures and the detailed description.
As shown in fig. 1, a VPX architecture RapidIO remote switch transmission circuit includes a global reset chip 5 connected to a local VPX device, a local high-speed connector 1, and a remote high-speed connector 12 connected to a remote VPX device 11, where the local high-speed connector 1 is connected to the remote high-speed connector 11 through a coupling cable 3, and a same-source high-precision differential clock circuit common circuit 4 is further disposed between the local VPX device and the local high-speed connector.
The local VPX device 1 is connected to the local high speed connector 2 via an emphasis/de-emphasis circuit 6 and the remote VPX device 11 is connected to the remote high speed connector 12 via an emphasis/de-emphasis circuit 6.
The global reset chip 5 is connected with an emphasis/de-emphasis circuit 6 between the local VPX equipment 1 and the local high-speed connector 2; the global reset circuit 5 selects an SGM708 chip of Saint PowerPC to build a reset circuit, monitors 3.3V voltage, outputs a global reset signal of 200ms when the voltage is lower than 2.93V or is electrified, and outputs the global reset signal to all modules.
The common ground circuit 4 of the homologous high-precision differential clock circuit comprises a clock chip 541 connected with the local VPX equipment and the local high-speed connector and a crystal oscillator 42 connected with the clock chip; the homologous high-precision differential clock circuit public circuit 4 selects the tangshane sharp 7050 crystal oscillator 42 as an initial oscillation circuit to be provided for a clock chip of an ICS9FG108 chip adopting IDT, generates a plurality of homologous 125M HSCL level clocks and transmits the clocks to all RapidIO devices.
The weighting/de-weighting circuits 6 at the local side and the remote side adopt PI2EQX5904 chips of Pericom company, so that the RapidIO bus passes through the chip circuit to reduce error codes, improve signal quality and improve the stability of the system.
Local high-speed connector circuit 2, remote high-speed connector electricity 12 select for use SAMTEC' S ERI8-019-S-D-RA connector, and this connector high-speed difference signal and single-ended control signal resource are abundant, and supporting anti-interference shell of metal, can reduce external signal interference, and from taking locking device, RapidIO bus, clock signal, common ground circuit, global reset signal connection are mutually transmitted here.
The remote transmission coupling cable 3 adopts an EPLSP-019 and 2000 cable of SAMTEC to connect the high-speed connectors at two sides; the high-speed coupling circuits are arranged at two ends in the cable, so that the direct-current component and bus reflection of the differential transmission circuit are reduced, the quality of signals can be ensured during long-distance transmission, attenuation is reduced, and the anti-interference capability is improved.
The implementation method of the invention needs to follow the following power-on sequence, RapidIO is an enumeration process generated by a controller, and whether static enumeration or dynamic enumeration, the remote VPX equipment (later-stage equipment) must be ensured to be in a state capable of being scanned, so the later-stage equipment is powered on first.
The above examples are merely for illustrative clarity and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.

Claims (6)

1. A VPX architecture RapidIO remote switching transmission circuit is characterized by comprising a global reset chip connected with local VPX equipment, a local high-speed connector and a remote high-speed connector connected with the remote VPX equipment; the local high-speed connector is connected with the remote high-speed connector through a coupling cable, and a homologous high-precision differential clock circuit common ground circuit is further arranged between the local VPX equipment and the local high-speed connector.
2. A VPX architecture RapidIO remote switch transport circuit according to claim 1, characterized in that the local VPX device is connected to the local high speed connector via an emphasis/de-emphasis circuit.
3. A VPX architecture RapidIO remote switch transport circuit according to claim 1, characterized in that the remote VPX device is connected to the remote high speed connector via an emphasis/de-emphasis circuit.
4. A VPX architecture RapidIO remote switch transport circuit according to claim 2, characterized in that the global reset chip is connected to the emphasis/de-emphasis circuit between the local VPX device and the local high speed connector.
5. A VPX architecture RapidIO remote switch transport circuit of claim 4, wherein the same source high precision differential clock circuit common ground circuit comprises a clock chip connected to a local VPX device and a local high speed connector, and a crystal oscillator connected to the clock chip.
6. A VPX architecture RapidIO remote switch transport circuit according to any of claims 1 to 5 wherein the power up sequence of the local VPX device and the remote VPX device is that the remote VPX device powers up first.
CN202010786840.0A 2020-08-07 2020-08-07 VPX architecture RapidIO remote switching transmission circuit Withdrawn CN112069099A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010786840.0A CN112069099A (en) 2020-08-07 2020-08-07 VPX architecture RapidIO remote switching transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010786840.0A CN112069099A (en) 2020-08-07 2020-08-07 VPX architecture RapidIO remote switching transmission circuit

Publications (1)

Publication Number Publication Date
CN112069099A true CN112069099A (en) 2020-12-11

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CN202010786840.0A Withdrawn CN112069099A (en) 2020-08-07 2020-08-07 VPX architecture RapidIO remote switching transmission circuit

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CN (1) CN112069099A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015011667A1 (en) * 2013-07-26 2015-01-29 Aselsan Elektronik Sanayi Ve Ticaret Anonim Sirketi A computer module in a single card
CN106294049A (en) * 2016-08-26 2017-01-04 天津市英贝特航天科技有限公司 A kind of 6U VPX computer motherboard electric interfaces global function test base plate
CN106909525A (en) * 2017-01-13 2017-06-30 电子科技大学 A kind of control Switching Module based on VPX buses
CN110691044A (en) * 2019-10-12 2020-01-14 四川赛狄信息技术股份公司 Data exchange system based on SRIO exchange chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015011667A1 (en) * 2013-07-26 2015-01-29 Aselsan Elektronik Sanayi Ve Ticaret Anonim Sirketi A computer module in a single card
CN106294049A (en) * 2016-08-26 2017-01-04 天津市英贝特航天科技有限公司 A kind of 6U VPX computer motherboard electric interfaces global function test base plate
CN106909525A (en) * 2017-01-13 2017-06-30 电子科技大学 A kind of control Switching Module based on VPX buses
CN110691044A (en) * 2019-10-12 2020-01-14 四川赛狄信息技术股份公司 Data exchange system based on SRIO exchange chip

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
刘旭东: "基于RapidIO总线的VPX标准存储板设计", 《电子设计工程》 *

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Application publication date: 20201211

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