CN106896598A - 一种goa驱动面板 - Google Patents
一种goa驱动面板 Download PDFInfo
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
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Abstract
本发明提供了一种GOA驱动面板,该面板包括:显示区域及设置于所述显示区域相对两侧的非显示区域,所述非显示区域内设有多个GOA驱动单元,每一所述GOA驱动单元与所述显示区域内的一条扫描线连接,用以向对应扫描线输出扫描信号,在所述非显示区域内还设有多个信号波形延迟单元,在每个所述GOA驱动单元及对应的扫描线之间各设置有一个所述信号波形延迟单元,用于减小面板不同区域像素的馈通电压差异。本发明可以减小面板不同区域像素馈通电压差异,减小面板画面闪烁,提升面板显示品质。
Description
技术领域
本发明属于显示控制技术领域,具体地说,尤其涉及一种GOA驱动面板。
背景技术
液晶显示面板作为目前的主流显示面板,被广泛应用于日常的电子产品中,其显示品质(如画面延迟、画面闪烁)等问题也受到了人们密切关注。
为减小屏幕边框,GOA(Gate On Array,集成在阵列基板上的扫描技术)被广泛应用于窄边框屏幕。GOA技术既可以节约面板成本,又可以缩减面板边框尺寸。
但是,在扫描信号传输的过程中,面板内的电阻以及电容的RC延迟会造成扫描信号延迟,进而引起面板显示不均,造成画面闪烁。
发明内容
为解决以上问题,本发明提供了一种GOA驱动面板,用于减小面板不同区域像素的馈通电压差异,减小面板画面闪烁,提升面板显示品质。
根据本发明的一个实施例,提供了一种GOA驱动面板,包括:显示区域及设置于所述显示区域相对两侧的非显示区域,
所述非显示区域内设有多个GOA驱动单元,每一所述GOA驱动单元与所述显示区域内的一条扫描线连接,用以向对应扫描线输出扫描信号,
在所述非显示区域内还设有多个信号波形延迟单元,在每个所述GOA驱动单元及对应的扫描线之间各设置有一个所述信号波形延迟单元,用于减小面板不同区域像素的馈通电压差异。
根据本发明的一个实施例,所述信号波形延迟单元包括一电阻,所述电阻与所述GOA驱动单元及对应的扫描线串联,并且各个所述信号波形延迟单元内的电阻的阻值相等。
根据本发明的一个实施例,所述电阻的阻值范围为10~10000欧姆。
根据本发明的一个实施例,所述电阻由金属材料制成。
根据本发明的一个实施例,所述电阻由多晶硅材料制成。
根据本发明的一个实施例,所述电阻由氧化铟锡材料制成。
根据本发明的一个实施例,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上,包括用作所述电阻的金属绕线。
根据本发明的一个实施例,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上;
第一绝缘层,设置于所述第一金属层上;
第二金属层,设置于所述第一绝缘层上,包括用作所述电阻的金属绕线。
根据本发明的一个实施例,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
多晶硅岛层,设置于所述缓冲层上,包括用作所述电阻的多晶硅岛。
根据本发明的一个实施例,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上;
第一绝缘层,设置于所述第一金属层上;
第二金属层,设置于所述第一绝缘层上;
第二绝缘层,设置于所述第二金属层上;
氧化铟锡薄膜层,设置于所述第二绝缘层上,包括用作所述电阻的氧化铟锡薄膜。
本发明的有益效果:
本发明通过在每个GOA驱动单元及对应的扫描线之间各设置有一个信号波形延迟单元,可以减小面板不同区域像素馈通电压差异,减小面板画面闪烁,提升面板显示品质。
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要的附图做简单的介绍:
图1是现有技术中引起面板闪烁显示不均的原理示意图;
图2是现有技术中一种液晶显示面板结构示意图;
图3是根据本发明的一个实施例的液晶显示面板结构示意图
图4是根据本发明的一个实施例的GOA驱动单元与对应扫描线、电阻的连接示意图;
图5是根据本发明的一个实施例的GOA输出的扫描信号波形示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手段来解决技术问题,并达成技术效果的实现过程能充分理解并据以实施。需要说明的是,只要不构成冲突,本发明中的各个实施例以及各实施例中的各个特征可以相互结合,所形成的技术方案均在本发明的保护范围之内。
如图1所示为现有技术中引起面板闪烁、显示不均的原理示意图,其对应的现有显示面板结构如图2所示。如图2所示,GOA电路12设置于显示区域11的相对两侧,用于输出GOA信号(扫描信号)。GOA信号经由扫描线13到达对应的像素。
如图1所示,像素A、像素B和像素C沿行方向依次排列,上一行表示各像素对应的像素电压,下一行表示各像素对应的馈通电压。设GOA电路12设置在像素A的左侧,最靠近像素A,与像素B和像素C的距离依次增大。在GOA电路12输出扫描信号时,该扫描信号在到达像素A时的波形接近理想波形,其脉冲的幅度为Vgh,上升和下降时均没有延迟现象。在GOA电路12停止输出扫描信号时,扫描线上的电压由Vgh迅速下降为零(此处设定扫描线上无扫描信号时的电压为零,本发明不限于此),此时像素A的馈通电压为ΔVa。
与像素A相比,像素B与GOA驱动电路12的距离远,扫描信号到达像素B时发生了RC延迟。该RC延迟会导致扫描信号的波形发生变形,如图1中上一行中的像素B对应的脉冲波形。由于与扫描线连接的开关TFT是在低于Vgh的某一电压值时关闭(如图1中上一行的像素B标注所示),此时扫描线上的电压为小于Vgh的某一电压值,而扫描线无扫描信号时的电压为零,由此导致像素B的馈通电压为ΔVb,并且ΔVb小于ΔVa。同理,扫描信号到达像素B时也会发生RC延迟,由此导致像素B的馈通电压为ΔVc,并且ΔVc小于ΔVa,ΔVb≈ΔVc。各像素馈通电压不同会造成面板边缘像素与公共电极的电压差和中心点像素与公共电极的电压差不同,进而引起面板画面闪烁及显示不均。
为解决以上问题,本发明提供了一种GOA驱动面板,在每个GOA驱动单元与对应的扫描线之间设置有信号波形延迟单元,该信号波形延迟单元设置于面板的非显示区域内,可以减小由于延迟效应导致的面板不同区域扫描信号波形差异,进而减小面板不同区域扫描信号波形差异造成的像素馈通电压差异,从而减少面板的画面闪烁,提升面板显示品质。
如图3所示,该GOA驱动面板包括显示区域21及设置于显示区域相对两侧的非显示区域24,非显示区域24内设有多个GOA驱动单元22,每一GOA驱动单元22与显示区域21内的一条扫描线23连接,用以向对应扫描线输出扫描信号。在非显示区域24内还设有多个信号波形延迟单元25,在每个GOA驱动单元25及对应的扫描线之间各设置有一个信号波形延迟单元25,用于减小面板不同区域像素的馈通电压差异。
在本发明中,信号波形延迟单元25可以将GOA驱动单元22输出的扫描信号进行波形延迟处理后输出,这就使得扫描信号在输入至显示面板上各扫描信号之前就发生了波形延迟。该发生了波形延迟的扫描信号的下降沿经过具有一定时延的缓慢变化过程从Vgh下降到零值。该缓慢变化过程中,存在某一时刻使得扫描线上电压的为开关TFT的关闭电压。在扫描线上的电压下降为开关TFT的关闭电压时,开关TFT关闭。最终,扫描线上的电压下降为零。由于开关TFT关闭时,各像素上对应的扫描线上的电压相同,扫描线上无扫描信号时的电压相同,这就使得各像素的馈通电压基本相等,从而可以消除面板的闪烁现象。
如图5所示为根据本发明的一个实施例的显示面板各部位输入波形及对应的像素馈通电压波形图,上一行表示各像素对应的像素电压,下一行表示各像素对应的馈通电压。由图5可知,GOA驱动单元22输出的扫描信号为理想脉冲波形。该理想脉冲波形经信号波形延迟单元25之后依次到达面板前部的像素A、面板中间的像素B和面板尾部的像素C。并且,到达像素A、像素B和像素C的信号波形均发生了延迟,如图中实线表示。对应像素A,扫描信号的下降沿延迟输出,使得像素A在TFT关闭前后的电压差减小,进而使得像素A的馈通电压减小。通过合理设置信号波形延迟单元的延迟参数,可以使得像素A、像素B和像素C的馈通电压保持大致相等,进而消除显示面板的画面闪烁问题,提升面板显示品质。
根据本发明的一个实施例,该信号波形延迟单元包括一电阻R,该电阻R与GOA驱动单元22及对应的扫描线23串联,并且各个信号波形延迟单元25内的电阻R的阻值相等,如图4所示。也就是说,在信号波形延迟单元25内部设置有电阻R,该电阻R设置在GOA驱动单元22和对应的扫描线23之间。通过该电阻R可以实现扫描信号波形延迟。当然,也可以采用其他电感等器件来实现信号波形延迟,信号波形延迟单元内的电阻数量也不限定为一个,本发明不限于此。
对于某一确定尺寸的面板,其扫描线的长度也确定并且各扫描线的长度一般相同,所以可将各信号波形延迟单元25内的电阻设置为阻值相等。基于通常的显示面板尺寸,可以将电阻R的阻值设置在10~10000欧姆之间,具体取值根据面板尺寸确定。
参考显示面板的制作工艺及各工艺制程内采用的材料,在本发明的一个实施例中,该电阻R可以由金属材料制成。在制作面板显示区域内某一金属层的同时制作金属走线,将该金属走线作为电阻R。通过调节金属走线的长度可以获取所需的电阻R的阻值。
根据本发明的另一个实施例,该电阻R还可以由多晶硅材料制成。具体的,可以在制作面板显示区域内的多晶硅岛的同时制作多晶硅材料的电阻。多晶硅材料的电阻的阻值可以通过调节多晶硅岛掺杂离子的浓度实现。
根据本发明的另一个实施例,该电阻R还可以有ITO(Indium tin oxide,氧化铟锡)材料制成。具体的,可以在制作面板显示区域中的像素电极的同时制作ITO材料的电阻。ITO材料的电阻的阻值可以通过调节ITO薄膜的面积实现。
根据本发明的另一个实施例,该信号波形延迟单元还包括缓冲层和第一金属层。其中,该缓冲层设置于基底上。第一金属层设置于缓冲层上,包括用作电阻R的金属绕线。结合液晶显示面板的制作工艺,在形成该第一金属层时,可以同时形成薄膜晶体管的栅极(或源漏极和数据线)和电阻R,然后在第一金属层上形成其后的各层。这样,就可以在形成薄膜晶体管的栅极,或者源漏极和数据线的同时,形成金属材料的电阻R。
根据本发明的另一个实施例,该信号波形延迟单元还包括缓冲层、第一金属层、第一绝缘层和第二金属层。其中,缓冲层设置于基底上。第一金属层设置于缓冲层上,对应薄膜晶体管的栅极,或者源漏极和数据线。第一绝缘层设置于第一金属层上;第二金属层设置于第一绝缘层上,包括用作电阻R的金属绕线。另外,该第二金属层一般还包括对应第一金属层的栅极的源漏极和数据线,或对应第一金属层的源漏极和数据线的栅极。这样,就可以在形成薄膜晶体管的栅极,或者源漏极和数据线的同时,形成金属材料的电阻R。
根据本发明的一个实施例,该信号波形延迟单元还包括缓冲层和多晶硅岛层。其中,缓冲层设置于基底上;多晶硅岛层设置于缓冲层上,包括用作电阻R的多晶硅岛。另外,该多晶硅层还岛包括位于显示区域、用作薄膜晶体管的沟道的多晶硅岛。非显示区域的用作电阻R的多晶硅岛,其对应的阻值可以通过掺杂离子的浓度进行调节。
根据本发明的另一个实施例,该信号波形延迟单元还包括缓冲层、第一金属层、第一绝缘层、第二金属层、第二绝缘层和ITO薄膜层。其中,缓冲层设置于基底上;第一金属层设置于缓冲层上,一般对应薄膜晶体管的栅极,或者源漏极和数据线;第一绝缘层设置于第一金属层上;第二金属层设置于第一绝缘层上,对应第一金属层的栅极的源漏极和数据线,或者对应第一金属层的源漏极和数据线的栅极;第二绝缘层设置于第二金属层上;ITO薄膜层设置于第二绝缘层上,包括用作电阻R的ITO薄膜。另外,该ITO薄膜层一般还包括位于显示区域、用作像素电极的ITO薄膜。通过控制用作电阻R的ITO薄膜的面积,或者长度和宽度,可以调节该ITO薄膜材料的电阻R的阻值。
虽然本发明所公开的实施方式如上,但所述的内容只是为了便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属技术领域内的技术人员,在不脱离本发明所公开的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。
Claims (10)
1.一种GOA驱动面板,其特征在于,包括:显示区域及设置于所述显示区域相对两侧的非显示区域,
所述非显示区域内设有多个GOA驱动单元,每一所述GOA驱动单元与所述显示区域内的一条扫描线连接,用以向对应扫描线输出扫描信号,
在所述非显示区域内还设有多个信号波形延迟单元,在每个所述GOA驱动单元及对应的扫描线之间各设置有一个所述信号波形延迟单元,用于减小面板不同区域像素的馈通电压差异。
2.根据权利要求1所述的面板,其特征在于,所述信号波形延迟单元包括一电阻,所述电阻与所述GOA驱动单元及对应的扫描线串联,并且各个所述信号波形延迟单元内的电阻的阻值相等。
3.根据权利要求2所述的面板,其特征在于,所述电阻的阻值范围为10~10000欧姆。
4.根据权利要求2或3所述的面板,其特征在于,所述电阻由金属材料制成。
5.根据权利要求2或3所述的面板,其特征在于,所述电阻由多晶硅材料制成。
6.根据权利要求2或3所述的面板,其特征在于,所述电阻由氧化铟锡材料制成。
7.根据权利要求4所述的面板,其特征在于,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上,包括用作所述电阻的金属绕线。
8.根据权利要求4所述的面板,其特征在于,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上;
第一绝缘层,设置于所述第一金属层上;
第二金属层,设置于所述第一绝缘层上,包括用作所述电阻的金属绕线。
9.根据权利要求5所述的面板,其特征在于,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
多晶硅岛层,设置于所述缓冲层上,包括用作所述电阻的多晶硅岛。
10.根据权利要求6所述的面板,其特征在于,所述信号波形延迟单元还包括:
缓冲层,设置于基底上;
第一金属层,设置于所述缓冲层上;
第一绝缘层,设置于所述第一金属层上;
第二金属层,设置于所述第一绝缘层上;
第二绝缘层,设置于所述第二金属层上;
氧化铟锡薄膜层,设置于所述第二绝缘层上,包括用作所述电阻的氧化铟锡薄膜。
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