CN106486524B - 显示装置 - Google Patents
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- Publication number
- CN106486524B CN106486524B CN201610790359.2A CN201610790359A CN106486524B CN 106486524 B CN106486524 B CN 106486524B CN 201610790359 A CN201610790359 A CN 201610790359A CN 106486524 B CN106486524 B CN 106486524B
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- China
- Prior art keywords
- power line
- connecting pattern
- display device
- initialization
- insulating layer
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10K2102/341—Short-circuit prevention
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- H—ELECTRICITY
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Abstract
一种显示装置,该显示装置包括:基板、设置在所述基板上的显示部分以及设置在所述显示部分之外的焊盘部分、设置在所述显示部分与所述焊盘部分之间的跳跃部分、设置在所述基板上的至少两条电力线、在所述跳跃部分中将所述至少两条电力线彼此连接的连接图案以及与所述连接图案间隔开并且围绕所述连接图案以防止跳跃部分处的残留物缺陷和短路缺陷的绝缘层。
Description
技术领域
本公开涉及一种显示装置,更具体地讲,涉及一种防止线路的残留物缺陷和短路缺陷的显示装置。
背景技术
各种平板显示器(FPD)已取代了更重更大的阴极射线管(CRT)。平板显示器的示例包括液晶显示器(LCD)、场发射显示器(FED)、等离子体显示面板(PDP)和有机发光二极管(OLED)显示器。
更详细地讲,OLED显示器是被配置为通过激发有机化合物来发射光的自发射显示装置。OLED显示器不需要液晶显示器中所使用的背光单元,因此具有薄外形、轻重量和更简单的制造工艺。OLED显示器还可在低温下制造并且具有1ms或更小的快速响应时间、低功耗、宽视角和高对比度。
另外,OLED显示器包括在充当阳极的第一电极与充当阴极的第二电极之间由有机材料形成的发光层。OLED显示器通过使从第一电极接收的空穴与从第二电极接收的电子在发光层内复合来形成空穴-电子对(激子),并且通过激子返回到基态能级时所生成的能量来发射光。
另外,OLED显示器包括通过多个像素实现图像的显示区域以及设置在显示区域之外的非显示区域。在非显示区域中,设置有用于将各种信号供应给显示区域的所述多个像素的多条线。具体地讲,所述多条线通常利用具有低电阻的金属来制成,但是同一层上的线占据边框的较大区域。
OLED显示器使用阳极作为非显示区域的线,以减小非显示区域的边框。然而,当对阳极层进行构图时,留下阳极的残留物。因此,如图1所示,由于阳极图案的残留物问题,在阳极的残留物与层叠在阳极的残留物上的层之间生成短路缺陷,从而降低了OLED显示器的可靠性。
发明内容
因此,本发明的一方面在于提供一种防止线路的残留物缺陷和短路缺陷的显示装置。
在一个方面,一种显示装置包括基板、设置在所述基板上的显示部分以及设置在所述显示部分之外的焊盘部分、设置在所述显示部分与所述焊盘部分之间的跳跃部分、设置在所述基板上的至少两条电力线、在所述跳跃部分中将所述至少两条电力线彼此连接的连接图案以及与所述连接图案间隔开并且围绕所述连接图案的绝缘层。
在另一方面,本发明提供了一种显示装置,该显示装置包括在基板上的显示部分、在所述基板上设置所述显示部分之外的焊盘部分、从所述显示部分延伸的第一初始化电力线以及连接至所述焊盘部分的第二初始化电力线。该显示装置还包括设置在所述第一初始化电力线和第二初始化电力线之间的高电位电力线、设置在所述高电位电力线的一侧并且连接至所述焊盘部分的低电位电力线、设置在所述显示部分和所述焊盘部分之间的跳跃部分、在所述跳跃部分中将所述第一初始化电力线和所述第二初始化电力线彼此连接的连接图案以及围绕所述连接图案的水平部分并且不围绕所述连接图案的垂直部分的绝缘层。
本申请的进一步的适用范围将从下文给出的详细描述而变得显而易见。然而,仅示意性地在指示本发明的优选实施方式的同时给出详细描述和具体示例,因为对于本领域技术人员而言,通过该详细描述,在本发明的精神和范围内的各种改变和修改将变得显而易见。
附图说明
附图被包括以提供对本发明的进一步理解,并且被并入本说明书并构成本说明书的一部分,附图示出了本发明的实施方式,并且与说明书一起用来说明本发明的原理。附图中:
图1是示出在现有技术的OLED显示器中生成的短路的图像;
图2是OLED显示器的示意性框图;
图3示出子像素的电路配置的第一示例;
图4示出子像素的电路配置的第二示例;
图5是示出OLED显示器的平面图;
图6是OLED显示器的子像素的横截面图;
图7是示出根据本发明的第一实施方式的OLED显示器的一部分的平面图;
图8是示意性地示出图7所示的线路的一部分的平面图;
图9是沿着图8的线I-I’截取的横截面图;
图10和图11是示出在显示装置的跳跃部分中发生短路的横截面图;
图12是示出根据本发明的第二实施方式的显示装置的一部分的平面图;
图13是示意性地示出图12所示的线路的一部分的平面图;
图14是沿着图13的线II-II’截取的横截面图;以及
图15是示出图14的另一实施方式的横截面图。
具体实施方式
现在将详细参照本发明的实施方式,其示例示出于附图中。只要可能,贯穿附图将使用相同的标号来指代相同或相似的部分。将注意,如果确定已知技术会误导本发明的实施方式,则所述技术的详细描述将被省略。
根据本发明的实施方式的显示装置是显示元件形成在柔性塑料基板上的塑料显示装置。塑料显示装置的示例包括OLED显示器、LCD和电泳显示器。使用OLED显示器作为塑料显示装置的示例描述本发明的实施方式。根据本发明的实施方式的OLED显示器可使用玻璃基板以及塑料基板。
代替上述OLED显示器,根据本发明的实施方式的显示装置还可使用液晶显示器。例如,当本发明的实施方式被应用于液晶显示器时,液晶显示器的像素电极或公共电极按照与根据本发明的实施方式的阳极相同的方式形成为透明导电层。因此,根据本发明的实施方式的阳极可被应用于液晶显示器的电源单元的线路。
下面参照图2至图15描述本发明的实施方式。
更详细地讲,图2是OLED显示器的示意性框图,图3和图4示出子像素的电路配置的第一示例和第二示例,图5是示出OLED显示器的平面图,图6是根据本发明的实施方式的OLED显示器的子像素的横截面图。
参照图2,根据本发明的实施方式的OLED显示器包括图像处理单元10、定时控制器20、数据驱动器30、选通驱动器40和显示面板50。图像处理单元10输出从外部供应的数据信号DATA和数据使能信号DE,并且除了数据使能信号DE以外,还可输出垂直同步信号、水平同步信号和时钟信号中的一个或更多个。图像处理单元10以集成电路(IC)形式形成在系统电路板上。
另外,定时控制器20从图像处理单元10接收数据信号DATA和驱动信号(包括数据使能信号DE或者垂直同步信号、水平同步信号、时钟信号等)。定时控制器20基于驱动信号输出用于控制选通驱动器40的操作定时的选通定时控制信号GDC以及用于控制数据驱动器30的操作定时的数据定时控制信号DDC。定时控制器20也以IC形式形成在控制电路板上。
另外,数据驱动器30响应于从定时控制器20供应的数据定时控制信号DDC对从定时控制器20接收的数据信号DATA进行采样和锁存,并且将采样和锁存的数据信号DATA转换为伽马参考电压。然后,数据驱动器30输出伽马参考电压。具体地讲,数据驱动器30通过数据线DL1至DLn来输出数据信号DATA。另外,数据驱动器30以IC形式形成在数据电路基板上。
选通驱动器40响应于从定时控制器20供应的选通定时控制信号GDC在使选通电压的电平移位的同时输出选通信号。选通驱动器40通过选通线GL1至GLm来输出选通信号,并且以IC形式形成在选通电路板上或者以面板中栅极(GIP)方式形成在显示面板50上。
另外,显示面板50响应于分别从数据驱动器30和选通驱动器40接收的数据信号DATA和选通信号来显示图像,并且如所示,包括显示图像的子像素SP。
参照图3,各个子像素包括开关晶体管SW、驱动晶体管DR、电容器Cst、补偿电路CC和OLED。另外,OLED基于由驱动晶体管DR生成的驱动电流来进行操作以发射光。
开关晶体管SW响应于通过第一选通线GL1供应的选通信号来执行开关操作以使得通过第一数据线DL1供应的数据信号作为数据电压被存储在电容器Cst中。另外,驱动晶体管DR基于存储在电容器Cst中的数据电压来操作以使得在高电位电力线VDD与低电位电力线GND之间流过驱动电流。
补偿电路CC是用于补偿驱动晶体管DR的阈值电压的电路。补偿电路CC包括一个或更多个薄膜晶体管和电容器。补偿电路CC的配置可根据补偿方法而不同地改变。如图4所示,包括补偿电路CC的子像素还包括用于驱动补偿TFT并且供应预定信号或电力的信号线和电力线。增加的信号线可被定义为用于驱动包括在子像素中的补偿TFT的1-2选通线GL1b。在图4中,“GL1a”是用于驱动开关晶体管SW的1-1选通线。增加的电力线可被定义为用于以预定电压对子像素的预定节点进行初始化的初始化电力线INIT。然而,这仅是示例,本发明的实施方式不限于此。
另外,作为示例,图3和图4示出一个子像素包括补偿电路CC。然而,当要补偿的对象(例如,数据驱动器30)被设置在子像素之外时,补偿电路CC可被省略。子像素基本上具有包括开关晶体管SW、驱动晶体管DR、电容器和OLED的2T(晶体管)1C(电容器)的配置。然而,当补偿电路CC被增加到子像素时,子像素可具有3T1C、4T2C、5T2C等的各种配置。
参照图5,根据本发明的实施方式的OLED显示器的显示面板包括基板110、显示部分DP、焊盘部分60、第一选通驱动器40a和第二选通驱动器40b、高电位电力线VDD、低电位电力线GND和初始化电力线INIT。如所示,焊盘部分60形成在基板110的上边缘处。另外,焊盘部分60电连接至外部电路板。例如,焊盘部分60连接至安装有数据驱动器的数据电路板或者安装有定时控制器的控制电路板等。
第一选通驱动器40a和第二选通驱动器40b是向形成在显示部分DP中的子像素SP输出选通信号的电路。另外,第一选通驱动器40a被设置在显示部分DP的左侧并且供应选通信号,第二选通驱动器40b被设置在显示部分DP的右侧并且供应选通信号。
另外,高电位电力线VDD用于将通过焊盘部分60从外部接收的高电位电力传送给显示部分DP的子像素SP。低电位电力线GND用于将通过焊盘部分60从外部接收的低电位电力(或接地电平电力)传送给显示部分DP的子像素SP。另外,初始化电力线INIT用于将通过焊盘部分60从外部接收的初始化电力传送给显示部分DP的子像素SP。
如所示,高电位电力线VDD和初始化电力线INIT被设置在焊盘部分60与显示部分DP之间。具体地讲,低电位电力线GND具有介于焊盘部分60和显示部分DP之间的区域以及围绕显示部分DP的区域。高电位电力线VDD、低电位电力线GND和初始化电力线INIT形成一对,并且被设置在显示面板上。如图5所示,各自包括线VDD、GND和INIT的两对可被分别设置在焊盘部分60的左侧和右侧。
参照图6,根据本发明的实施方式的OLED显示器100包括由玻璃、塑料或金属等制成的基板110。在本发明的实施方式中,基板110可由塑料制成,更具体地讲,可由聚酰亚胺基板制成。因此,根据本发明的实施方式的基板110具有柔性特性。另外,第一缓冲层112被设置在基板110上,并且保护在后续工艺中形成的薄膜晶体管免受杂质(例如,从基板110释放的碱离子)影响。第一缓冲层112可以是氧化硅(SiOx)层、氮化硅(SiNx)层或其多层。
另外,屏蔽层114被设置在第一缓冲层112上,并且防止可能由于使用聚酰亚胺基板而发生的面板驱动电流的减小。屏蔽层114可由导电材料、诸如硅的半导体、金属等形成。第二缓冲层116被设置在屏蔽层114上,并且保护在后续工艺中形成的薄膜晶体管免受杂质(例如,从屏蔽层114释放的碱离子)影响。第二缓冲层116可以是氧化硅(SiOx)层、氮化硅(SiNx)层或其多层。
另外,半导体层120被设置在第二缓冲层116上并且可由硅半导体或者氧化物半导体形成。硅半导体可包括非晶硅或者结晶多晶硅。多晶硅具有高迁移率(例如,高于100cm2/Vs)、低能耗和优异的可靠性,因此可被应用于驱动元件中使用的选通驱动器和/或复用器(MUX)或者被应用于OLED显示器100的各个像素的驱动TFT。
由于氧化物半导体具有低截止电流,所以氧化物半导体适合于具有短导通时间和长截止时间的开关TFT。另外,因为氧化物半导体由于低截止电流而增加了像素的电压保持时间,所以氧化物半导体适合于需要慢驱动和/或低功耗的显示装置。另外,半导体层120包括漏区和源区(各自包括p型杂质或n型杂质)。除了漏区和源区以外,半导体层120还包括沟道区。
另外,栅极绝缘层125被设置在半导体层120上,并且可以是氧化硅(SiOx)层、氮化硅(SiNx)层或其多层。栅极130被设置在栅极绝缘层125上半导体层120的预定部分中(即,当杂质被注入时与沟道区对应的位置处)。栅极130由钼(Mo)、铝(Al)、铬(Cr)、金(Au)、钛(Ti)、镍(Ni)、钕(Nd)和铜(Cu)中的一种或其组合形成。另外,栅极130可以是由钼(Mo)、铝(Al)、铬(Cr)、金(Au)、钛(Ti)、镍(Ni)、钕(Nd)和铜(Cu)中的一种或其组合形成的多层。例如,栅极130可被形成为Mo/Al-Nd或Mo/Al的双层。
层间介电层135被设置在栅极130上,并且可以是氧化硅(SiOx)层、氮化硅(SiNx)层或其多层。还通过对层间介电层135和栅极绝缘层125中的每一个的一部分进行蚀刻来形成暴露半导体层120的一部分的接触孔137和138。在这种情况下,半导体层120的通过接触孔137和138暴露的部分可以为源区和漏区。
源极140和漏极145还通过穿过层间介电层135和栅极绝缘层125的接触孔137和138电连接至半导体层120。源极140和漏极145中的每一个可形成为单层或多层。当源极140和漏极145中的每一个形成为单层时,源极140和漏极145中的每一个可由钼(Mo)、铝(Al)、铬(Cr)、金(Au)、钛(Ti)、镍(Ni)、钕(Nd)和铜(Cu)中的一种或其组合形成。当源极140和漏极145中的每一个形成为多层时,源极140和漏极145中的每一个可形成为Mo/Al-Nd的双层或者Ti/Al/Ti、Mo/Al/Mo或Mo/Al-Nd/Mo的三层。因此,形成包括半导体层120、栅极130、源极140和漏极145的薄膜晶体管TFT。
另外,钝化层136被设置在包括薄膜晶体管TFT的基板110上。钝化层136是保护钝化层136下面的薄膜晶体管TFT的保护层,并且可以是氧化硅(SiOx)层、氮化硅(SiNx)层或其多层。还在钝化层136上设置平坦化层150以用于减小下面的结构的高度差。平坦化层150可由诸如聚酰亚胺、基于苯并环丁烯的树脂和丙烯酸酯的有机材料形成,并且通过旋涂玻璃(SOG)方法来涂布液态的有机材料然后使有机材料固化来形成。如所示,平坦化层150包括暴露薄膜晶体管TFT的漏极145的通孔155。
还在平坦化层150上设置第一电极160。第一电极160是阳极并且可由诸如铟锡氧化物(ITO)、铟锌氧化物(IZO)和氧化锌(ZnO)的透明导电材料形成。当第一电极160是反射电极时,第一电极160还包括反射层。该反射层可由铝(Al)、铜(Cu)、银(Ag)、镍(Ni),Pd(钯)或其组合形成。优选地,反射层可由Ag/Pd/Cu(APC)合金形成。因此,第一电极160填充通孔155并且可连接至薄膜晶体管TFT的源极145。
另外,堤层165被设置在包括第一电极160的基板110上。堤层165是暴露第一电极160的一部分以限定像素的像素限定层。堤层165可由诸如聚酰亚胺、基于苯并环丁烯的树脂和丙烯酸酯的有机材料形成。如所示,堤层165包括暴露第一电极160的开口167。
有机发光层170被设置在通过堤层165的开口167暴露的第一电极160上。有机发光层170是电子和空穴复合并发射光的层。空穴注入层或空穴传输层可被设置在有机发光层170和第一电极160之间,电子注入层或电子传输层可被设置在有机发光层170上。
另外,第二电极180被设置在形成有有机发光层170的基板110上。第二电极180被设置在显示部分DP的整个表面上。另外,第二电极180是阴极电极并且可由各自具有低功函数的镁(Mg)、钙(Ca)、铝(Al)、银(Ag)或其组合形成。当第二电极180是透射电极时,第二电极180足够薄以透射光,当第二电极180是反射电极时,第二电极180足够厚以反射光。然而,OLED显示器具有可能在制造显示面板时生成的驱动不良或者短路的问题。
<第一实施方式>
图7是示出根据本发明的第一实施方式的OLED显示器的一部分的平面图,图8是示意性地示出图7所示的线路的一部分的平面图,图9是沿着图8的线I-I’截取的横截面图。
参照图7和图8,从显示部分DP延伸的第一初始化电力线INIT1以及连接至焊盘部分60的第二初始化电力线INIT2被设置在基板110上。另外,高电位电力线VDD被设置在第一初始化电力线INIT1和第二初始化电力线INIT2之间并且连接至焊盘部分60。低电位电力线GND被设置在高电位电力线VDD的一侧并且连接至焊盘部分60。
如所示,第一初始化电力线INIT1和第二初始化电力线INIT2通过设置在第一初始化电力线INIT1和第二初始化电力线INIT2上的连接图案ALP彼此连接。具体地讲,第一初始化电力线INIT1通过第一接触孔CH1连接至连接图案ALP,第二初始化电力线INIT2通过第二接触孔CH2连接至连接图案ALP。
连接图案ALP由与充当子像素的阳极的第一电极相同的透明导电材料形成。连接图案ALP包括平行于第一初始化电力线INIT1的水平部分HP和垂直于第一初始化电力线INIT1的垂直部分VP。如所示,连接图案ALP的水平部分HP还与第一初始化电力线INIT1交叠并且连接至第一初始化电力线INIT1。连接图案ALP的垂直部分VP跳跃过高电位电力线VDD并且连接至第二初始化电力线INIT2。
另外,连接图案ALP被绝缘层INL围绕。即,绝缘层INL被设置为围绕连接图案ALP。更具体地讲,绝缘层INL围绕连接图案ALP的水平部分HP,不围绕连接图案ALP的垂直部分VP。由于绝缘层INL由与图6所示的子像素SP的平坦化层相同的材料形成并且连接图案ALP的垂直部分VP与焊盘部分60相邻,所以在垂直部分VP周围不形成绝缘层INL。然而,本发明的实施方式不限于此。例如,绝缘层INL可被设置为围绕连接图案ALP的垂直部分VP。
图9示出跳跃部分JP的横截面结构,参照图9,绝缘层INL被设置在钝化层136上。绝缘层INL被设计为具有倾斜部分SLP。连接图案ALP被设置在绝缘层INL和钝化层136上。更具体地讲,连接图案ALP从绝缘层INL的上表面沿着绝缘层INL的倾斜部分SLP形成在钝化层136上。在本文所公开的实施方式中,连接图案ALP由与充当阳极的第一电极相同的透明导电材料(例如,ITO)形成。在这种情况下,发生在对连接图案ALP进行构图之后在连接图案ALP的蚀刻部分中部分地留下ITO的残留物缺陷。因此,本发明的实施方式在连接图案ALP的边缘处形成具有倾斜部分SLP的绝缘层INL。
当连接图案ALP的边缘(即,稍后被蚀刻并去除的部分)被设置在绝缘层INL上时,连接图案ALP的构图部分被设置在提高的位置处。因此,在对连接图案ALP进行构图的工艺中连接图案ALP的上部的暴露量增加,并且对连接图案ALP应用的蚀刻剂的量增加。结果,可防止连接图案ALP的残留物缺陷。
在本发明的实施方式中,当绝缘层INL的面积增大或者绝缘层INL的倾斜部分SLP的倾斜角度增大时,无疑可进一步防止连接图案ALP的残留物缺陷。然而,由于与绝缘层INL相邻的其它组件,绝缘层INL的面积不可能无限地增大。因此,可适当地调节绝缘层INL的面积和倾斜角度。还在形成在基板110上的连接图案ALP上设置堤层165,并且在堤层165上设置充当阴极的第二电极180。
如上所述,根据本发明的第一实施方式的OLED显示器在跳跃部分JP中形成连接第一初始化电力线INIT1和第二初始化电力线INIT2的连接图案ALP并且在连接图案ALP的边缘处形成绝缘层INL,从而防止连接图案ALP的残留物。
接下来,图10和图11是示出在显示装置的跳跃部分中发生短路的横截面图。参照图10和图11,在连接图案ALP上通过厚厚地涂布有机材料然后对有机材料进行曝光和焙烧来形成堤层165。由于绝缘层INL的高度,与绝缘层INL对应的堤层165更多地曝露于UV光。因此,由于在后续的焙烧工艺中绝缘层INL的体积减小,所以连接图案ALP可能暴露。如果连接图案ALP暴露,则可能由于形成在堤层165上的第二电极180与连接图案ALP之间的接触而发生短路。
以下,根据本发明的第二实施方式,描述了一种防止在跳跃部分中生成的短路的显示装置。
<第二实施方式>
图12是示出根据本发明的第二实施方式的显示装置的一部分的平面图,图13是示意性地示出图12所示的线路的一部分的平面图,图14是沿着图13的线II-II’截取的横截面图,图15是示出图14的另一实施方式的横截面图。在第二实施方式中,与第一实施方式中描述的结构和组件相同或等同的结构和组件利用相同的标号来指代,并且进一步的描述可简要地进行或者可被完全省略。
参照图12和图13,从显示部分DP延伸的第一初始化电力线INIT1和连接至焊盘部分60的第二初始化电力线INIT2被设置在基板110上。高电位电力线VDD被设置在第一初始化电力线INIT1和第二初始化电力线INIT2之间并且连接至焊盘部分60。另外,低电位电力线GND被设置在高电位电力线VDD的一侧并且连接至焊盘60。第一初始化电力线INIT1和第二初始化电力线INIT2通过设置在第一初始化电力线INIT1和第二初始化电力线INIT2上的连接图案ALP来彼此连接。
连接图案ALP被绝缘层INL围绕。即,绝缘层INL被设置为围绕连接图案ALP。根据本发明的第二实施方式的绝缘层INL在围绕连接图案ALP的同时与连接图案ALP间隔开。在本发明的第一实施方式中,从绝缘层INL的上表面设置连接图案ALP,但是绝缘层INL的上表面上的连接图案ALP可由于堤层而暴露。另一方面,在本发明的第二实施方式中,连接图案ALP与绝缘层INL间隔开并且不被暴露。
按照与本发明的第一实施方式相同的方式,绝缘层INL围绕连接图案ALP的水平部分HP,不围绕连接图案ALP的垂直部分VP。由于绝缘层INL由与图6所示的子像素SP的平坦化层相同的材料形成并且连接图案ALP的垂直部分VP与焊盘部分相邻,所以在垂直部分VP周围不形成绝缘层INL。然而,本发明的实施方式不限于此。例如,绝缘层INL可被设置为围绕连接图案ALP的垂直部分VP。因此,绝缘层INL形成为围绕连接图案ALP的岛图案(更具体地讲,除了连接图案ALP的垂直部分VP之外围绕水平部分HP的岛图案)。
图14示出跳跃部分JP的横截面结构,参照图14,钝化层136被设置在第一初始化电力线INIT1上,绝缘层INL和连接图案ALP被设置在钝化层136上。
连接图案ALP穿过钝化层136并且连接至第一初始化电力线INIT1。绝缘层INL被配置为具有倾斜部分SLP以使得在对连接图案ALP进行构图之后连接图案ALP不会遗留。另外,连接图案ALP被设置在钝化层136上并且与绝缘层INL间隔开。
在本文所公开的实施方式中,连接图案ALP由与充当阳极的第一电极相同的透明导电材料(例如,ITO)形成。在这种情况下,发生在对连接图案ALP进行构图之后在连接图案ALP的蚀刻部分中部分地留下ITO的残留物缺陷。因此,本发明的实施方式被配置为使得被蚀刻然后被去除的连接图案ALP的边缘被设置在绝缘层INL的倾斜部分SLP上。
当被蚀刻然后被去除的连接图案ALP的边缘被设置在绝缘层INL上时,连接图案ALP的构图部分被设置在提高的位置处。因此,在对连接图案ALP进行构图的工艺中连接图案ALP的上部的暴露量增加,并且对连接图案ALP应用的蚀刻剂的量增加。结果,可防止连接图案ALP的残留物缺陷。
另外,连接图案ALP通过上述构图工艺与绝缘层INL间隔开预定距离。当连接图案ALP与绝缘层INL间隔开时,设置在连接图案ALP的形成区域中的堤层165可具有均匀的厚度。因此,可防止连接图案ALP暴露于堤层165之外。
所述预定距离不受具体限制,可具有任何值,只要连接图案ALP不会由于堤层165而暴露即可。因此,如图15所示,根据本发明的第二实施方式的连接图案ALP的一部分可被设置在绝缘层INL上。在形成在基板上的连接图案ALP上设置堤层165,并且在堤层165上设置充当阴极的第二电极180。
如上所述,根据本发明的第二实施方式的显示装置在跳跃部分JP中形成连接第一初始化电力线INIT1和第二初始化电力线INIT2的连接图案ALP,并且形成与连接图案ALP相邻设置的绝缘层INL,从而防止连接图案ALP的残留物。
另外,本发明的实施方式被配置为使得形成在第一初始化电力线和第二初始化电力线的跳跃部分中的连接图案与绝缘层间隔开,从而防止当连接图案向上暴露于堤层时发生的连接图案与第二电极之间的短路。
尽管参照其多个例示性实施方式描述了实施方式,应该理解,本领域技术人员可以想到许多其它修改和实施方式,其将落入本公开的原理的范围内。更具体地讲,在本公开、附图和所附权利要求书的范围内,可在组成部件和/或主题组合布置方式方面进行各种变化和修改。除了在组成部件和/或布置方式方面的变化和修改以外,对于本领域技术人员而言替代使用也将是显而易见的。
Claims (19)
1.一种显示装置,该显示装置包括:
基板;
设置在所述基板上的显示部分以及设置在所述显示部分之外的焊盘部分;
设置在所述显示部分与所述焊盘部分之间的跳跃部分;
设置在所述基板上的至少两条电力线;
在所述跳跃部分中将所述至少两条电力线彼此连接的连接图案;以及
与所述连接图案间隔开并且围绕所述连接图案的绝缘层,
其中,所述绝缘层围绕所述连接图案的除了所述连接图案的垂直部分之外的水平部分。
2.根据权利要求1所述的显示装置,其中,所述至少两条电力线包括从所述显示部分延伸的第一初始化电力线以及连接至所述焊盘部分的第二初始化电力线。
3.根据权利要求2所述的显示装置,其中,所述连接图案包括平行于所述第一初始化电力线的所述水平部分以及垂直于所述第一初始化电力线的所述垂直部分。
4.根据权利要求2所述的显示装置,其中,高电位电力线被设置在所述第一初始化电力线和所述第二初始化电力线之间。
5.根据权利要求4所述的显示装置,其中,所述连接图案跳跃过所述高电位电力线并且将所述第一初始化电力线连接至所述第二初始化电力线。
6.根据权利要求4所述的显示装置,其中,所述绝缘层与所述高电位电力线部分地交叠。
7.根据权利要求1所述的显示装置,其中,所述绝缘层包括倾斜部分并且被形成为围绕所述连接图案的岛图案。
8.根据权利要求1所述的显示装置,其中,所述至少两条电力线被设置在所述基板上,
其中,钝化层被设置在所述至少两条电力线上,并且
其中,所述绝缘层和所述连接图案被设置在所述钝化层上。
9.根据权利要求8所述的显示装置,其中,所述连接图案穿过所述钝化层并且连接至所述至少两条电力线中的每一条。
10.一种显示装置,该显示装置包括:
在基板上的显示部分;
在所述基板上设置所述显示部分之外的焊盘部分;
从所述显示部分延伸的第一初始化电力线;
连接至所述焊盘部分的第二初始化电力线;
设置在所述第一初始化电力线和所述第二初始化电力线之间的高电位电力线;
设置在所述高电位电力线的一侧并且连接至所述焊盘部分的低电位电力线;
设置在所述显示部分和所述焊盘部分之间的跳跃部分;
在所述跳跃部分中将所述第一初始化电力线和所述第二初始化电力线彼此连接的连接图案;以及
围绕所述连接图案的水平部分并且不围绕所述连接图案的垂直部分的绝缘层。
11.根据权利要求10所述的显示装置,其中,所述连接图案包括平行于所述第一初始化电力线的所述水平部分以及垂直于所述第一初始化电力线的所述垂直部分。
12.根据权利要求11所述的显示装置,其中,所述绝缘层与所述连接图案间隔开预定距离。
13.根据权利要求10所述的显示装置,其中,所述连接图案跳跃过所述高电位电力线并且将所述第一初始化电力线连接至所述第二初始化电力线。
14.根据权利要求10所述的显示装置,其中,所述绝缘层包括倾斜部分并且被形成为围绕所述连接图案的岛图案。
15.根据权利要求10所述的显示装置,其中,所述连接图案包括透明导电材料。
16.根据权利要求10所述的显示装置,其中,所述绝缘层包括有机材料,所述有机材料包括聚酰亚胺、基于苯并环丁烯的树脂和丙烯酸酯中的至少一种。
17.根据权利要求10所述的显示装置,其中,所述第一初始化电力线和所述第二初始化电力线由透明导电材料形成。
18.根据权利要求10所述的显示装置,其中,所述连接图案包括与充当子像素的阳极的第一电极相同的透明导电材料。
19.一种制造显示装置的方法,该方法包括以下步骤:
在基板上提供显示部分;
在所述基板上提供设置在所述显示部分之外的焊盘部分;
形成从所述显示部分延伸的第一初始化电力线;
形成连接至所述焊盘部分的第二初始化电力线;
形成设置在所述第一初始化电力线和所述第二初始化电力线之间的高电位电力线;
形成设置在所述高电位电力线的一侧并且连接至所述焊盘部分的低电位电力线;
提供设置在所述显示部分和所述焊盘部分之间的跳跃部分;
在所述跳跃部分中形成将所述第一初始化电力线和所述第二初始化电力线彼此连接的连接图案;以及
形成围绕所述连接图案的水平部分并且不围绕所述连接图案的垂直部分的绝缘层。
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CN108735777B (zh) * | 2017-04-21 | 2020-11-06 | 群创光电股份有限公司 | 显示装置 |
CN108878537B (zh) * | 2017-05-12 | 2021-02-12 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制备方法、显示面板和显示装置 |
KR20190010052A (ko) * | 2017-07-20 | 2019-01-30 | 엘지전자 주식회사 | 디스플레이 디바이스 |
KR102486549B1 (ko) * | 2017-09-26 | 2023-01-10 | 삼성전자주식회사 | 배선의 부식을 방지하기 위한 디스플레이 장치 및 이를 포함하는 전자 장치 |
JP7086582B2 (ja) * | 2017-12-11 | 2022-06-20 | 株式会社ジャパンディスプレイ | 表示装置 |
KR102571661B1 (ko) * | 2018-11-09 | 2023-08-28 | 엘지디스플레이 주식회사 | 표시패널 및 표시장치 |
US11950466B2 (en) * | 2020-08-31 | 2024-04-02 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate, method of manufacturing the same, and display apparatus |
US11997897B2 (en) * | 2021-02-10 | 2024-05-28 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate including connection line and power line surrounding display area, preparation method thereof, and display device |
US11798487B2 (en) | 2021-03-01 | 2023-10-24 | Hefei Boe Joint Technology Co., Ltd. | Display panel and display device |
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CN102819995A (zh) * | 2011-06-10 | 2012-12-12 | 乐金显示有限公司 | 平板显示装置及其制造方法 |
CN103811519A (zh) * | 2012-11-01 | 2014-05-21 | 乐金显示有限公司 | 有机发光显示设备 |
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JP4306623B2 (ja) * | 2005-02-25 | 2009-08-05 | セイコーエプソン株式会社 | 表示パネル、表示装置、および移動体の表示モジュール |
KR101330421B1 (ko) * | 2009-12-08 | 2013-11-15 | 엘지디스플레이 주식회사 | 게이트 인 패널 구조의 액정표시장치 |
KR101664182B1 (ko) * | 2010-04-27 | 2016-10-10 | 엘지디스플레이 주식회사 | 유기전계발광소자 |
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JP6920785B2 (ja) * | 2015-08-19 | 2021-08-18 | 株式会社ジャパンディスプレイ | 表示装置 |
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CN102819995A (zh) * | 2011-06-10 | 2012-12-12 | 乐金显示有限公司 | 平板显示装置及其制造方法 |
CN103811519A (zh) * | 2012-11-01 | 2014-05-21 | 乐金显示有限公司 | 有机发光显示设备 |
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US20170062546A1 (en) | 2017-03-02 |
KR20170026969A (ko) | 2017-03-09 |
US9899463B2 (en) | 2018-02-20 |
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CN106486524A (zh) | 2017-03-08 |
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