CN106233430B - 碳化硅外延晶片及其制造方法 - Google Patents

碳化硅外延晶片及其制造方法 Download PDF

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CN106233430B
CN106233430B CN201580020267.XA CN201580020267A CN106233430B CN 106233430 B CN106233430 B CN 106233430B CN 201580020267 A CN201580020267 A CN 201580020267A CN 106233430 B CN106233430 B CN 106233430B
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silicon carbide
epitaxy chip
carbide epitaxy
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升本恵子
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National Institute of Advanced Industrial Science and Technology AIST
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Abstract

本发明的课题在于提供一种碳化硅外延晶片，其对于低偏离角的碳化硅外延晶片，即使在高C/Si比下的生长中也会抑制异质多型的混入，并且能够形成可靠性高的高耐压碳化硅半导体元件。本发明的外延晶片，其特征在于，其是在具有α型的晶体结构且使(0001)Si面或(000－1)C面倾斜大于0°且不足4°的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在碳化硅基板表面，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。

Description

碳化硅外延晶片及其制造方法
技术领域
本发明涉及在碳化硅基板与碳化硅外延生长层的界面具有凹凸结构、且外延生长层的表面平坦的碳化硅外延晶片。
背景技术
功率半导体元件会降低电力转换时的能量损失，可以期待节能化。迄今为止，功率半导体元件通过使用硅(Si)半导体而使性能得到提高，但是，Si半导体元件因Si的物性极限而处于未预见到能够提高其以上的性能的状况。
另一方面，碳化硅(SiC)具有与Si相比而绝缘击穿电场强度为约10倍且禁带宽度和导热率为约3倍的优异物性，能够期待功率半导体元件的进一步的性能提高，需要快速普及使用其的SiC半导体。
在SiC中存在很多的多型，但是，作为电力转换用下一代半导体元件而备受期待的SiC半导体元件用SiC基板，通常使用具有4H型的多型的SiC基板。另外，从使用台阶控制外延技术的观点出发，具有偏离角的4H－SiC基板成为主流。若能够在偏离角不足4°、尤其1°以下的低偏离角的SiC基板上有效地形成外延生长层，则可以降低SiC半导体元件的制造成本、抑制SiC半导体元件特性的各向异性，与之相伴随而期待被广泛地有效利用到社会中。
对于SiC基板，通常在从SiC锭进行切出时，由(0001)Si面或(000－1)C面赋予规定的偏离角。切出的SiC基板经过研磨等表面加工后，以在基板表面上形成有外延生长层的外延晶片的状态被使用。
在此，若在外延生长层中混入异质多型或载流子捕获中心变多，则在其上所制作的半导体元件的性能、可靠性降低。另外，若取入到外延生长层中的杂质氮较多，则只能在该杂质氮浓度以上的范围进行浓度控制，因此氮浓度的控制范围变窄，难以在其上制作高耐压的半导体元件。为了制作可靠性高、高耐压的半导体元件，抑制外延生长层的异质多型的混入、载流子捕获中心的发生及杂质氮的取入是必不可少的。
但是，已知：SiC基板的偏离角越小，在外延生长层越容易混入异质多型，作为能够抑制异质多型的混入的偏离角，目前，偏离角为4°的基板成为主流。据报道：当在偏离角不足4°、尤其1°以下的基板上形成外延生长层时，为了抑制异质多型的混入，需要引入碳原子与硅原子的原子数比(C/Si比)低的原料气体(参照专利文献1、非专利文献1)。
然而，若以低C/Si比形成外延生长层，则存在源自碳空穴的载流子捕获中心及杂质氮的取入增加的课题(参照非专利文献2、非专利文献3)。
现有技术文献
专利文献
专利文献1：日本特开2008－260650号公报
非专利文献
非专利文献1:ECS Journal of Solid State Science and Technology,Vol.2,pp.N3012－N3017,6June 2013
非专利文献2:Journal of Applied Physics,Vol.101,pp.053709－1－053709－4,9March 2007
非专利文献3:Materials Science and Engineering:R,Vol.20,pp.125－166,5November 1996
发明内容
发明要解决的技术问题
本发明的课题在于解决以往的上述诸多问题而达成以下的目的。即，本发明的目的在于提供一种碳化硅外延晶片，其对于低偏离角的碳化硅外延晶片，即使在高C/Si比下的生长中也能够抑制异质多型的混入，并且能够形成可靠性高的高耐压碳化硅半导体元件。
为了解决上述课题，本发明人进行了深入研究，结果得到以下见解：通过使生长前的碳化硅基板上产生台阶聚束，从而即使在高C/Si比下的生长中也能抑制异质多型的混入。通常，具有上述偏离角的4H－SiC基板具有台阶平台结构，所述台阶平台结构包含具有c轴方向的1晶胞的长度即1nm的高度的台阶和平坦的平台，台阶聚束是指多个该高度1nm的台阶统合后的状态。
用于解决技术问题的手段
本发明基于上述见解而完成，作为用于解决上述课题的手段，如以下所示。
(1)一种碳化硅外延晶片，其特征在于，其是在具有α型的晶体结构且使(0001)Si面倾斜大于0°且1°以下的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在同上述碳化硅基板表面与上述外延生长层的界面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
(2)一种碳化硅外延晶片，其特征在于，其是在具有α型的晶体结构且使(0001)Si面或(000－1)C面倾斜大于0°且不足4°的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在同上述碳化硅基板表面与上述外延生长层的界面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
(3)根据上述(1)或(2)所述的碳化硅外延晶片，其特征在于，外延生长层的表面粗糙度为大于0且0.1nm以下。
(4)根据上述(1)～(3)中任一项所述的外延晶片，其特征在于，异质多型的密度为大于0且0.2个/cm2以下。
(5)一种碳化硅外延晶片的制造方法，其特征在于，其具有：
准备具有α型的晶体结构且使(0001)Si面或(000－1)C面倾斜大于0°且不足4°的碳化硅基板的工序；
对在氢气氛下加热到规定温度的上述碳化硅基板的表面进行大致40分钟以上氢蚀刻而构成台阶聚束的工序；
在C/Si比为2以上的条件下，在构成了上述台阶聚束的碳化硅基板表面上制作碳化硅外延生长层的工序；以及
对上述制作成的外延生长层表面实施化学机械研磨而使该表面平坦化，从而制作碳化硅外延晶片的工序。
(6)根据(5)所述的碳化硅外延晶片的制造方法，其特征在于，上述规定的温度为1500℃～1800℃。
(7)根据(5)或(6)所述的碳化硅外延晶片的制造方法，其特征在于，在上述制作成的碳化硅外延晶片中，在同上述碳化硅基板表面与上述外延生长层的界面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
发明效果
根据本发明，可以解决现有技术中的上述诸多问题，并且可以提供一种下述碳化硅外延晶片，其对于低偏离角的碳化硅基板，即使在高C/Si比下的生长中也会抑制异质多型的混入，并且能够形成可靠性高的高耐压碳化硅半导体元件。
附图说明
图1为本发明的工艺的说明图。
图2为表示实施例1中制作的外延晶片的AFM图像和截面轮廓的图。
图3为表示基于实施例1的氢蚀刻工序的条件制作的观察用基板的AFM图像和与台阶平台正交的截面轮廓的图。
图4为表示基于比较例1的氢蚀刻工序的条件制作的观察用基板的AFM图像和与台阶平台正交的截面轮廓的图。
图5为表示通过发生上述台阶聚束的场所的AFM测定而得到的与台阶平台正交的截面轮廓的图。
图6为表示实施例1、2及比较例1～3涉及的碳化硅基板表面的上述台阶聚束所占的比例与由3C混入所致的层叠缺陷密度的关系的图表的图。
具体实施方式
(碳化硅外延晶片)
本发明的碳化硅外延晶片，其特征在于，其是在具有α型的晶体结构且使(0001)Si面或(000－1)C面倾斜大于0°且不足4°的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在碳化硅基板表面，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
本发明的工艺的说明图如图1所示。对上述碳化硅基板进行氢蚀刻，使其发生台阶聚束后，在高C/Si比的条件下形成外延生长层。在形成外延生长层后，使用化学机械研磨或干蚀刻而使外延生长层的表面平坦化。
作为在上述碳化硅基板是否发生台阶聚束的测定，可以通过切割上述碳化硅外延晶片并在SEM(Scanning Electron Microscopy)截面测定或TEM(Transmission Electronmicroscopy)截面测定中观察上述碳化硅基板与上述外延生长层的界面来进行。上述碳化硅基板和上述外延生长层因所含的杂质的种类和浓度的不同而使得在SEM测定或TEM测定中的对比度不同，因此可以鉴定上述界面。其结果可以观察上述碳化硅基板表面的形状。
实施例1
作为具有α型的晶体结构的碳化硅基板，准备了具代表性的具有4H的晶体结构的碳化硅基板。该碳化硅基板具有使(0001)Si面向＜11－20＞方向倾斜0.9°的基板表面。
将该碳化硅基板设置在热壁CVD装置的反应炉内，按照以下方式制造了实施例1涉及的碳化硅外延晶片。
＜氢蚀刻工序＞
在以100slm的流量向反应炉内引入氢气的状态下，将反应炉内的压力保持在6kPa，利用高频感应加热，将上述碳化硅基板加热到1725°。将在该状态下的氢蚀刻进行40分钟，使上述碳化硅基板表面发生台阶聚束。
作为上述氢蚀刻工序中的温度条件，并无特别限制，可以根据目的进行适当选择，但优选1500℃～1800℃。若上述温度条件不足1500℃，则上述氢蚀刻工序所需的时间变长，有时导致制造成本增加，若上述温度条件超过1800℃，则有时难以确保碳化硅外延晶片制造装置的耐热性。
＜外延生长形成工序＞
接下来，向反应炉内以50sccm的流量引入硅烷并以33sccm的流量引入丙烷，在C/Si比为2的条件下，在上述碳化硅基板的基板表面上形成厚度10μm的外延生长层。
＜外延晶片表面平坦化工序＞
对制造成的外延晶片的表面实施化学机械研磨，使表面平坦化。
根据以上步骤，制作实施例1涉及的碳化硅外延晶片。
对实施例1中制作的外延晶片进行AFM(Atomic Force Microscope)测定。
图2中示出实施例1中制作的外延晶片的AFM图像和与台阶平台正交的截面轮廓。表面粗糙度为0.08nm。
(比较例1)
另外，在实施例1的氢蚀刻工序中，将蚀刻时间从40分钟变更为0分钟，除此以外，同样地制造了比较例1涉及的碳化硅外延晶片。
＜异质多型的混入密度的计算＞
基于PL(Photoluminescence)测定进行发光光谱的测定，对显示除源自4H－SiC的带端的发光及源自上述碳化硅基板的杂质的发光以外的发光的缺陷进行计数，由此计算出异质多型的混入密度。其结果为：在实施例1制作的外延晶片中，由显示3C体(bulk)的发光的3C混入所致的层叠缺陷密度为0.2个/cm2，并且不存在其他的层叠缺陷。与此相对，在比较例1制作的外延晶片中，由3C混入所致的层叠缺陷密度为3.1个/cm2，并且不存在其他层叠缺陷。
＜测定＞
在与实施例1及比较例1的氢蚀刻工序相同的条件下实施氢蚀刻工序，制作成观察用基板。
对基于实施例1及比较例1的氢蚀刻工序的条件制作的观察用基板进行了AFM测定。
在图3及图4中示出基于实施例1及比较例1的氢蚀刻工序的条件制作的观察用基板的AFM图像和截面轮廓。
在图5中示出通过发生上述台阶聚束的场所的AFM测定而得到的截面轮廓。为了容易获知台阶的统合数，而与横轴平行地表示(0001)Si面。如图5所示可知：在上述碳化硅基板表面发生5个以上且10个以下的高度1nm的台阶统合成的台阶聚束。
＜碳化硅基板表面中的上述台阶聚束所占的比例的计算＞
在与基板表面的标高－10nm(利用氢蚀刻形成的凹凸的最低标高)～基板表面的标高+10nm(利用氢蚀刻形成的凹凸的最高标高)的台阶平台的正交截面中，在与蚀刻界面平行的矩形10μm×10μm的范围的AFM测定图像中任意选取3个部位，存在上述台阶聚束的面积除以全部测定面积，由此求得在碳化硅基板表面中的上述台阶聚束所占的比例。
如图3所示可知：在基于实施例1的氢蚀刻工序的条件制作的观察用基板表面附近，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例较高。若利用上述方法进行计算，则碳化硅基板表面中的上述台阶聚束所占的比例为93％。与此相对，基于比较例1的氢蚀刻工序的条件制作的观察用基板表面的上述比例为44％。另外，将存在高度不足5nm的台阶聚束的情况排除在外的面积为：在与台阶平台的正交截面轮廓中，台阶高度不足5nm的宽度乘以截面轮廓的深度即10μm而得的值。
本实施例使(0001)Si面的＜11－20＞方向的倾斜角为0.9度，但是在倾斜角更小的情况下，容易发生台阶聚束，因此即使蚀刻时间比实施例短，也能得到同样的结果。在倾斜角更大的情况下，不易发生台阶聚束，但是，通过将蚀刻时间调整为比实施例更长，从而可以得到同样的结果。
实施例2
(实施例2、比较例2、3)
除了按照下述表1所示那样变更实施例1的氢蚀刻工序中的氢蚀刻温度及氢蚀刻时间以外，与实施例1同样地制造实施例2及比较例2、3涉及的碳化硅外延晶片。
另外，将与实施例1同样地进行了测定的、碳化硅基板表面的上述台阶聚束所占的比例及由3C混入所致的层叠缺陷密度一并示于下述表1中。
表1
如以上的表1所示，当在碳化硅基板表面的上述台阶聚束所占的比例为90％以上的条件下实施氢蚀刻工序时，可以使由3C混入所致的层叠缺陷密度为0.2个/cm2以下。
另一方面，当在碳化硅基板表面的上述台阶聚束所占的比例不足90％的条件下实施氢蚀刻工序时，由3C混入所致的层叠缺陷密度显示出远远超过0.2个/cm2的数值。
在此，对碳化硅基板表面的上述台阶聚束所占的比例与由3C混入所致的层叠缺陷密度的关系进行说明。图6中示出实施例1、2及比较例1～3涉及的各碳化硅外延晶片中碳化硅基板表面的上述台阶聚束所占的比例与由3C混入所致的层叠缺陷密度的关系的图表。为了将由3C混入所致的层叠缺陷密度抑制在0.2个/cm2以下，确认到需要使碳化硅素基板表面的上述台阶聚束所占的比例为90％以上。

Claims (13)

1.一种碳化硅外延晶片，其特征在于，
其是在具有α型的晶体结构以及从(0001)Si面倾斜大于0°且1°以下的偏离角的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在同所述碳化硅基板与外延生长层的界面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
2.一种碳化硅外延晶片，其特征在于，
其是在具有α型的晶体结构以及从(0001)Si面或(000－1)C面倾斜大于0°且不足4°的偏离角的碳化硅基板上配设有外延生长层的碳化硅外延晶片，在与碳化硅基板表面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
3.根据权利要求1所述的碳化硅外延晶片，其特征在于，
外延生长层的表面粗糙度为大于0且0.1nm以下。
4.根据权利要求1所述的碳化硅外延晶片，其特征在于，
异质多型的密度为大于0且0.2个/cm2以下。
5.一种碳化硅外延晶片的制造方法，其具有：
准备具有α型的晶体结构以及从(0001)Si面或(000－1)C面倾斜大于0°且不足4°的偏离角的碳化硅基板的工序；
在所述碳化硅基板的表面形成台阶聚束的工序；
在C/Si比为2以上的条件下，在形成了所述台阶聚束的碳化硅基板表面上制作碳化硅外延生长层的工序；以及
对所述制作成的外延生长层表面实施化学机械研磨而使该表面平坦化，从而制作碳化硅外延晶片的工序；
在所述制作成的碳化硅外延晶片中，在同所述碳化硅基板与所述外延生长层的界面附近的台阶平台正交的截面中，5个以上且10个以下的高度1nm的台阶统合成的台阶聚束所占的比例为90％以上。
6.根据权利要求5所述的碳化硅外延晶片的制造方法，其特征在于，
对在氢气氛下加热到规定温度的所述碳化硅基板的表面进行40分钟以上的氢蚀刻而形成所述台阶聚束。
7.根据权利要求6所述的碳化硅外延晶片的制造方法，其特征在于，
所述规定的温度为1500℃～1800℃。
8.根据权利要求2所述的碳化硅外延晶片，其特征在于，
外延生长层的表面粗糙度为大于0且0.1nm以下。
9.根据权利要求2所述的碳化硅外延晶片，其特征在于，
异质多型的密度为大于0且0.2个/cm2以下。
10.根据权利要求8所述的碳化硅外延晶片，其特征在于，
异质多型的密度为大于0且0.2个/cm2以下。
11.根据权利要求3所述的碳化硅外延晶片，其特征在于，
异质多型的密度为大于0且0.2个/cm2以下。
12.根据权利要求2所述的碳化硅外延晶片，其特征在于，
所述碳化硅基板的所述偏离角是自(0001)Si面为大于0°且为1°以下的角度。
13.根据权利要求5所述的碳化硅外延晶片的制造方法，其特征在于，
所述碳化硅基板的所述偏离角是自(0001)Si面为大于0°且为1°以下的角度。
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