CN106206482A - 封装结构及其形成方法 - Google Patents

封装结构及其形成方法 Download PDF

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Publication number
CN106206482A
CN106206482A CN201610319638.0A CN201610319638A CN106206482A CN 106206482 A CN106206482 A CN 106206482A CN 201610319638 A CN201610319638 A CN 201610319638A CN 106206482 A CN106206482 A CN 106206482A
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CN
China
Prior art keywords
tube core
supporter
sealant
encapsulating structure
connector
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Pending
Application number
CN201610319638.0A
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English (en)
Inventor
陈宪伟
陈威宇
谢正贤
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Application filed by Taiwan Semiconductor Manufacturing Co TSMC Ltd filed Critical Taiwan Semiconductor Manufacturing Co TSMC Ltd
Publication of CN106206482A publication Critical patent/CN106206482A/zh
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Abstract

本发明公开了封装结构及其形成方法。封装结构包括管芯、介电层、密封剂和多个支持件。管芯在其第一侧上方包括多个连接件。介电层在管芯上方形成在连接件旁边。密封剂在管芯旁边。支持件穿透介电层。支持件的研磨速率与密封剂的研磨速率基本相同但不同于介电层的研磨速率。

Description

封装结构及其形成方法
技术领域
本发明一般地涉及半导体技术领域，更具体地，涉及封装结构及其形成方法。
背景技术
近年来，半导体工业由于各种电子部件(例如，晶体管、二极管、电阻器、电容器等)的集成密度的持续改进而经历了快速发展。很大程度上，集成密度的这种改进源于最小部件尺寸的持续降低，这允许更多的部件集成到给定面积中。
这些更小的电子部件还要求比先前封装件占用更小面积的更小封装件。用于半导体的封装件的类型的实例包括方形扁平封装(QFP)、管脚栅格阵列(PGA)、球栅阵列(BGA)、倒装芯片(FC)、三维集成电路(3DIC)、晶圆级封装(WLP)和堆叠封装(PoP)器件。研磨或抛光步骤是封装制造工艺中的主要步骤之一。为了实现对研磨均匀性的更好控制，封装结构的均匀性是工业中的关注焦点。
发明内容
为了解决现有技术中所存在的缺陷，根据本发明的一方面，提供了一种封装结构，包括：管芯，包括连接件；介电层，位于所述管芯上方并且位于所述连接件旁边；密封剂，位于所述管芯旁边；以及多个支持件，在所述介电层中位于所述连接件旁边，其中，所述支持件的研磨速率与所述密封剂的研磨速率基本相同但不同于所述介电层的研磨速率。
根据本发明的另一方面，提供了一种PoP器件，包括：第一封装结构，包括：管芯，包括多个连接件；介电层，位于所述管芯上方并位于所述连接件旁边；密封剂，位于所述管芯旁边；和多个支持件，位于所述介电层中，其中所述支持件的材料与所述密封剂的材料相同；以及第二封装结构，形成为上覆所述第一封装结构。
根据本发明的又一方面，提供了一种形成封装结构的方法，包括：提供管芯，所述管芯在其第一侧上方包括多个连接件；在所述管芯的第一侧上方形成多个介电图案以覆盖所述连接件；将所述管芯放置在所述载体上方；在所述载体上方形成密封剂，所述密封剂密封所述管芯并填充所述介电图案之间的间隙；以及去除所述密封剂的一部分直到露出所述连接件的顶部，使得在所述介电图案之间的间隙中设置支持件。
附图说明
图1A至图1G是根据一些实施例的形成封装结构的方法的截面图。
图2是示出根据一些实施例的形成封装结构的方法的流程图。
图3A至图3H是根据一些实施例的形成封装结构的方法的截面图。
图4是示出根据一些实施例的形成封装结构的方法的流程图。
图5至图10是根据一些实施例的封装结构的顶视图。
图11A至图11F是根据一些实施例的形成封装结构的方法的截面图。
图12是示出根据一些实施例的形成封装结构的方法的流程图。
图13是根据一些实施例的封装结构的顶视图。
具体实施方式
以下公开内容提供了许多不同的用于实施本发明主题的不同特征的实施例或实例。为了以简化的方式传达本发明，以下描述部件或配置的具体实例以简化本发明。当然，这些仅仅是实例而不用于限制。例如，在以下的描述中，在第二部件上方或之上形成第一部件可以包括第一部件和第二部件被形成为直接接触的实施例，并且也可以包括可以在第一部件和第二部件之间形成附件部件使得第一部件和第二部分没有直接接触的实施例。此外，在本发明的各个实例中，相同的参考标号和/或字母用于指定相同或相似的部件。这些参考标号的重复使用是为了简化和清楚，其本身并不表示所讨论的各个实施例和/或结构之间的关系。
此外，可以使用空间相对术语(诸如“在…下方”、“之下”、“下部”、“上方”、“上部”等)以描述图中所示一个元件或部件与另一个元件或部件的关系。除图中所示的定向之外，空间相对术语还包括使用或操作中设备的不同定向。装置可以以其他方式定向(旋转90度或处于其他定向)，本文所使用的空间相对描述符可因此进行类似的解释。
图1A至图1G是根据一些实施例的形成封装结构的方法的截面图。
参照图1A，晶圆设置有以阵列配置的多个管芯10。每个管芯10均包括互连件102、金属线104和多个连接件106。互连件102形成在衬底100上方。衬底100例如包括但不限于掺杂或非掺杂体硅或者绝缘体上半导体(SOI)衬底的有源层。金属线104形成在互连件102上方且电连接至互连件102。划线区域101位于两个相邻的管芯10之间。
连接件106形成在部分金属线104上方且电连接至部分金属线104。在一些实施例中，连接件106形成为管芯10的顶部。连接件106从管芯10的剩余部分或下部突出。在整个描述中，管芯10具有连接件106的侧面被称为前侧或第一侧11。此外，连接件106可以是电连接件、伪连接件等。连接件106包括焊料凸块、金凸块、铜柱等。在一些实施例中，连接件106是铜凸块。术语“铜柱”是指铜凸起、铜柱、厚铜焊盘和/或含铜凸起。在整个描述中，术语“铜”用于包括基本纯的元素铜、包含不可避免的杂质的铜以及包含少量元素(诸如钽、铟、锡、锌、镁、铬、钛、锗、锶、铂、镁、铝或锆等)的铜合金。
此后，介电层108形成在管芯10的第一侧11上方，以覆盖连接件106并填充连接件106之间的间隙。在一些实施例中，介电层108包括光敏材料，诸如聚苯并恶唑(PBO)、聚酰亚胺、苯并环丁烯(BCB)、它们的组合等，其可以使用光刻掩模而容易地被图案化。在可选实施例中，介电层108包括氮化物(诸如氮化硅)、氧化物(诸如氧化硅)、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、掺硼磷硅酸盐玻璃(BPSG)、它们的组合等。介电层108可以通过适当的制造技术来形成，诸如旋涂、化学气相沉积(CVD)、等离子体增强的化学气相沉积(PECVD)等。
参照图1B，介电层108被图案化以形成多个介电图案108a以及介电图案108a之间的多个间隙108b。在一些实施例中，介电图案108a分别覆盖连接件106的顶部和侧壁，并且介电图案108a之间的间隙108b露出管芯10的第一侧11的一部分。在一些实施例中，例如通过介电图案108a密封位于管芯10的第一侧11上方的连接件106。图案化步骤包括执行光刻工艺或执行光刻和蚀刻工艺。在一些实施例中，如图1B所示，通过介电层108(或介电图案108a)覆盖相邻管芯10之间的划线区域101。在可选实施例中，介电层108的间隙108b的部分露出相邻管芯10之间的划线区域101。
在晶圆阶段中执行图1A和图1B中的步骤。在一些实施例中，在形成介电图案108a之后以及在管芯单一化工艺之前，如图1B所示，粘合层114形成在与管芯10的第一侧11相对的背侧或第二侧12上方。粘合层114包括管芯附接膜(DAF)、银膏等。
参照图1C，沿着划线区域101执行切割或单一化工艺以使管芯10相互分离。在一些实施例中，在管芯单一化工艺期间，切断管芯10的第二侧12上的粘合层114。用于沿着划线区域101分离管芯10的切割机器通常涉及利用旋转刀或激光束进行切割。换句话说，例如，切割或单一化工艺是激光切割工艺或机器切割工艺。
在执行切割或单一化工艺之后，作为图1D所示的实例，一个管芯10被放置在载体110上方。载体110设置有形成于其上的胶层111。载体110可以是空白玻璃载体、空白陶瓷载体等。胶层111可以由诸如紫外(UV)胶、光-热转换(LTHC)胶等的粘合物形成，但是也可以使用其他类型的粘合物。在一些实施例中，胶层111在光的热量下可分解，从而从形成于其上的结构释放载体110。
介电层112形成在胶层111上方。在一些实施例中，介电层112是聚合物层。例如，聚合物包括聚酰亚胺、PBO、BCB、味之素构建膜(ABF)、阻焊膜(SR)等。通过诸如旋涂、层压、沉积等的适当制造技术来形成介电层112。
在一些实施例中，与管芯10的第一侧11相对的背侧或第二侧12附接至载体110。在一些实施例中，位于每个管芯10的第二侧12上方的粘合层114附接至载体110上方的介电层112。
此后，多个通孔116在载体110上方形成管芯10的旁边或周围。在一些实施例中，通孔116形成在介电层112上方。通孔116包括铜、镍、焊料、它们的组合等。在一些实施例中，通孔116还包括阻挡层以防止金属扩散。通孔116的示例性形成方法包括在载体110上方形成诸如干膜抗蚀剂的光刻胶层。此后，在光刻胶层中形成开口，然后利用电镀在开口中形成通孔116。此后，剥离光刻胶层。在一些实施例中，通孔116的顶部与介电图案108a的顶部基本平齐。在可选实施例中，通孔116的顶部低于或高于介电图案108a的顶部。
参照图1E，密封剂118形成在载体110上方以密封管芯10并填充介电图案108a之间的间隙108b。在一些实施例中，密封剂118密封通孔116并密封管芯10的顶部和侧壁。具体地，密封剂118覆盖介电图案108a的顶部和侧壁并完全填充介电图案108a之间的间隙108b，覆盖管芯10的侧壁，并且同时覆盖通孔116的顶部和侧壁。
在一个实施例中，密封剂118包括模塑料、模制底部填充物、树脂等，诸如环氧树脂。密封剂118可以通过适当的制造技术来形成，诸如旋涂、层压、沉积等。在一些实施例中，密封剂118包括光敏材料，诸如聚苯并恶唑(PBO)、聚酰亚胺、苯并环丁烯(BCB)、它们的组合等，其可以使用光刻掩模而容易地被图案化。在可选实施例中，密封剂118包括氮化物(诸如氮化硅)、氧化物(诸如氧化硅)、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、掺硼磷硅酸盐玻璃(BPSG)、它们的组合等。
密封剂118的研磨速率不同于介电层108(或介电图案108a)的研磨速率。研磨速率被定义为每单位时间去除的膜的厚度。在一些实施例中，当形成在衬底上的膜在预定压力下被抛光或研磨时，测量研磨速率。研磨速率受各种工艺因素影响，诸如抛光或研磨浆的组成、抛光或研磨轮的硬度和/或设计、膜的硬度和/或材料等。
在一个实施例中，对所得到的结构执行研磨工艺。在一些实施例中，在研磨工艺之后执行抛光工艺。在一些实施例中，密封剂118被抛光或研磨得的速率远慢于介电层108(或介电图案108a)。在可选实施例中，密封剂118被抛光或研磨的速率远快于介电层108。在一些实施例中，密封剂118和介电层108包括不同的材料，其具有不同的研磨速率。
参照图1F，去除密封剂118的一部分直到露出连接件106的顶部，使得分别在介电图案108a之间的间隙108b中设置支持件120。具体地，执行研磨或抛光工艺以通过将连接件106用作抛光或研磨停止层来去除密封剂118的一部分和介电图案108a的一部分，因此剩余介电图案108a之间的剩余或减薄的密封剂118分别在间隙108b中形成支持件120。在一些实施例中，在研磨或抛光工艺期间同时去除连接件106和通孔116的上部，以去除连接件106和通孔116的上表面上的不期望的氧化物或聚合物残留。
在一些实施例中，如图1E和图1F所示，支持件120由密封剂118形成，因此支持件120和密封剂118由具有基本相同的研磨速率的相同材料制成。在可选实施例中(例如，图3A至图3H的实施例)，支持件和密封剂由不同材料形成但显示出基本相同的研磨速率。
根据掩模或抛光工艺，密封剂118、支持件120和连接件106的顶部基本平坦。在一些实施例中，管芯区域13内(即，被管芯10占据的区域)的支持件120、连接件106和介电图案108a的顶部基本与管芯区域13外的密封剂118和通孔116的顶部平齐。由此完成本发明的封装结构150。
参照图1G，用于再分布层(RDL)的金属线160形成为电连接至封装结构150的连接件106，并且球170被形成为电连接至金属线160。具有金属线160和球170的封装结构150被翻转，胶层111在光的热量下分解，然后从封装结构150释放载体110。此后。介电层112被图案化以在其中形成多个开口。
此后，设置另一封装结构180。在一些实施例中，另一封装结构180具有衬底203，并且管芯201安装在衬底203的一个表面(例如，顶面)上。接合引线207用于在管芯201和衬底203的顶面部分中的一组接合焊盘205之间提供电连接。密封剂209形成在部件上方以保护部件以免环境和外部污染。通孔(未示出)可用于在接合焊盘205和衬底203的底面部分中的另一组接合焊盘211之间提供电连接。诸如焊球的多个连接件214形成在衬底203的相对面(例如，底面)上以电连接至接合焊盘211。
在一些实施例中，本发明的封装结构150可连接至另一封装结构180，以形成堆叠封装(PoP)器件。具体地，另一封装结构180的连接件214与介电层112的开口对准并插入到介电层112的开口中，因此电连接至封装结构150的通孔116。
可以参照图2的流程图简要示出图1A至图1F的所述工艺步骤。
在步骤200中，提供管芯10。管芯10在其第一侧11上方包括多个连接件106。在步骤202中，如图1B所示，多个介电图案108a形成在管芯10的第一侧上方以覆盖连接件106。在步骤204中，如图1C所示，执行切割工艺以将管芯10与相邻的管芯10分离。在步骤206中，如图1D所示，管芯10被放置在载体110上方。在步骤208中，如图1D所示，多个通孔116在载体110上方形成在管芯10的旁边。在步骤210中，如图1E所示，密封剂118形成在载体110上方以密封管芯10并填充介电图案108a之间的间隙108b。在步骤212中，如图1F所示，去除密封剂118的一部分直到露出连接件106的顶部，使得支持件120被设置在介电图案108a之间的间隙108b中。
注意，在一些实施例中，支持件120的总的顶部面积为管芯10的总的顶部面积的大约30％或50％以上。管芯10的总的顶部面积被定义为管芯区域13的面积。换句话说，支持件120与管芯10的顶部面积比大于约0.30或0.50。在一些实施例中，支持件120与管芯10的顶部面积比例如可以为但不限于大约0.30、0.35、0.40、0.45、0.50、0.55、0.60、0.65、0.70、0.75、0.80、0.85、0.90、0.95，包括前面的任何两个值之间的任何范围以及大于前面的任何一个值之间的任何范围。在一些实施例中，例如，支持件120与管芯10的顶部面积比是为了提高研磨或抛光均匀性。
具体地，管芯区域13内的支持件120和管芯区域13外的密封剂118设置有类似的研磨速率，并且支持件120紧靠着或接触抛光或研磨轮的顶部面积尽可能被最大化。以这种方式，抛光或研磨轮在操作期间经受研磨速率的较小变化。此后，大大缓解或没有观察到传统的凹陷效应。因此提高了抛光均匀性，并且延长了抛光或研磨轮的寿命。
图3A至图3H是根据一些实施例的形成封装结构的方法的截面图。图4是示出根据一些实施例的形成封装结构的方法的流程图。图3A至图3H的方法与图1A至图1G的方法之间的差异在于支持件的形成序列。以下详细示出差别，并且这里不再重复相似的地方。
参照图3A和图4，设置图1B所示的中间结构。晶圆设置有多个管芯10，并且每个管芯10均在其第一侧11上方包括多个连接件106(步骤300)。此后。多个介电图案108a形成在管芯10的第一侧11上方以分别覆盖连接件106(步骤302)。
参照图3B、图3C和图4，支持件120a分别形成在介电图案108a之间的间隙108b中(步骤304)。支持件120a包括不同于介电图案108a的介电材料。在一些实施例中，支持件120a包括氮化物(诸如氮化硅)、氧化物(诸如氧化硅)、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、掺硼磷硅酸盐玻璃(BPSG)、它们的组合等。支持件120的示例性形成方法包括在衬底100上方沉积介电材料层122以填充介电图案108a之间的间隙108b(如图3B所示)，然后通过将介电图案108a用作抛光停止层利用化学机械抛光(CMP)工艺去除部分介电材料层122(如图3C所示)。根据CMP工艺，介电图案108a和支持件120a的顶部基本共面。
支持件120a的研磨速率不同于介电图案108a的研磨速率。在一些实施例中，支持件120a被抛光或研磨的速率远慢于介电图案108a。在可选实施例中，支持件120a被抛光或研磨的速率远快于介电图案108a。
在晶圆阶段执行图3A至图3C中的步骤。在一些实施例中，在形成介电图案108a和支持件120之后以及在管芯单一化工艺之前，如图3C所示，诸如DAF的粘合层114形成在管芯10的背侧或第二侧12上方。
参照图3D和图4，执行切割工艺以将管芯10与相邻的管芯10分离(步骤306)。
参照图3E和图4，管芯10被放置在载体110上方(步骤308)。此后，多个通孔116在载体110上方形成在管芯10的旁边(步骤310)。
参照图3F和图4，密封剂118形成在载体110上方以密封管芯10(步骤312)。在一些实施例中，密封剂118密封通孔116并密封管芯10的顶部和侧壁。具体地，密封剂118覆盖介电图案108a和支持件120a的顶部，覆盖管芯10的侧壁，并同时覆盖通孔116的顶部和侧壁。
参照图3G和图4，去除密封剂118的一部分直到露出连接件106的顶部(步骤314)。在一些实施例中，执行研磨或抛光工艺以通过将连接件106用作抛光或研磨停止层来去除密封剂118的一部分、介电图案108a的一部分和支持件120a的一部分。在一些实施例中，如果需要的话，在研磨或抛光工艺期间同时去除连接件106和通孔116的上部。根据研磨或抛光工艺，密封剂118、支持件120a和连接件106的顶部基本共面。由此完成本发明的封装结构150a。
参照图3H，本发明的封装结构150a可连接至另一封装结构180以形成PoP器件。
注意，在一些实施例中，支持件120a和密封剂118由不同材料形成但显示出相同的研磨速率，并且支持件120a的总的顶部面积为管芯10的总的顶部面积的大约30％或50％以上。以这种方式，管芯内与管芯外的抗研磨或抛光工艺的材料的等效研磨速率相似，使得管芯内和外的研磨速率变化被最小化，因此提高了步骤314中的研磨或抛光均匀性。
参照图1F和图3G的截面图以及图5至图10的顶视图示出了本发明的封装结构。
参照图1F和图3G，封装结构包括管芯10、介电层108、密封剂118、多个通孔116以及多个支持件120/120a。管芯10在其第一侧11上方包括多个连接件106。介电层108在管芯10的第一侧11上方位于连接件106旁边或周围。密封剂118在管芯10旁边或环绕管芯10。通孔116在管芯旁边或者在管芯周围并穿透密封剂118。支持件120/120a穿透介电层108。此外，支持件120、120a和密封剂118具有基本相同的研磨速率，但是支持件120/120a的研磨速率不同于介电层108的研磨速率。
在一些实施例中(例如，图1A至图1G的实施例)，支持件120和密封剂118包括具有相同研磨速率的相同材料。在可选实施例(例如，图3A至图3H的实施例)中，支持件120a和密封剂118包括不同的材料但显示出相同的研磨速率。在一些实施例中，密封剂118、支持件120/120a和连接件106的顶部基本共面。
参照图1F、图3G、图5和图6，支持件120/120a是配置为规则或不规则阵列的柱。在一些实施例中，相邻的介电图案108a相互连接以形成网状介电层108，并且分别位于柱阵列中的连接件106和支持件120、120a穿透介电层108的网格。
在一些实施例中，支持件被形成为环绕柱，但是本发明不限于此。在可选实施例中，使用正方形柱或其他形状的柱来代替圆形柱。在一些实施例中，如图5所示，每个柱均具有基本相同的尺寸或顶面积。在可选实施例中，如图6所示，根据工艺要求，支持件具有不同的尺寸或顶面积。
参照图1F、图3G和图7，支持件120、120a形成为壁。在一些实施例中，如图7所示，连接件106配置为多个倾斜列的阵列，并且一个壁形成在连接件106的旁边，例如形成在连接件106的两个倾斜列之间，但是本发明不限于此。在可选实施例中，连接件106配置为多个垂直列的阵列，并且一个壁形成在连接件106的两个垂直列之间。在又一可选实施例中，连接件106配置为多个倾斜或垂直行的阵列，并且一个壁形成在连接件106的两个倾斜或垂直行之间。
参照图1F、图3G、图8和图9，支持件120、120a是连接件106旁边的环，并且介电图案108a形成在支持件120/120a和连接件106之间。在一些实施例中，支持件120/120a是分别环绕至少一个连接件106的环。在一些实施例中，如图8所示，支持件120/120a形成为矩形环状支持件。在可选实施例中，如图9所示，支持件120/120a形成为圆形环形状支持件。在一些实施例中，支持件120/120a的至少一部分被连接以形成网状结构。在可选实施例中，环相互分离。
仅为了说明的目的提供支持件是柱、壁或环的所述实施例，而不用于限制本发明的范围。在可选实施例中，其他形状的支持件或者柱、壁和环中的至少两种的组合可应用于本发明。在一些实施例中，如图10所示，支持件120、120a包括环和壁，其中每个环状支持件环绕管芯10的边角或密集区域中的部分连接件106，并且壁形成在管芯10的中心或开放区域中。本领域技术人员应该理解，支持件的其他组合和结构是可能的。在一些实施例中，支持件被均匀分配在管芯区域中。在可选实施例中，支持件被随机且不均匀地分配在管芯区域中。换句话说，支持件的形状、尺寸、变形、结构和分配不限于本发明。
只要管芯区域内的连接件和管芯区域外的密封剂旁边的介电图案之间的支持件设置有相同或相似的研磨速率或者由相同或相似材料制成，并且支持件的总的顶部面积大于管芯的总的顶部面积的大约30％，支持件就预期落入本发明的精神和范围内。通过这种设置，管芯区域内的材料的等效研磨速率与管芯区域外的材料的研磨速率基本相同，以使研磨或抛光工艺期间的管芯内和外的研磨速率变化最小化。
换句话说，支持件占用大约1/3或一半的管芯面积，并且具有与密封剂相似的研磨速率，与在管芯区域中不具有支持件的情况相比，管芯区域内的支持件和介电图案的等效抛光研磨速率接近管芯区域外的密封剂的研磨速率。因此，抗研磨或抛光工艺的研磨速率在管芯内和管芯外稍稍变化，相应地提高了抛光均匀性。
在一些实施例中，从形成本发明的封装结构的方法中省略形成介电层108(或介电图案108a)的步骤。
图11A至图11F是根据一些实施例的形成封装结构的方法的截面图。图12是示出根据一些实施例的形成封装结构的方法的流程图。
参照图11A和图12，晶圆设置有多个管芯10，并且每个管芯10均在其第一侧11上方包开多个连接件106(步骤400)。
在一些实施例中，如图11A所示，在管芯单一化工艺之前，诸如DAF的粘合层114形成在管芯10的背侧或第二侧12上方。
参照图11B和图12，执行切割工艺以将管芯10与相邻管芯10分离(步骤402)。
参照图11C和图12，管芯10被放置在载体110上方(步骤404)。此后，多个通孔116在载体110上方形成在管芯10旁边(步骤406)。
参照图11D和图12，密封剂1108形成在载体110上方以密封管芯10并填充连接件106之间的间隙(步骤408)。在一些实施例中，密封剂118密封通孔116并密封管芯10的顶部和侧壁。具体地，密封剂118覆盖连接件106的顶部和侧壁，填充连接件106之间的间隙，覆盖管芯10的侧壁，并且同时覆盖通孔116的顶部和侧壁。
参照图11E和图12，去除密封剂118的一部分直到露出连接件106的顶部，使得支持件120a分别位于连接件106之间的间隙中(步骤410)。在一些实施例中，执行研磨或抛光工艺以通过将连接件106用作抛光或研磨停止层来去除部分密封剂118。在一些实施例中，如果需要的话，在研磨或抛光工艺期间同时去除连接件106和通孔116的上部。根据研磨或抛光工艺，密封剂118、支持件120b和连接件106的顶部基本共面。由此完成本发明的封装结构150b。
参照图11F，本发明的封装结构150b可连接至另一封装结构180，以形成PoP器件。
注意，在一些实施例中，支持件120b和密封剂118由具有相同研磨速率的相同材料制成，并且支持件120b的总的顶部面积为管芯10的总的顶部面积的约30％或50％以上。以这种方式，提高了步骤410中的研磨或抛光均匀性。
图13是根据一些实施例的封装结构的顶视图。支持件120b相互连接以形成网状结构，并且柱阵列中的连接件106穿透网状结构的网格。
鉴于上述内容，本发明提高了具有内置支持件的封装结构及其形成方法。管芯区域内的最顶部的连接件和管芯区域外的密封剂旁边的介电图案之间的非导电支持件具有基本相同的研磨速率，并且支持件的总的顶部面积为管芯的总的顶部面积的约30％以上。通过本发明的这种结构，研磨轮在操作期间经受研磨速率的较小变化，相应地提高了抛光均匀性，并且延长了研磨轮的寿命。
根据本发明的一些实施例，一种封装结构包括管芯、介电层、密封剂和多个支持件。管芯包括至少一个连接件。介电层形成在管芯上方并且位于连接件旁边。密封剂在管芯旁边。支持件在介电层中位于连接件旁边，其中支持件的研磨速率与密封剂的研磨速率基本相同但不同于介电层的研磨速率。
优选地，所述支持件的总的顶部面积为所述管芯的总的顶部面积的约30％以上。
优选地，所述支持件的材料不同于所述密封剂的材料。
优选地，所述支持件的材料与所述密封剂的材料相同。
优选地，所述支持件是配置为阵列的柱。
优选地，所述支持件是所述连接件旁边的壁。
优选地，所述支持件是所述连接件旁边的环。
优选地，所述密封剂、所述支持件和所述连接件的顶部基本共面。
优选地，封装结构还包括穿透所述密封剂的位于所述管芯旁边的多个通孔。
根据本发明的可选实施例，一种PoP器件包括第一封装结构和第二封装结构。第一封装结构包括管芯、介电层、密封剂和多个支持件。管芯包括多个连接件。介电层形成在管芯的第一侧上方并位于连接件旁边。密封剂在管芯旁边。支持件位于介电层中，并且支持件的材料与密封剂的材料相同。第二封装结构形成为上覆第一封装结构。
优选地，PoP器件还包括位于所述密封剂中的多个通孔。
优选地，所述连接件是铜凸块。
优选地，所述支持件的材料不同于所述介电层的材料。
优选地，所述支持件的总的顶部面积为所述管芯的总的顶部面积的约30％以上。
根据本发明的又一可选实施例，一种形成封装结构的方法至少包括以下步骤。提供管芯，其中管芯在其第一侧上方包括多个连接件。多个介电图案形成在管芯的第一侧上方以覆盖连接件。管芯放置在载体上方。密封剂形成在载体上方，密封管芯并填充介电图案之间的间隙。去除密封剂的一部分直到露出连接件的顶部，使得支持件被设置在间隙中。
优选地，形成所述介电图案的步骤包括：在所述管芯的第一侧上方形成介电层以覆盖所述连接件并填充所述连接件之间的间隙；以及图案化所述介电层以形成所述介电图案。
优选地，形成封装结构的方法还包括：在形成所述介电图案之后，执行切割工艺以将所述管芯与相邻管芯分离。
优选地，形成封装结构的方法还包括：在将所述管芯放置在所述载体上方的步骤之后以及在所述载体上方形成所述密封剂的步骤之前，多个通孔在所述载体上方形成在所述管芯旁边。
优选地，所述支持件是柱、壁、环或它们的组合。
优选地，所述支持件的总的顶部面积为所述管芯的总的顶部面积的约30％以上。
上面论述了多个实施例的特征使得本领域技术人员能够更好地理解本发明的各个方面。本领域技术人员应该理解，他们可以容易地以本发明为基础设计或修改用于执行与本文所述实施例相同的目的和/或实现相同优点的其他工艺和结构。本领域技术人员还应该意识到，这些等效结构不背离本发明的精神和范围，并且可以在不背离本发明的精神和范围的情况下做出各种变化、替换和改变。

Claims (10)

1.一种封装结构，包括：
管芯，包括连接件；
介电层，位于所述管芯上方并且位于所述连接件旁边；
密封剂，位于所述管芯旁边；以及
多个支持件，在所述介电层中位于所述连接件旁边，
其中，所述支持件的研磨速率与所述密封剂的研磨速率相同但不同于所述介电层的研磨速率。
2.根据权利要求1所述的封装结构，其中，所述支持件的总的顶部面积为所述管芯的总的顶部面积的30％以上。
3.根据权利要求1所述的封装结构，其中，所述支持件的材料不同于所述密封剂的材料。
4.根据权利要求1所述的封装结构，其中，所述支持件的材料与所述密封剂的材料相同。
5.根据权利要求1所述的封装结构，其中，所述支持件是配置为阵列的柱。
6.根据权利要求1所述的封装结构，其中，所述支持件是所述连接件旁边的壁。
7.根据权利要求1所述的封装结构，其中，所述支持件是所述连接件旁边的环。
8.根据权利要求1所述的封装结构，其中，所述密封剂、所述支持件和所述连接件的顶部共面。
9.一种堆叠封装器件，包括：
第一封装结构，包括：
管芯，包括多个连接件；
介电层，位于所述管芯上方并位于所述连接件旁边；
密封剂，位于所述管芯旁边；和
多个支持件，位于所述介电层中，其中所述支持件的材料与所述密封剂的材料相同；以及
第二封装结构，形成为上覆所述第一封装结构。
10.一种形成封装结构的方法，包括：
提供管芯，所述管芯在其第一侧上方包括多个连接件；
在所述管芯的第一侧上方形成多个介电图案以覆盖所述连接件；
将所述管芯放置在所述载体上方；
在所述载体上方形成密封剂，所述密封剂密封所述管芯并填充所述介电图案之间的间隙；以及
去除所述密封剂的一部分直到露出所述连接件的顶部，使得在所述介电图案之间的间隙中设置支持件。
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