CN106165082A - 基板处理系统 - Google Patents

基板处理系统 Download PDF

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CN106165082A
CN106165082A CN201580017535.2A CN201580017535A CN106165082A CN 106165082 A CN106165082 A CN 106165082A CN 201580017535 A CN201580017535 A CN 201580017535A CN 106165082 A CN106165082 A CN 106165082A
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chamber
wafer
process chamber
substrate
processing
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CN106165082B (zh
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藤野丰
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Tokyo Electron Ltd
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Abstract

本发明提供一种对多个基板实施处理的基板处理系统，其包括：收纳多个基板并对其实施规定的处理的圆环状的处理腔室；载置用于收纳多个基板的盒的盒载置部；和在该处理腔室与该盒载置部之间搬送基板的基板搬送机构，在该处理腔室内，俯视时同心圆状地配置有多个基板。

Description

基板处理系统
技术领域
(相关申请的相互参照)
本申请基于在2014年3月31日在日本国申请的特愿2014-073450号，主张优先权，此处引用其内容。
本发明涉及对多个基板实施规定的处理的基板处理系统。
背景技术
例如在半导体器件等的制造工艺中，对作为基板的半导体晶片(以下称为“晶片”。)进行离子注入处理、蚀刻处理、成膜处理等各种处理。对晶片进行的成膜处理、被称为所谓的ALD(原子层沉淀，Atomic Layer Deposition)、MLD(分子层沉淀，Molecular LayerDeposition)的处理，例如利用在被排气为真空的处理腔室内对多个晶片进行处理的成批处理系统进行。
作为这样的成批处理系统例如能够使用在专利文献1中公开那样的系统。例如如图13所示，该成批处理系统200，为了实现各晶片处理的面内均匀性提高和晶片W间的处理的均匀性的提高，具有同心圆状地载置多个晶片W的、例如圆形的载置台210和收纳该载置台210的圆筒形状的处理腔室211。
真空搬送室212与处理腔室211相邻设置，在配置于大气侧的盒站201的盒C中收纳的晶片W经由配置在大气侧的搬送臂213和与真空搬送室212相邻的负载闭锁室214，由设置在真空搬送室212的搬送臂215搬送到处理腔室211内。
现有技术文献
专利文献
专利文献1：日本国特开2010-245449号公报
发明内容
发明要解决的课题
但是，在同心圆状地载置晶片W的载置台210中，在图13的处理腔室211内由虚线所示，在其中心产生不能载置晶片W的空间A。于是，载置在载置台210的晶片W的个数、换言之收纳在处理腔室211内的晶片W的个数越增加，该空间A越逐渐增加。因此，在图13所示的同心圆状地载置晶片W并对其进行处理的处理腔室211中，越使晶片W的处理个数增加，每个晶片W的处理所需要的处理腔室211的容积(以下将该容积称为“必要处理容积”。)越增加。这样一来，由于为了处理一个晶片W进行排气的空间的容积增加，所以用于将处理腔室211内排气至规定的真空度的时间增加，其结果是，存在晶片处理的生产能力降低的问题。
所以，为了使每个晶片W的处理腔室211的容积不过剩地变大，通常使在处理腔室211进行处理的晶片W的个数为6个左右，这样构成的处理腔室211与真空搬送室212相邻地设置有多台。
但是，当经由真空搬送室212设置多个处理腔室211时，也产生真空搬送室212其自身变大，作为成批处理系统200整体的占用空间增大的问题。
本发明是鉴于上述情况而完成的，其目的在于，在对多个基板实施规定的处理的基板处理系统中，使伴随在处理腔室进行处理的晶片W的个数的增加而导致的处理腔室的容积的增加为最小限度。
用于解决课题的技术方案
为了达成上述目的，本发明包括：收纳多个基板的圆环状的处理腔室；载置用于收纳多个基板的盒的盒载置部；和在上述处理腔室与上述盒载置部之间搬送基板的基板搬送机构，在上述处理腔室内，俯视时同心圆状地配置有上述多个基板。
根据本发明，处理腔室形成为圆环状，基板同心圆状地配置在该处理腔室内，所以在现有的圆筒形状的处理腔室中，没有产生与基板的收纳个数的增加一起逐渐增加的、上述的空间A。因此，即使增加在处理腔室进行处理的基板的个数，也能够使处理腔室的容积的增加为最小限度。
发明效果
根据本发明，在对多个基板实施规定的处理的基板处理系统中，能够使伴随在处理腔室进行处理的晶片W的个数的增加而导致的处理腔室的容积的增加为最小限度。
附图说明
图1是表示本实施方式的晶片处理系统的构成的概略的平面图。
图2是表示本实施方式的晶片处理系统的构成的概略的纵截面图。
图3是表示处理腔室的构成的概略的说明图。
图4是表示另一实施方式的晶片处理系统的构成的概略的纵截面图。
图5是表示在处理腔室中的晶片的处理个数和处理腔室的容积的关系图表。
图6是关于处理腔室中的必要处理容积的说明图。
图7是晶片处理系统的占用空间的说明图。
图8是表示现有的成批处理系统的占用空间的说明图。
图9是表示另一实施方式的晶片处理系统的构成的概略的平面图。
图10是表示现有的成批处理系统的构成的概略的平面图。
图11是表示另一实施方式的晶片处理系统的构成的概略的纵截面图。
图12是表示另一实施方式的晶片处理系统的构成的概略的纵截面图。
图13是表示现有的成批处理系统的构成的概略的平面图。
具体实施方式
以下对本发明的实施方式的一个例子进行说明。在本说明书和附图中，对实质上具有相同的功能构成的构成要素标注相同的附图标记，由此省略重复说明。图1是表示作为本实施方式的基板处理系统的晶片处理系统1的构成的概略的平面图。图2是表示本实施方式的晶片处理系统1的构成的概略的纵截面图。此外，以作为本实施方式的晶片W使用例如半导体晶片，在晶片处理系统1中实施对晶片进行成膜处理的、所谓的ALD的情况为例进行说明。
如图1所示，晶片处理系统1包括：用盒单元将多个晶片W搬入搬出的盒站2；例如对多个晶片W分批式地进行处理的处理站3；和进行处理站3中的晶片W的处理的控制的控制装置4。为盒站2和处理站3经由负载闭锁室5一体地连接的构成。
盒站2包括盒载置部10和与盒载置部10相邻设置的搬送室11。在盒载置部10中，能够在X方向(图1中的左右方向)上载置多个例如3个能够收纳多个晶片W的盒C。在搬送室11设置有晶片搬送臂12。晶片搬送臂12能够在上下方向、左右方向和绕铅垂轴(θ方向)自由移动，能够在盒载置部10的盒C与负载闭锁室5之间搬送晶片W。此外，图1描绘了在搬送室11配置有一台晶片搬送臂12的状态，但是，晶片搬送臂12的配置和设置数量等不限于本实施方式的内容，能够任意设定。
处理站3包括成批式地对多个晶片W进行处理的大致圆环状的处理腔室20，和在由圆环状的处理腔室20包围的内侧的空间与处理腔室20相邻设置的真空搬送室21。例如如图2所示，处理腔室20的截面的宽度S构成为比晶片W的直径大，以使得能够水平收纳晶片W。在处理腔室20的内部设置有载置多个晶片W的载置台22。此外，在图2中，将处理腔室20的截面描绘为矩形，但是，如果处理腔室20的截面形状为在其内部能够配置圆环状的载置台22的形状，则不限于本实施方式的内容，能够任意设定。
载置台22例如如图1所示，与处理腔室20同样形成为圆环状，与处理腔室20同心圆状地配置。在载置台22上，多个晶片W沿该载置台22的周向配置在同一圆周上。在图1中，描绘了在载置台22上载置有例如14个晶片W的状态，但是，晶片W的设置个数和载置台22的大小能够任意设定。
在载置台22的例如下表面设置有使载置台22以该载置台22的中心轴为旋转轴在水平方向上旋转的驱动机构23。作为驱动机构23例如由能够转动的辊等构成。另外，在载置台22内置有未图示的升降销，能够在与后述的晶片搬送机构40之间进行晶片W的交接。
例如如图2所示，排气机构24与处理腔室20经由排气管25连接，利用该排气机构24能够将内部减压。在排气管25设置有对排气机构24的排气量进行调节的调节阀26。在处理腔室20的与真空搬送室21相对的侧面，换言之在处理腔室20与真空搬送室21之间，例如如图3所示，在多个部位设置有闸阀27。该闸阀27在通常状态下为关闭的状态，通过进行打开操作，能够在真空搬送室21与处理腔室20之间进行晶片W的搬送。此外，在图3中，描绘了在三处等间隔地设置有闸阀27的状态，但是闸阀27的配置和设置数量能够任意设定。此外，在图2中，描绘了例如仅在处理腔室20的侧面的一个部位连接有排气管25的状态，但是，从将处理腔室20内均匀地排气而防止偏流的观点出发，优选在处理腔室20的多个部位设置排气管25。
另外，对该处理腔室20的内部供给规定的处理气体的气体供给机构30经由气体供给管31与处理腔室20的例如顶面连接。在气体供给管31设置有调节处理气体的供给量的流量调节机构32。此外，图2中，描绘了例如仅在处理腔室20的顶面的一个部位连接有气体供给管31的状态，但是从对处理腔室20内均匀地供给处理气体、进行均匀的晶片处理的观点出发，优选与排气管25的情况同样地在处理腔室20的多个部位设置气体供给管31。另外，气体供给管31的连接部位不限于处理腔室20的顶面，也可以在处理腔室20的侧面等。特别是，具有在处理腔室20的上表面、侧面配置有用于将用于帮助对晶片W的成膜的等离子体导入处理腔室20内的等离子体源的情况。因此，对于处理腔室20外部的设备的配置，能够根据在晶片处理系统1中进行的处理的内容等任意设定。
负载闭锁室5例如如图2所示配置在处理腔室20的下方。换言之，在俯视时跨处理腔室20的下方地配置。负载闭锁室5将真空搬送室21和搬送室11连接。在负载闭锁室5与搬送室11之间，和在负载闭锁室5与真空搬送室21之间，设置有未图示的闸阀，在搬送晶片W时通过对该闸阀进行打开操作，晶片W能够通过负载闭锁室5。
真空搬送室21，上部经由闸阀27与处理腔室20连接，下部经由未图示的闸阀与负载闭锁室5连接。因此，真空搬送室21例如从处理腔室20的底面在下方延伸，例如底面构成为与负载闭锁室5的底面相同程度的高度。此外，在图2中，描绘了在处理腔室20的下方设置有负载闭锁室5的状态，但是，例如如图4所示，可以在处理腔室20的上方设置负载闭锁室5。换言之，可以将负载闭锁室5配置成在俯视时跨处理腔室20的上方。
真空搬送室21与处理腔室20同样地与排气机构(未图示)连接，利用该排气机构能够将内部减压。在真空搬送室21的内部设置有在负载闭锁室5与处理腔室20之间搬送晶片W的晶片搬送机构40。
晶片搬送机构40包括多个能够旋转和伸缩的多关节的搬送臂41。各搬送臂41例如由在真空搬送室21的中心部在铅垂方向上延伸设置的支承部件42支承。另外，各搬送臂41利用未图示的升降机构，沿支承部件42能够升降，能够在负载闭锁室5与处理腔室20之间搬送晶片W。此外，在图1中描绘了例如设置有3个搬送臂41的状态，但是，搬送臂41的设置数量能够任意设定。另外，晶片搬送机构40的构成也不限于本实施方式的内容，只要是能够在负载闭锁室5与处理腔室20之间搬送晶片W，其构造和形式能够任意设定。
控制装置4例如为计算机，具有程序存储部(未图示)。在程序存储部存储有用于控制晶片处理系统1中的晶片W的处理的程序。此外，上述程序例如可以记录在计算机可读取的硬盘(HD)、软盘(FD)、光盘(CD)、磁盘(MO)、存储器卡等计算机可读取的存储介质中，可以从该存储介质安装于控制装置4。
本实施方式的晶片处理系统1以如上所述的方式构成。接着，对在该晶片处理系统1中进行的晶片处理进行说明。
在进行晶片W的处理时，首先，多个未处理的晶片W被晶片搬送臂12从盒站2的盒C取出，依次被搬送到负载闭锁室5内。之后，对负载闭锁室5内进行排气，将内部减压至规定的压力。
接着，打开负载闭锁室5与内部被预先维持为减压状态的真空搬送室21之间的闸阀(未图示)，利用晶片搬送机构40的搬送臂41将负载闭锁室5内的晶片W依次经由真空搬送室21搬入预先维持为减压状态的处理腔室20内。
被搬送到处理腔室20内的晶片W经由升降销(未图示)依次被载置在载置台22上。
全部的晶片W被搬入处理腔室20内时，将闸阀27关闭，利用控制装置4实施晶片W的处理。在晶片W的处理中，利用排气机构24将处理腔室20内减压至规定的压力。此时，由于处理腔室20形成为圆环状，所以能够快速进行排气。即，在现有的圆筒形的处理腔室211中，对于图13的空间A的部分也需要进行排气。而且，该空间A伴随配置在处理腔室211的晶片W的个数的增加而增加，空间A的直径与晶片W的增加一起增加，因此，每个晶片W的处理所需要的处理腔室211的容积(必要处理容积)也与空间A的半径的平方成比例地逐渐增加。因此，处理腔室211的容积不是线形增加，例如以图5的线P所示的方式逐渐增加。因此，存在伴随晶片W的增加，对处理腔室211内进行排气的时间增加的问题。此外，图5的横轴是晶片W的设置个数，纵轴是处理腔室内的容积。另外，图5是关于晶片W的直径为300mm的情况的图。
另一方面，在本实施方式的处理腔室20中，在增加设置于处理腔室20内的晶片W的个数的情况下，在将处理腔室20的宽度S保持为一定的状态下，仅扩大图2所示的处理腔室20的直径R就足够。换言之，即使增加设置在处理腔室20内的晶片W的个数，作为处理腔室20中的必要处理容积的、例如由图6的斜线包围的空间B的容积也保持一定。因此，例如在将晶片W的设置个数增加一个的情况下，处理腔室20的容积仅增加一个晶片占用的空间B的量就足够，不产生如现有的处理腔室211那样伴随空间A的直径的变化而导致的处理腔室211的容积的增加。其结果是，相对于晶片W的个数的增加的处理腔室20的容积的增加，如图5的线Q所示为线形。因此，即使增加设置在处理腔室20内的晶片W的个数，与现有的处理腔室211相比，能够大幅缩短排气时间。更具体来说，例如如图5所示，在构成能够配置12个晶片W的处理腔室20的情况下，在现有的处理腔室211中，以相同的容积大概仅能够配置8个晶片W，每个晶片所需要的排气时间变长。
当处理腔室20内被减压至规定的压力时，从气体供给机构30供给规定的处理气体，对晶片W进行成膜处理。此时，在如上所述的本实施方式的处理腔室20中，与现有的处理腔室211相比必要处理容积较小，因此还能够降低为了处理每个晶片W而供给的处理气体的流量，能够降低晶片处理系统1的运行成本。当在处理腔室20内的成膜处理结束时，打开闸阀27。接着，利用晶片搬送机构40的搬送臂41，处理完的晶片W从处理腔室20依次被搬出至真空搬送室21。之后，晶片W经由负载闭锁室5依次收纳在盒站2的盒C内。然后，在所有的晶片W收纳在盒C后，盒C被搬出至盒站2的外部，并且，收纳有未处理的晶片W的新的盒C被搬送至盒站2。然后，该未处理的晶片W依次被搬送到处理腔室20，反复进行该一系列的处理。
根据以上的实施方式，处理腔室20形成为圆环状，晶片W在该处理腔室20内配置成同心圆状，因此，不产生在现有的圆筒形状的处理腔室211中与晶片W的收纳个数的增加一起逐渐增加的空间A。因此，即使增加在处理腔室20中处理的晶片的个数，也能够将处理腔室的容积的增加抑制在最小限度。
另外，在现有的成批处理系统200中，在增加处理腔室211的设置数量的情况下，伴随搬送臂215的增加需要扩大在处理腔室211的外部设置的真空搬送室212。因此，除了伴随处理腔室211的增加的占用空间的增加之外，还产生伴随真空搬送室212的扩大的占用空间的增加。
对此，在本实施方式中，在圆环状的处理腔室20的内侧的空间设置有真空搬送室21，因此，晶片处理系统1的占用空间的增加能够抑制为仅处理腔室20的增加的量。即，与本实施方式的晶片处理系统1中的晶片W的处理个数相应的占用空间的增加，只要设置在真空搬送室21的外部的搬送系统、即盒站2和负载闭锁室5的大小无变化，则大致形成为线形。因此，根据本实施方式，与现有技术相比能够提高每相同的占用空间的晶片W的处理个数。
此外，在现有的成批处理系统200和本实施方式的晶片处理系统1中，盒站2、201和负载闭锁室5、214的构成大致相同时，图7所示的本实施方式的晶片处理系统的占用空间F(图7中用点划线表示)例如如图8所示，形成于现有的成批处理系统200的、大致覆盖盒站201、负载闭锁室214和真空搬送室212的程度的区域。由本发明者确认了，本实施方式的晶片处理系统1的占用空间例如在晶片处理系统1中分批式地对12个晶片W进行处理情况下，与现有的成批处理系统200相比，占用空间能够削减大致三成。
另外，在本实施方式的晶片处理系统1中，将负载闭锁室5设置成跨处理腔室20的上方或者下方，所以，关于在俯视时负载闭锁室5和处理腔室20重合的部分，也能够削减占用空间。
此外，在以上的实施方式中，将真空搬送室21配置在圆环状的处理腔室20的内侧，但是，从不增加处理腔室20的必要处理容积的观点出发，使处理腔室20形成为圆环状即可，因此，真空搬送室21并不一定设置在处理腔室20的内侧。在该情况下，闸阀27可以设置在处理腔室20的外侧。
但是，在将真空搬送室21设置在处理腔室20的内侧的情况下，将闸阀27设置在处理腔室20的内侧的任何位置，搬送臂41都能够访问闸阀27。换言之，在将真空搬送室21设置在处理腔室20的内侧的情况下，闸阀27的配置能够自由设定。因此，优选将真空搬送室21设置在处理腔室20的内侧。尤其是，通过将晶片搬送机构40配置在真空搬送室21的中心部，从各搬送臂41到处理腔室20的距离变得相等，不会因搬送距离的不同而产生搬送延迟，因此，容易管理晶片W的搬送时间，另外，越增加搬送臂41的设置数量，越增加每单位时间的搬送个数。
在以上的实施方式中，对具有1个处理腔室20的晶片处理系统1进行说明，但是处理腔室20可以设置多个。例如，在设置两个处理腔室20的情况下，如图9所示，可以隔着盒站2，换言之在盒站2的两侧配置处理腔室20。通过这样设置，能够将占用空间的增加抑制为最小限度。此外，在图9中，将搬送室11设置为对于2个处理腔室20共用，以将盒C配置在搬送室11侧方的方式构成盒站2，但是其他的构造与上述内容相同。
另一方面，在现有的成批处理系统200中在盒站2的两侧配置处理腔室211时，导致大幅的占用空间的增加。作为一个例子，图10是在盒站2的两侧配置有处理腔室211的现有的成批处理系统200，图10中所示的点划线的区域是图9所示的晶片处理系统1的占用空间F。如上所述，通过使用本实施方式的处理腔室20，能够将伴随晶片W的处理个数的空间的增加抑制至最小限度。
在以上的实施方式中，将负载闭锁室5仅配置在处理腔室20的上方或下方的一方，但是，例如也可以如图11所示配置在处理腔室20的上方和下方，以跨处理腔室20的上方和下方这两者的方式设置2个负载闭锁室5a、5b。在该情况下，真空搬送室21优选构成为能够与负载闭锁室5a、5b的两者进行晶片W的搬送的高度。一般来说，真空搬送室21与盒C之间的搬送速度有时在负载闭锁室5被限速，但是，如图11所示，通过将负载闭锁室5a、5b在上下方向上多层地配置，能够消除负载闭锁室成为瓶颈的问题。
另外，在图11中，表示将负载闭锁室5设置为多层的情况，处理腔室20例如也可以如图12所示，在上下方向上多层地配置。在该情况下，优选真空搬送室21构成为与在上下方向上设置的处理腔室20的层数相应的高度。如上所述，通过将处理腔室20在上下方向上多层地设置，能够在不增加晶片处理系统1的占用空间的情况下，提高晶片处理系统1中的晶片W处理的生产能力。
在以上的实施方式中，以进行将多个晶片W在处理腔室20内一并处理的成批式的处理的情况为例进行了说明，但是本实施方式的处理腔室的应用不仅限于成批处理。例如，在图6所示的将处理腔室20内划分为各个空间B，在各空间B的每个中单独进行晶片W的处理的单片式的晶片处理系统中也能够应用。另外，也能够应用于如下所述的晶片处理系统：将2个以上的空间B连接的空间中同时处理2个以上的晶片W的情况，换言之例如将相邻的空间B连接多个而形成为一个空间，在该形成的空间中对多个晶片W同时进行处理的方式。
以上，参照附图对本发明的优选的实施方式进行了说明，但是本发明不限于该例。对于本领域技术人员而言，在申请的范围中记载的思想的范畴内，当然能够想到各种变更例或修正例，这些内容当然属于本发明的技术的范围。本发明不限于该例能够采用各种方式。另外，本发明也能够应用于在处理装置中进行的处理为成膜处理以外的、例如蚀刻处理等其它的处理。
附图标记说明
1 晶片处理系统
2 盒站
3 处理站
4 控制装置
5 负载闭锁室
10 盒载置部
11 搬送室
12 晶片搬送臂
20 处理腔室
21 真空搬送室
22 载置台
23 驱动机构
24 排气机构
27 闸阀
30 气体供给机构
40 晶片搬送机构
C 盒

Claims (10)

1.一种对多个基板实施处理的基板处理系统，其特征在于，包括：
收纳多个基板并对其实施规定的处理的圆环状的处理腔室；
载置用于收纳多个基板的盒的盒载置部；和
在所述处理腔室与所述盒载置部之间搬送基板的基板搬送机构，
在所述处理腔室内，俯视时同心圆状地配置有所述多个基板。
2.如权利要求1所述的基板处理系统，其特征在于：
所述基板搬送机构配置在所述圆环状的处理腔室的中心部的空间，
在处理腔室的与所述基板搬送机构相对的面设置有闸阀。
3.如权利要求2所述的基板处理系统，其特征在于：
在所述圆环状的处理腔室的中心部的空间与该处理腔室相邻地设置有真空搬送室，
所述基板搬送机构配置在所述真空搬送室内。
4.如权利要求3所述的基板处理系统，其特征在于：
所述真空搬送室和所述盒载置部经由负载闭锁室连接。
5.如权利要求4所述的基板处理系统，其特征在于：
所述负载闭锁室配置在所述处理腔室的上方、所述处理腔室的下方或者所述处理腔室的上方和下方这两者。
6.如权利要求1所述的基板处理系统，其特征在于：
在所述处理腔室内设置有载置所述多个基板的圆环状的载置台和使所述载置台在所述处理腔室内旋转的驱动机构。
7.如权利要求2所述的基板处理系统，其特征在于：
在所述处理腔室内设置有载置所述多个基板的圆环状的载置台和使所述载置台在所述处理腔室内旋转的驱动机构。
8.如权利要求3所述的基板处理系统，其特征在于：
在所述处理腔室内设置有载置所述多个基板的圆环状的载置台和使所述载置台在所述处理腔室内旋转的驱动机构。
9.如权利要求4所述的基板处理系统，其特征在于：
在所述处理腔室内设置有载置所述多个基板的圆环状的载置台和使所述载置台在所述处理腔室内旋转的驱动机构。
10.如权利要求5所述的基板处理系统，其特征在于：
在所述处理腔室内设置有载置所述多个基板的圆环状的载置台和使所述载置台在所述处理腔室内旋转的驱动机构。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111554597A (zh) * 2017-04-13 2020-08-18 三星显示有限公司 基板处理系统及基板搬送方法
CN113314448A (zh) * 2021-05-13 2021-08-27 长江存储科技有限责任公司 半导体传输设备及其控制方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105803424A (zh) * 2016-03-24 2016-07-27 广东省中科宏微半导体设备有限公司 薄膜生长腔室和薄膜生长设备
US11024531B2 (en) * 2017-01-23 2021-06-01 Lam Research Corporation Optimized low energy / high productivity deposition system
JP6896682B2 (ja) * 2018-09-04 2021-06-30 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 基板処理装置および半導体装置の製造方法
US10998209B2 (en) * 2019-05-31 2021-05-04 Applied Materials, Inc. Substrate processing platforms including multiple processing chambers
KR102622159B1 (ko) * 2021-07-14 2024-01-09 한국생산기술연구원 원자층 복합 증착 챔버

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4886592A (en) * 1987-10-17 1989-12-12 Leybold Aktiengesellschaft Apparatus on the carousel principle for coating substrates
JPH05179428A (ja) * 1991-05-23 1993-07-20 Matsushita Electric Ind Co Ltd 薄膜形成装置
US6007675A (en) * 1996-07-09 1999-12-28 Gamma Precision Technology, Inc. Wafer transfer system and method of using the same
CN1409867A (zh) * 1999-06-29 2003-04-09 拉姆研究公司 设有晶片输送机械臂用嵌入座的大气压下晶片输送模件及其实施方法
CN101667520A (zh) * 2008-09-05 2010-03-10 东京毅力科创株式会社 基板载置机构、基板处理装置和基板载置机构的控制方法
CN103299413A (zh) * 2010-12-29 2013-09-11 Oc欧瑞康巴尔斯公司 真空处理设备和制造方法
CN103493180A (zh) * 2011-04-25 2014-01-01 应用材料公司 半导体基板处理系统

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4785962A (en) * 1987-04-20 1988-11-22 Applied Materials, Inc. Vacuum chamber slit valve
JPH05275511A (ja) * 1991-03-01 1993-10-22 Tokyo Electron Ltd 被処理体の移載システム及び処理装置
US5838121A (en) * 1996-11-18 1998-11-17 Applied Materials, Inc. Dual blade robot
US5951770A (en) * 1997-06-04 1999-09-14 Applied Materials, Inc. Carousel wafer transfer system
US6071055A (en) * 1997-09-30 2000-06-06 Applied Materials, Inc. Front end vacuum processing environment
JP2000150836A (ja) * 1998-11-06 2000-05-30 Canon Inc 試料の処理システム
TW418429B (en) * 1998-11-09 2001-01-11 Tokyo Electron Ltd Processing apparatus
WO2001049894A1 (en) * 2000-01-03 2001-07-12 Skion Corporation Multi wafer introduction/single wafer conveyor mode processing system and method of processing wafers using the same
JP2007242648A (ja) * 2006-03-04 2007-09-20 Masato Toshima 基板の処理装置
US9117870B2 (en) * 2008-03-27 2015-08-25 Lam Research Corporation High throughput cleaner chamber
KR20100077696A (ko) * 2008-12-29 2010-07-08 주식회사 케이씨텍 프로세스 모듈 및 이를 구비하는 원자층 증착장치
JP5181100B2 (ja) 2009-04-09 2013-04-10 東京エレクトロン株式会社 基板処理装置、基板処理方法及び記憶媒体
JP2010287745A (ja) * 2009-06-11 2010-12-24 Tokyo Electron Ltd 搬送モジュール

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4886592A (en) * 1987-10-17 1989-12-12 Leybold Aktiengesellschaft Apparatus on the carousel principle for coating substrates
JPH05179428A (ja) * 1991-05-23 1993-07-20 Matsushita Electric Ind Co Ltd 薄膜形成装置
US6007675A (en) * 1996-07-09 1999-12-28 Gamma Precision Technology, Inc. Wafer transfer system and method of using the same
CN1409867A (zh) * 1999-06-29 2003-04-09 拉姆研究公司 设有晶片输送机械臂用嵌入座的大气压下晶片输送模件及其实施方法
CN101667520A (zh) * 2008-09-05 2010-03-10 东京毅力科创株式会社 基板载置机构、基板处理装置和基板载置机构的控制方法
CN103299413A (zh) * 2010-12-29 2013-09-11 Oc欧瑞康巴尔斯公司 真空处理设备和制造方法
CN103493180A (zh) * 2011-04-25 2014-01-01 应用材料公司 半导体基板处理系统

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111554597A (zh) * 2017-04-13 2020-08-18 三星显示有限公司 基板处理系统及基板搬送方法
CN111554597B (zh) * 2017-04-13 2023-08-29 三星显示有限公司 基板处理系统及基板搬送方法
CN113314448A (zh) * 2021-05-13 2021-08-27 长江存储科技有限责任公司 半导体传输设备及其控制方法

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