CN106028682A - PCB hole plating method - Google Patents
PCB hole plating method Download PDFInfo
- Publication number
- CN106028682A CN106028682A CN201610397264.4A CN201610397264A CN106028682A CN 106028682 A CN106028682 A CN 106028682A CN 201610397264 A CN201610397264 A CN 201610397264A CN 106028682 A CN106028682 A CN 106028682A
- Authority
- CN
- China
- Prior art keywords
- plated hole
- plated
- hole
- pcb
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
- H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
The invention discloses a PCB hole plating method, which comprises the following steps of (a) full plate electroplating; (b) plated film manufacturing, namely manufacturing a plated film at the position corresponding to a to-be-plated hole and making the radius of a plated pattern on the plated film 0.075mm smaller than that of the to-be-plated hole; (c) hole plating; (d) pattern electroplating after outer layer line pattern manufacturing; and (e) secondary outer layer line pattern manufacturing after nickel-plated surface treatment and manufacturing a nickel surface after dry film protection surface treatment on the surface of a circuit board. The radius of the pattern of the plated film is manufactured to be 0.075mm smaller than that of the to-be-plated hole; the convex plating condition on the outer side of the hole is prevented; and surface copper is smooth, so that the problem of undering etching caused by an uneven coating is solved. The convex plating condition does not exist, so that the procedure of plate grinding through an abrasive belt is also reduced; the problem of an uneven thickness of the surface copper caused by plate grinding is solved; the hole plating process is optimized; the production cost is reduced; and meanwhile, the problems of excessive plate grinding of a hole opening caused by plate grinding and a grinding crack existing on the copper surface after plate grinding are solved.
Description
Technical field
The invention belongs to printed circuit board production technical field, relate in particular to a kind of PCB plated hole side
Method.
Background technology
It is coating or laminating media layer on the plate face have " central layer " that circuit board producer manufactures multi-layer PCB board
(or resin coated copper foil) also forms micro-via and forms.What these were formed at " central layer " upper lamination micro-leads
Through hole prepares with photic method, plasma method, laser method and the methods such as method that sandblast.Multi-layer PCB
These micro-vias of wiring board to realize electric interconnection between PCB layer by hole metallization and electro-coppering, with
Time make the copper thickness in through hole or blind hole reach requirement model by the way of through hole or blind hole are used plated hole
Enclose, the most face to face the thickness requirement of copper and hole copper close to time, it is to avoid face copper is blocked up and hole copper thickness is not enough,
Cause etch issues.
In existing plated hole technique, the film is typically designed the monolateral big 0.1mm than hole that windows, additionally, due to plated hole
There is convex plating phenomenon outside metapore position, need to be polishing to equal with plate face after moving back film, otherwise carrying out
During line pattern transfer, protruding copper facing will certainly affect the laminating effect of dry film and cause plating problem.
Polishing need to use amary tape grinding machine, and abrasive belt grinding can exist the uneven copper thickness ununiformity caused of nog plate,
There is also aperture nog plate problem of copper face polishing scratch print excessively and after nog plate.
Summary of the invention
To this end, the present invention really to solve above-mentioned technical problem, thus a kind of plate face copper thickness uniformity is proposed
Well, without the PCB plated hole method of plating situation.
For solving above-mentioned technical problem, the technical scheme is that
The present invention provides a kind of PCB plated hole method, and it comprises the steps:
A, electric plating of whole board;
B, the plated hole film make, and correspondence treats that the position of plated hole makes the plated hole film, and the described plated hole film plates
The radius little 0.075mm of pore radius more to be plated of hole pattern;
C, plated hole;
Graphic plating after d, outer-layer circuit graphic making;
Second time outer-layer circuit graphic making after the process of e, nickel plating surface, makes dry film in PCB surface and protects
Protect nickel face.
As preferably, in described step c, the technological parameter of plated hole is: electric current density 1ASD, the plated hole time
For 120min.
As preferably, the copper layer thickness of plated hole is not less than 15 μm, and plated hole metapore copper gross thickness is not less than 21
μm。
As preferably, the technological parameter that described nickel plating surface processes is: electric current density 1.6ASD, during plating
Between be 18min, the nickel layer thickness obtained is 3.8-5 μm.
As preferably, graphic plating described in described step d is copper plate.
As preferably, after described step e, also include that outer-layer circuit etches, takes off the operation of dry film.
As preferably, described in treat that the aperture of plated hole is at least 0.3mm.
The technique scheme of the present invention has the advantage that compared to existing technology
(1) PCB plated hole method of the present invention, it comprises the steps: a, electric plating of whole board;b、
The plated hole film makes, and correspondence treats that the position of plated hole makes the plated hole film, plated hole figure on the described plated hole film
The radius little 0.075mm of pore radius more to be plated;C, plated hole;Graphic plating after d, outer-layer circuit graphic making;
Second time outer-layer circuit graphic making after the process of e, nickel plating surface, makes dry film protection nickel in PCB surface
Face.By being that radius is compared with treating the little 0.075mm of plated hole by plated hole film graphic making, it is therefore prevented that convex outside hole
Plating situation so that face copper is smooth, thus solve the unclean problem of etching caused because of uneven coating.Due to
There is not convex plating situation, also reduce the operation of abrasive belt grinding, improve the face copper thickness caused because of nog plate
Uneven problem, optimizes plated hole flow process, reduces production cost.Improve nog plate simultaneously and cause aperture
The problem that nog plate is excessively and after nog plate, copper face exists polishing scratch.
Detailed description of the invention
Embodiment
The present embodiment provides a kind of PCB plated hole method, and it comprises the steps:
A, front operation, carry out pressing, inner line figure making, in the present embodiment, line in conventional manner
Road plate plate vitrification point is 170 DEG C, and core material thickness is 0.76mm, and after pressing, thickness of slab is 5.5mm,
Using conventional method to carry out electric plating of whole board, plate face table copper thickness is not less than 25 μm;
B, the plated hole film make, and correspondence treats that the position of plated hole makes the plated hole film, described in treat the aperture of plated hole
At least 0.3mm, the radius little 0.075mm of pore radius more to be plated of plated hole figure on the described plated hole film;
C, plated hole, plated hole 120min under electric current density 1ASD, the hole copper thickness of plating is not less than 15 μm,
Plated hole metapore copper gross thickness is not less than 21 μm, after plated hole terminates, takes off except mask;
Graphic plating, only copper plate after d, in conventional manner making wiring board outer-layer circuit figure: at electric current
Under density 0.5ASD, electroplating 30min, in making circuit and hole, copper thickness reaches requirement;
E, nickel plating surface process, with the electric current density electronickelling 18min of 1.6ASD, the nickel layer thickness obtained
For 3.8-5 μm, the present embodiment is 4 μm, then carries out second time outer-layer circuit graphic making, online
Plate surface, road makes dry film protection nickel face, as disposable embodiment, it is also possible to select other conventional
Means carry out surface process,.
Use conventional method to carry out outer-layer circuit etching afterwards, produce outer-layer circuit figure, and will protection
The dry film in nickel face is removed, and after the performance of detection wiring board, gong goes out profile, then carries out subsequent handling.
The present embodiment is by being made as compared with the little 0.075mm of band plated hole by the radius of plated hole film figure, it is therefore prevented that
Convex plating situation outside hole so that face copper is smooth, thus it is the cleanest to solve the etching caused because of uneven coating
Problem.Owing to there is not convex plating situation, also reduce the operation of abrasive belt grinding, improve because nog plate causes
The uneven problem of face copper thickness, optimize plated hole flow process, reduce production cost.Improve mill simultaneously
The problem that plate causes aperture nog plate excessively and after nog plate, copper face exists polishing scratch.
Obviously, above-described embodiment is only for clearly demonstrating example, and not to embodiment
Restriction.For those of ordinary skill in the field, can also do on the basis of the above description
Go out change or the variation of other multi-form.Here without also all of embodiment being given thoroughly
Lift.And the obvious change thus extended out or variation are still in the protection domain of the invention
Among.
Claims (7)
1. a PCB plated hole method, it is characterised in that comprise the steps:
A, electric plating of whole board;
B, the plated hole film make, and correspondence treats that the position of plated hole makes the plated hole film, and the described plated hole film plates
The radius little 0.075mm of pore radius more to be plated of hole pattern;
C, plated hole;
Graphic plating after d, outer-layer circuit graphic making;
Second time outer-layer circuit graphic making after the process of e, nickel plating surface, makes dry film in PCB surface and protects
Protect nickel face.
PCB plated hole method the most according to claim 1, it is characterised in that plated hole in described step c
Technological parameter be: electric current density 1ASD, the plated hole time is 120min.
PCB plated hole method the most according to claim 2, it is characterised in that the copper layer thickness of plated hole is not
Less than 15 μm, plated hole metapore copper gross thickness is not less than 21 μm.
PCB plated hole method the most according to claim 3, it is characterised in that described nickel plating surface processes
Technological parameter be: electric current density 1.6ASD, electroplating time is 18min, and the nickel layer thickness obtained is 3.8-5
μm。
PCB plated hole method the most according to claim 5, it is characterised in that described in described step d
Graphic plating is copper plate.
PCB plated hole method the most according to claim 5, it is characterised in that also wrap after described step e
Include outer-layer circuit and etch, take off the operation of dry film.
PCB plated hole method the most according to claim 6, it is characterised in that described in treat the aperture of plated hole
At least 0.3mm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610397264.4A CN106028682B (en) | 2016-06-07 | 2016-06-07 | A kind of PCB plated hole method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610397264.4A CN106028682B (en) | 2016-06-07 | 2016-06-07 | A kind of PCB plated hole method |
Publications (2)
Publication Number | Publication Date |
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CN106028682A true CN106028682A (en) | 2016-10-12 |
CN106028682B CN106028682B (en) | 2019-04-02 |
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CN201610397264.4A Active CN106028682B (en) | 2016-06-07 | 2016-06-07 | A kind of PCB plated hole method |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109548302A (en) * | 2018-11-14 | 2019-03-29 | 深圳崇达多层线路板有限公司 | A kind of production method of the wiring board with thick copper hole |
CN110831351A (en) * | 2019-10-12 | 2020-02-21 | 西安金百泽电路科技有限公司 | Method for manufacturing plated hole film of large-aperture hole copper PCB |
CN113411991A (en) * | 2021-04-29 | 2021-09-17 | 广州美维电子有限公司 | Method for transferring pattern of PCB to align target |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104349589A (en) * | 2013-08-02 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing methods of printed circuit board and plate hole of printed circuit board |
CN104349587A (en) * | 2013-07-31 | 2015-02-11 | 北大方正集团有限公司 | Method for manufacturing printed circuit board and via thereof, and printed circuit board |
-
2016
- 2016-06-07 CN CN201610397264.4A patent/CN106028682B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104349587A (en) * | 2013-07-31 | 2015-02-11 | 北大方正集团有限公司 | Method for manufacturing printed circuit board and via thereof, and printed circuit board |
CN104349589A (en) * | 2013-08-02 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing methods of printed circuit board and plate hole of printed circuit board |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109548302A (en) * | 2018-11-14 | 2019-03-29 | 深圳崇达多层线路板有限公司 | A kind of production method of the wiring board with thick copper hole |
CN110831351A (en) * | 2019-10-12 | 2020-02-21 | 西安金百泽电路科技有限公司 | Method for manufacturing plated hole film of large-aperture hole copper PCB |
CN113411991A (en) * | 2021-04-29 | 2021-09-17 | 广州美维电子有限公司 | Method for transferring pattern of PCB to align target |
Also Published As
Publication number | Publication date |
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CN106028682B (en) | 2019-04-02 |
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