CN106028682B - A kind of PCB plated hole method - Google Patents

A kind of PCB plated hole method Download PDF

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Publication number
CN106028682B
CN106028682B CN201610397264.4A CN201610397264A CN106028682B CN 106028682 B CN106028682 B CN 106028682B CN 201610397264 A CN201610397264 A CN 201610397264A CN 106028682 B CN106028682 B CN 106028682B
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China
Prior art keywords
plated hole
plated
hole
plating
film
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CN201610397264.4A
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Chinese (zh)
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CN106028682A (en
Inventor
张义兵
张华勇
陈勇武
毛生毕
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Jiangmen Suntak Circuit Technology Co Ltd
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Jiangmen Suntak Circuit Technology Co Ltd
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Priority to CN201610397264.4A priority Critical patent/CN106028682B/en
Publication of CN106028682A publication Critical patent/CN106028682A/en
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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0723Electroplating, e.g. finish plating

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

The invention discloses a kind of PCB plated hole methods comprising following steps: a, electric plating of whole board;B, the plated hole film makes, and the corresponding position to plated hole makes the plated hole film, and the small 0.075mm of radius pore radius more to be plated of hole pattern is plated on the plated hole film;C, plated hole;D, graphic plating after outer-layer circuit graphic making;E, second of outer-layer circuit graphic making after nickel plating surface processing, assist side surface make the nickel face after dry film protection surface treatment.By being made as plated hole film figure radius compared with to the small 0.075mm of plated hole, it is therefore prevented that the convex plating situation on the outside of hole, so that face copper is smooth, so that etching caused by solving the problems, such as because of uneven coating is not clean.Since there is no convex plating situation, the process of abrasive belt grinding is also reduced, the problem of face copper thickness unevenness, optimizes plated hole process caused by improving because of nog plate, production cost is reduced, while improving copper face after nog plate causes aperture nog plate excessive and nog plate and there are problems that polishing scratch.

Description

A kind of PCB plated hole method
Technical field
The invention belongs to printed circuit board production technical fields, relate in particular to a kind of PCB plated hole method.
Background technique
Circuit board producer manufacture multi-layer PCB board is that coating or laminating media layer (or are resinized in the plate face for having " core plate " Copper foil) and form micro-via and form.These on " core plate " lamination and the micro-via that is formed is with photic method, plasma Method, laser method and the methods of the method that sandblasts are come obtained.These micro-vias of multi-layer PCB wiring board will pass through hole metallization and plating Copper realizes electric interconnection between PCB layer, at the same to through-hole or blind hole using plated hole by way of make copper in through-hole or blind hole Thickness reaches claimed range, when especially the thickness requirement of copper and hole copper is close face to face, avoid face copper blocked up and hole copper thickness not Foot, causes etch issues.
In existing plated hole technique, the film is typically designed windowing big 0.1mm more unilateral than hole, on the outside of hole location after plated hole There are convex plating phenomenon, need to be polishing to after moving back film it is equal with plate face, otherwise when carrying out line pattern transfer, raised plating Copper certainly will will affect the fitting effect of dry film and lead to plating problem.Amary tape grinding machine need to be used by polishing, and abrasive belt grinding meeting There are nog plate unevenly caused by copper thickness ununiformity, there is also aperture nog plate excessively and after nog plate copper face polishing scratch prints the problem of.
Summary of the invention
For this purpose, the present invention will really solve above-mentioned technical problem, thus propose a kind of plate face copper thickness uniformity it is good, without plating The PCB plated hole method of situation.
In order to solve the above technical problems, the technical solution of the present invention is as follows:
The present invention provides a kind of PCB plated hole method comprising following steps:
A, electric plating of whole board;
B, the plated hole film makes, and the corresponding position to plated hole makes the plated hole film, plates hole pattern on the plated hole film The small 0.075mm of radius pore radius more to be plated;
C, plated hole;
D, graphic plating after outer-layer circuit graphic making;
E, second of outer-layer circuit graphic making after nickel plating surface processing, assist side surface makes dry film and protects nickel face.
Preferably, in the step c plated hole technological parameter are as follows: current density 1ASD, the plated hole time be 120min.
Preferably, the copper layer thickness of plated hole is not less than 15 μm, plated hole metapore copper overall thickness is not less than 21 μm.
Preferably, the technological parameter of the nickel plating surface processing are as follows: current density 1.6ASD, electroplating time 18min, Obtained nickel layer thickness is 3.8-5 μm.
Preferably, graphic plating described in the step d is copper plate.
Preferably, further including outer-layer circuit etching, the process for taking off dry film after the step e.
Preferably, the aperture to plated hole is at least 0.3mm.
The above technical solution of the present invention has the following advantages over the prior art:
(1) PCB plated hole method of the present invention comprising following steps: a, electric plating of whole board;B, the plated hole film makes, The corresponding position to plated hole makes the plated hole film, and the radius that hole pattern is plated on the plated hole film is small compared with pore radius to be plated 0.075mm;C, plated hole;D, graphic plating after outer-layer circuit graphic making;E, second of outer-layer circuit figure after nickel plating surface processing Shape is made, and assist side surface makes dry film and protects nickel face.By being that radius is small compared with to plated hole by plated hole film graphic making 0.075mm, it is therefore prevented that the convex plating situation on the outside of hole, so that face copper is smooth, to etch not caused by solving because of uneven coating Net problem.Since there is no convex plating situation, the process of abrasive belt grinding is also reduced, face copper thickness is not caused by improving because of nog plate Equal problem optimizes plated hole process, reduces production cost.Improving nog plate simultaneously causes aperture nog plate excessively and after nog plate There is polishing scratch in copper face.
Specific embodiment
Embodiment
The present embodiment provides a kind of PCB plated hole methods comprising following steps:
A, preceding process is pressed, inner line figure production in conventional manner, in the present embodiment, wiring board plate glass Glass temperature is 170 DEG C, and core material is with a thickness of 0.76mm, and plate thickness is 5.5mm after pressing, carries out full plate electricity using conventional method Plating, surface copper thickness are not less than 25 μm;
B, the plated hole film makes, and the corresponding position to plated hole makes the plated hole film, and the aperture to plated hole is at least 0.3mm plates the small 0.075mm of radius pore radius more to be plated of hole pattern on the plated hole film;
C, the hole copper thickness of plated hole, the plated hole 120min at current density 1ASD, plating is not less than 15 μm, and plated hole metapore copper is total Thickness is not less than 21 μm, after plated hole, takes off except exposure mask;
D, graphic plating after wiring board outer-layer circuit figure, only copper plate: in current density are made in conventional manner Under 0.5ASD, 30min is electroplated, copper thickness in route and hole is made to reach requirement;
E, nickel plating surface is handled, and with the current density electronickelling 18min of 1.6ASD, obtained nickel layer thickness is 3.8-5 μm, It is 4 μm in the present embodiment, then carries out second of outer-layer circuit graphic making, assist side surface makes dry film and protects nickel face, As disposable embodiment, it is also an option that other conventional means are surface-treated,.
Outer-layer circuit etching is carried out using conventional method later, produces outer-layer circuit figure, and the dry of nickel face will be protected Film removes, and after the performance for detecting wiring board, gong goes out shape, then carries out subsequent handling.
The present embodiment is by being made as the radius of plated hole film figure compared with the band small 0.075mm of plated hole, it is therefore prevented that on the outside of hole Convex plating situation so that face copper is smooth, so that etching caused by solving the problems, such as because of uneven coating is not clean.Since there is no convex plating Situation also reduces the process of abrasive belt grinding, and the problem of face copper thickness unevenness, optimizes plated hole stream caused by improving because of nog plate Journey reduces production cost.Improving copper face after nog plate causes aperture nog plate excessive and nog plate simultaneously has polishing scratch.
Obviously, the above embodiments are merely examples for clarifying the description, and does not limit the embodiments.It is right For those of ordinary skill in the art, can also make on the basis of the above description it is other it is various forms of variation or It changes.There is no necessity and possibility to exhaust all the enbodiments.And it is extended from this it is obvious variation or It changes still within the protection scope of the invention.

Claims (3)

1. a kind of PCB plated hole method, which comprises the steps of:
A, electric plating of whole board;
B, the plated hole film makes, and the corresponding position to plated hole makes the plated hole film, and the radius of hole pattern is plated on the plated hole film The small 0.075mm of pore radius more to be plated;
C, plated hole;
D, graphic plating after outer-layer circuit graphic making;
E, second of outer-layer circuit graphic making after nickel plating surface processing, assist side surface makes dry film and protects nickel face;
The technological parameter of plated hole in the step c are as follows: current density 1ASD, plated hole time are 120min;
The copper layer thickness of plated hole is not less than 15 μm, and plated hole metapore copper overall thickness is not less than 21 μm;
The technological parameter of the nickel plating surface processing are as follows: current density 1.6ASD, electroplating time 18min, obtained nickel layer are thick Degree is 3.8-5 μm;
The aperture to plated hole is at least 0.3mm.
2. PCB plated hole method according to claim 1, which is characterized in that graphic plating described in the step d is copper facing Layer.
3. PCB plated hole method according to claim 2, which is characterized in that further include outer-layer circuit erosion after the step e The process for carving, taking off dry film.
CN201610397264.4A 2016-06-07 2016-06-07 A kind of PCB plated hole method Active CN106028682B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610397264.4A CN106028682B (en) 2016-06-07 2016-06-07 A kind of PCB plated hole method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610397264.4A CN106028682B (en) 2016-06-07 2016-06-07 A kind of PCB plated hole method

Publications (2)

Publication Number Publication Date
CN106028682A CN106028682A (en) 2016-10-12
CN106028682B true CN106028682B (en) 2019-04-02

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109548302A (en) * 2018-11-14 2019-03-29 深圳崇达多层线路板有限公司 A kind of production method of the wiring board with thick copper hole
CN110831351A (en) * 2019-10-12 2020-02-21 西安金百泽电路科技有限公司 Method for manufacturing plated hole film of large-aperture hole copper PCB
CN113411991B (en) * 2021-04-29 2024-06-21 广州美维电子有限公司 PCB pattern transfer alignment target method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104349587A (en) * 2013-07-31 2015-02-11 北大方正集团有限公司 Method for manufacturing printed circuit board and via thereof, and printed circuit board
CN104349589A (en) * 2013-08-02 2015-02-11 北大方正集团有限公司 Printed circuit board and manufacturing methods of printed circuit board and plate hole of printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104349587A (en) * 2013-07-31 2015-02-11 北大方正集团有限公司 Method for manufacturing printed circuit board and via thereof, and printed circuit board
CN104349589A (en) * 2013-08-02 2015-02-11 北大方正集团有限公司 Printed circuit board and manufacturing methods of printed circuit board and plate hole of printed circuit board

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Publication number Publication date
CN106028682A (en) 2016-10-12

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