CN106027011B - Based on parasitic inductance electric current detecting method and its application - Google Patents

Based on parasitic inductance electric current detecting method and its application Download PDF

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CN106027011B
CN106027011B CN201610343220.3A CN201610343220A CN106027011B CN 106027011 B CN106027011 B CN 106027011B CN 201610343220 A CN201610343220 A CN 201610343220A CN 106027011 B CN106027011 B CN 106027011B
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circuit
switching tube
grid
resistance
gate
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CN106027011A (en
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朱梓悦
秦海鸿
聂新
徐华娟
付大丰
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Nanjing University of Aeronautics and Astronautics
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Nanjing University of Aeronautics and Astronautics
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0822Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0814Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
    • H03K17/08142Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in field-effect transistor switches

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Abstract

It is proposed by the present invention to be based on parasitic inductance electric current detecting method and its application, judge whether overcurrent by the voltage signal at detection switch pipe source lead to the parasitic inductance both ends of line between Power Groud, overcurrent turn-off function instruction is sent by logic control circuit, while overcurrent condition occurs, by the gate-source voltage of grid voltage clamp circuit limit switch pipe with protective switch pipe, soft turn-off function is gathered simultaneously, slow down the speed of overcurrent turn-off function, reduce the due to voltage spikes of shutdown moment, while realizing the rapidity of SiC device short-circuit protection, reduce EMI problem.

Description

Based on parasitic inductance electric current detecting method and its application
Technical field
The present invention proposes a kind of novel current foldback circuit suitable for SiC device, is related to based on parasitic inductance electric current The quick detection protection circuit for detecting and gathering overcurrent soft turn-off function, belongs to power electronic equipment field technology.
Background technique
In recent years, the advantages such as SiC device, switching speed fast, high temperature high voltage resistant low with its conducting resistance, which become, improves power The ideal component of transducer effciency and power density.However, lacking quick, reliable overcurrent protection electricity in actual application Road.
Compared with Si device, the chip area of SiC device is smaller, and current density is higher, and short-circuit ability to bear is lower.For It is encapsulated as the SiC MOSFET of TO-247, in the case where busbar voltage is 700V, driving positive pressure is+18V, the time is born in short circuit Only between 8~10 μ s.And since the channel mobility of SiC MOSFET is in positive temperature coefficient, when overcurrent occurs, SiC MOSFET junction temperature rapid increase, channel mobility increase, and the electric current that hourglass source electrode flows through is bigger, accelerates the thermal breakdown of device.Cause This, in order to make SiC MOSFET work in safety zone, the reaction speed of current foldback circuit needs to reach higher requirement.
Other than it may cause thermal breakdown, overcurrent also will affect the reliability of SiC device.In order to realize quick open-minded, SiC The driving positive pressure of MOSFET is usually more than+20V, and short circuit current is bigger when driving positive pressure is higher to lead to short trouble, short circuit It is shorter to bear the time;And driving positive pressure is higher so that the increase of gate electric field intensity, influences the reliability of grid oxic horizon.
Since the junction capacity of SiC device is smaller, switching speed is higher, turns on and off the di/dt and dv/dt of moment more Height, the mutual conductance of SiC device are in positive temperature coefficient, turn on and off the di/dt and dv/dt of moment also can with junction temperature raising after Continuous to increase, switching tube junction temperature increases rapidly when current foldback circuit, if rapidly switching off switching tube at this time, shutdown moment Dv/dt and di/dt can be higher, so that EMI problem is more serious, so needing between the reaction speed and EMI of current foldback circuit Compromise consideration.
A kind of solid circuit breaker circuit that the current foldback circuit of known SiC device is made of chip I R2127.Benefit Detect over-current phenomenon avoidance with the principle that dramatically increases of voltage on FET when overload, but this method in transcient short circuit time due in chip The logical time delay in portion limits the reaction speed of its overcurrent protection.The current foldback circuit of SiC device known to another kind is deficient Saturation detection circuit triggers current foldback circuit using the characteristic that SiC device when overcurrent exits saturation region, but this method is uncomfortable For the SiC MOSFET that saturation region is not obvious, and this method noise immunity under high switching frequency is poor, easily occurs accidentally to touch It was found that as.
In order to make full use of the switching characteristic of SiC, while realizing the rapidity of SiC device short-circuit protection, EMI is taken into account The problem of, soft switching is realized to reduce due to voltage spikes caused by the high di/dt of shutdown moment, switching tube both ends when reducing failure shutdown Voltage stress, the invention proposes it is a kind of gather soft turn-off function the overcurrent protection based on parasitic inductance electric current detecting method Circuit.
Summary of the invention
In view of the above-mentioned problems, it is an object of the invention to propose a kind of overcurrent protection electricity based on parasitic inductance current detecting Drain current is detected using parasitic inductance present on the lead between switching tube drain lead and Power Groud, and is being detected in road Soft turn-off function is realized when to overcurrent, realizes the protection of switch tube.
The present invention adopts the following technical scheme that for achieving the above object
Based on parasitic inductance electric current detecting method, this method is by detection SiC switching tube drain lead between Power Groud The voltage signal at the parasitic inductance both ends of line calculates the size of drain current, judges whether overcurrent.
This method is based on SiC switching tube drain current testing circuit, specifically: the switching tube Q1Source lead is S, source Pole pin S to the parasitic inductance L between Power GroudS(ext);Parasitic inductance, that is, leakage inductance electricity of the source lead to line between Power Groud Pressure test point is K, and the wiring parasitic inductance between the test point K and source lead S is LK;The switching tube Q1It is posted inside source electrode Raw inductance is LS(int);The switching tube Q1Parasitic gate resistance is Ri, parasitic gate inductance LG, the switching tube Q1In drain electrode Portion's parasitic inductance is LD(int);The electric current for flowing through grid source electrode circuit is iG, drain current iD
SiC MOSFET current foldback circuit based on parasitic inductance electric current detecting method, which includes sequentially connected Over-current detection circuit, logic control circuit, grid voltage clamp circuit and soft breaking circuit, the current foldback circuit include inspection Switching tube is surveyed, the source electrode of the detection switch pipe connects Power Groud, and grid accesses grid voltage clamp circuit and soft breaking circuit;It will Over-current signal is sent to logic control circuit and generates overcurrent turn-off function instruction, passes through the grid of grid voltage clamp circuit limit switch pipe Source voltage triggers soft breaking circuit with protective switch pipe, slows down the speed of failure overcurrent turn-off function.
The logic control circuit includes detection capacitor CdWith charging resistor Rd, the charging resistor RdOne termination Power Groud, Other end connecting detection capacitor CdOne end and logic control circuit input terminal;The detection capacitor CdAnother termination detection Switching tube Q1Source electrode.
The logic control circuit includes hysteresis comparator, AND gate circuit and d type flip flop;The input of the hysteresis comparator End is the input terminal of logic control circuit, is connected to detection circuit, and output end is connected to input terminal and the D touching of AND gate circuit Send out the clear terminal of device;Another input of the AND gate circuit is PWM input signal VIN, output end, which is connected to, controls D triggering The clock signal clk of device;The output end of the d type flip flop is connected to grid voltage clamp circuit and soft breaking circuit.
The grid voltage clamp circuit includes third switching tube M3, zener diode D1With discharge capacity C1;The third Switching tube M3By the output signal control of d type flip flop in logic control circuit, source electrode is connected to control ground VGND, drain electrode connection Discharge capacity C1;The discharge capacity C1Shunt regulator diode D1, the grid of other end connecting detection switching tube.
The soft breaking circuit includes second switch M2, buffering capacitor C2With buffer resistance R4, soft switching resistance R3, on Pull-up resistor R1, first switch tube M1, the 4th switching tube M4, the 5th switching tube M5, driving resistance R2And logic gate;Wherein, described Drive resistance R2Driving resistance when for normal switch drives resistance R2The grid soft switching resistance of one end connecting detection switching tube R3One end, the other end connect the 4th switching tube M4, the 5th switching tube M5Drain electrode;The soft switching resistance R3The other end connect Meet second switch M2Drain electrode;The second switch M2Source electrode ground connection, grid connect buffer resistance R4One end and slow Rush capacitor C2One end;The buffer resistance R4The other end connection logic control circuit output end, the buffering capacitor C2's The other end connects third switching tube M3Source electrode and first switch tube M1Source electrode and control ground VGND;The first switch tube M1Drain electrode connection NAND gate, with the input terminal and pull-up resistor R of door1One end;VccAnd VeeIt respectively drives positive pressure and bears Pressure, is separately connected the 4th switching tube M4, the 5th switching tube M5Source electrode;4th switching tube M4, the 5th switching tube M5Grid difference Output end, the output end with door for being connected to NAND gate;VINFor PWM input signal, it is connected to NOT gate, the input terminal control with door Switching tube normally turns on and off.
The invention adopts the above technical scheme compared with prior art, has following technical effect that
The present invention proposes a kind of novel current foldback circuit based on parasitic inductance electric current detecting method, can be applied to SiC In the protection circuit of device, method is detected and controlled by simple and easy, failure electricity can be detected with faster reaction speed Stream, and turned off by soft breaking circuit with slower speed, reduce the drain current climbing of shutdown moment, avoids due to overcurrent When bring high drain current climbing generate very big induced voltage in parasitic inductance, reduce the electricity that SiC device is born The safety of SiC device is protected at pointing peak.
Detailed description of the invention
Below with reference to attached drawing, the invention will be further described:
Fig. 1 is the drain current testing circuit schematic diagram of the invention based on parasitic inductance electric current detecting method;
Fig. 2 is the SiC MOSFET current foldback circuit proposed by the invention based on parasitic inductance electric current detecting method Figure;
Fig. 3 is the waveform diagram that circuit is protected when over current fault of the invention occurs.
Specific embodiment
The present invention, which provides, is based on parasitic inductance electric current detecting method and its application, to make the purpose of the present invention, technical solution And effect is clearer, it is clear, and referring to attached drawing and give an actual example that the present invention is described in more detail.It should be appreciated that herein Described specific implementation is not intended to limit the present invention only to explain the present invention.
As shown in Figure 1, provided by the invention be based on parasitic inductance electric current detecting method, this method passes through detection SiC switch Pipe source lead calculates the size of drain current to the voltage signal at the parasitic inductance both ends of line between Power Groud, and judgement is No overcurrent.This method is based on SiC switching tube drain current testing circuit, specifically: the switching tube Q1Source lead is S, source Pole pin S to the parasitic inductance L between Power GroudS(ext);Drain voltage test point is K, between the test point K and source lead S Wiring parasitic inductance be LK;The switching tube Q1Source electrode endophyte inductance is LS(int);The switching tube Q1Parasitic gate electricity Resistance is Ri, parasitic gate inductance LG, the switching tube Q1Drain electrode endophyte inductance is LD(int);Flow through the electricity in grid source electrode circuit Stream is iG, drain current iD
Fig. 1 is SiC switch mosfet pipe Q1Parasitic inductance electric current detecting method, that is, pass through detection switch pipe Q1Source electrode draws Parasitic inductance L between foot S to Power Groud GNDS(ext)The voltage at both ends can be detected the size of drain current.Wherein, it switchs Pipe Q1Source lead is S, LS(ext)It is it to the parasitic inductance between Power Groud GND, wherein K is leakage inductance voltage detecting point, LKFor K Issuable wiring parasitic inductance, L between SS(int)For switching tube Q1Source electrode endophyte inductance, RiFor parasitic gate electricity Resistance, LGFor parasitic gate inductance, LD(int)For switching tube drain electrode endophyte inductance.iGFor the electric current for flowing through grid source electrode circuit, iD For drain current.
Voltage between S and Power Groud GND can indicate are as follows:
Wherein, LKThe caused parasitic inductance between source electrode test point K and source lead S, due to LKWith source lead parasitism Inductance LS(ext)Compared to much smaller, it is possible to ignore, it may be assumed that
Then LS(ext)The drain current climbing di that oscillograph is recorded when can be by the way that short circuit occursD/ dt and vKSAnd calculating It obtains, it may be assumed that
SiC MOSFET current foldback circuit provided by the invention based on parasitic inductance electric current detecting method, the circuit packet Sequentially connected over-current detection circuit, logic control circuit, grid voltage clamp circuit and soft breaking circuit are included, the overcurrent is protected Protection circuit includes detection switch pipe, and the source electrode of the detection switch pipe connects Power Groud, grid access grid voltage clamp circuit and Soft breaking circuit;Over-current signal is sent to logic control circuit and generates overcurrent turn-off function instruction, passes through grid voltage clamp circuit The gate-source voltage of limit switch pipe triggers soft breaking circuit with protective switch pipe, slows down the speed of failure overcurrent turn-off function.
The logic control circuit includes detection capacitor CdWith charging resistor Rd, the charging resistor RdOne termination Power Groud, Other end connecting detection capacitor CdOne end and logic control circuit input terminal;The detection capacitor CdAnother termination detection Switching tube Q1Source electrode.
The logic control circuit includes hysteresis comparator, AND gate circuit and d type flip flop;The input of the hysteresis comparator End is the input terminal of logic control circuit, is connected to detection circuit, and output end is connected to input terminal and the D touching of AND gate circuit Send out the clear terminal of device;Another input of the AND gate circuit is PWM input signal VIN, output end, which is connected to, controls D triggering The clock signal clk of device;The output end of the d type flip flop is connected to grid voltage clamp circuit and soft breaking circuit.
The grid voltage clamp circuit includes third switching tube M3, zener diode D1With discharge capacity C1;The third Switching tube M3By the output signal control of d type flip flop in logic control circuit, source electrode is connected to soft breaking circuit, drain electrode connection Discharge capacity C1;The discharge capacity C1Shunt regulator diode D1, the grid of other end connecting detection switching tube.
The soft breaking circuit includes second switch M2, buffering capacitor C2With buffer resistance R4, soft switching resistance R3, on Pull-up resistor R1, first switch tube M1, the 4th switching tube M4, the 5th switching tube M5Drive resistance R2And logic gate;Wherein, the drive Dynamic resistance R2Driving resistance when for normal switch drives resistance R2The grid soft switching resistance R of one end connecting detection switching tube3 One end, the other end connect the 4th switching tube M4, the 5th switching tube M5Drain electrode;The soft switching resistance R3The other end connection Second switch M2Drain electrode;The second switch M2Source electrode connect control ground VGND, grid connection buffer resistance R4One end And buffering capacitor C2One end;The buffer resistance R4The other end connection logic control circuit output end, the buffering capacitor C2The other end connect third switching tube M3Source electrode and first switch tube M1Source electrode and control ground VGND;The first switch Pipe M1Drain electrode connection NAND gate, with the input terminal and pull-up resistor R of door1One end;VccAnd VeeRespectively driving positive pressure and Negative pressure is separately connected the 4th switching tube M4, the 5th switching tube M5Source electrode;4th switching tube M4, the 5th switching tube M5Grid point Output end, the output end with door for not being connected to NAND gate;VINFor PWM input signal, it is connected to NOT gate, the input terminal control with door Switching tube processed normally turns on and off.
Fig. 2 is the current foldback circuit schematic diagram proposed by the invention by taking SiC MOSFET as an example, switching tube Q1Mistake Stream protection circuit is made of four parts, i.e. over-current detection circuit, logic control circuit, grid voltage clamp circuit and soft switching Circuit.Wherein detection circuit is by detection capacitor CdWith charging resistor RdComposition, logic control circuit includes hysteresis comparator and door The input with door and the clear terminal of d type flip flop are given in the output of circuit and d type flip flop, hysteresis comparator, defeated with another of door Enter for PWM input signal VIN, the clock signal clk of d type flip flop is controlled with the output of door.Grid voltage clamp circuit includes switch Pipe M3, zener diode D1With discharge capacity C1, switching tube M3By the output signal control of d type flip flop in logic control circuit.It is soft Breaking circuit is by switching tube M2, buffering capacitor C2With buffer resistance R4, soft switching resistance R3With switching tube M1It constitutes, R2It is positive normally opened Driving resistance when pass, VccAnd VeeThe positive pressure and negative pressure respectively driven, R1For driving circuit pull-up resistor, VINFor PWM input Signal, control switch pipe normally turn on and off.
Over-current detection circuit is by detection capacitor CdWith charging resistor RdComposition detects capacitor CdOn voltage can indicate are as follows:
Then drain current iDCapacitor C can be passed throughdOn voltage voDetection is calculated and is obtained.If drain current i when openingDOut Existing overcurrent or short trouble, i.e., in t3Moment capacitor CdOn voltage voMore than the upper limit of hysteresis comparator in logic control circuit Value, then the output jump of hysteresis comparator is high level, then is high level with the output of door jump, triggers with exporting for door to D The clock pins of device, under the triggering of rising edge clock signal, the state output Q jump of d type flip flop is high level, i.e. logic control Circuit processed issues the high level signal of overcurrent or short trouble shutdown.
V in Fig. 3DSFor SiC MOSFET drain-source voltage across poles, iDFor drain current, vprotFor logic control circuit output Protect voltage signal, voTo detect capacitor CdOn voltage signal.Voff(th)For threshold voltage set in advance, in t0Moment, Drain current rises, voDetect the voltage signal that an amplitude increases, t1Moment, the size of this voltage signal are more than to set in advance The threshold voltage set, the drain current detected are more than safe range ID(max), in t2The output of moment logic control signal Q Voltage vprotIt begins to ramp up, in t3The gate-source voltage at moment, SiC MOSFET is clamped.
Under overcurrent or short trouble state, drain current rapid increase charges to the interelectrode capacity of grid source electrode, SiC The gate-source voltage of MOSFET can easily exceed gate-source voltage limiting value, easily lead to grid oxide layer breakdown or damage between grid source electrode It is bad.So overcurrent snap switch pipe grid source electrode over-voltage in order to prevent, in t3Moment logic control circuit issues high level signal vproAfterwards, the switching tube M in grid voltage clamp circuit3It is open-minded, capacitor C1Quick charge, so that the voltage between grid source electrode GS By diode D1Clamper is in vGS(max), the voltage between grid source electrode do not continue to rise.
While logic control circuit output is high level, i.e., in t3Moment, M1Also open-minded, i.e. two input nand gates The input of NAND2 and two and the input of door AND2 receive a low level, the switching tube M in totem pillar driving circuit4It closes immediately It is disconnected, switching tube M5Also it is held off, turns off buffer resistance R4To buffer capacitor C2Charging, charging time Δ t1=R4×C2, Postpone Δ t1After time, in t4Moment M2Open-minded, when having accessed one between grid source electrode at this time than normal switch driving resistance R2 Bigger driving resistance R3, so that SiC MOSFET is turned off with slower speed, high di/dt, which is acted on, when reducing due to overcurrent is posted Caused due to voltage spikes on raw inductance.
A kind of SiC device current foldback circuit based on parasitic inductance electric current detecting method proposed by the present invention, that is, pass through The voltage signal at detection switch pipe source lead to the parasitic inductance both ends of line between Power Groud judges whether overcurrent, by patrolling It collects control circuit and issues overcurrent turn-off function instruction, when overcurrent condition occurs, pass through grid voltage clamp circuit limit switch pipe Gate-source voltage triggers soft breaking circuit with protective switch pipe, slows down the speed of failure overcurrent turn-off function, reduces shutdown moment Due to voltage spikes, realize SiC device short-circuit protection rapidity while, the high di/dt of bring exists when avoiding due to overcurrent Very big induced voltage is generated in parasitic inductance, is reduced the due to voltage spikes born in SiC device, is protected the safety of SiC device.
The above, only for explaining simplified embodiment designed by the present invention, but protection scope of the present invention is not Be confined to this, anyone skilled in the art in the technical scope disclosed by the present invention, the change that can be readily occurred in Change or replace, should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with claim Subject to protection scope.

Claims (4)

1.SiC MOSFET current foldback circuit, which is characterized in that
Switching tube Q1Source lead is S, source lead S to the parasitic inductance between Power GroudL S(ext);Drain lead is to Power Groud Between line parasitic inductance, that is, leakage inductance voltage detecting point be K, the wiring parasitic inductance between the test point K and source lead S ForL K;The switching tube Q1Source electrode endophyte inductance isL S(int);The switching tube Q1Parasitic gate resistance isR i, parasitic gate Inductance isL G, the switching tube Q1Drain electrode endophyte inductance beL D(int);The electric current for flowing through grid source electrode circuit isi G, drain current Fori D
The circuit includes sequentially connected over-current detection circuit, logic control circuit, grid voltage clamp circuit and soft switching electricity Road, the current foldback circuit include detection switch pipe, and the source electrode of the detection switch pipe connects Power Groud, and grid accesses grid electricity Press clamp circuit and soft breaking circuit;Over-current signal is sent to logic control circuit and generates overcurrent turn-off function instruction, passes through grid The gate-source voltage of voltage clamp circuit limit switch pipe triggers soft breaking circuit with protective switch pipe, slows down failure mistake Flow the speed of shutdown;
The logic control circuit includes hysteresis comparator, AND gate circuit and d type flip flop;The input terminal of the hysteresis comparator is The input terminal of logic control circuit, is connected to detection circuit, and output end is connected to the input terminal and d type flip flop of AND gate circuit Clear terminal;Another input of the AND gate circuit is control switch pipe Q1PWM input signalV IN, output end is connected to Control the clock signal clk of d type flip flop;The output end of the d type flip flop is connected to grid voltage clamp circuit and soft switching electricity Road.
2. SiC MOSFET current foldback circuit according to claim 1, which is characterized in that the over-current detection circuit packet Include detection capacitorC dAnd charging resistorR d, the charging resistorR dOne termination Power Groud, other end connecting detection capacitorC dOne end And the input terminal of logic control circuit;The detection capacitorC dAnother termination detection switch pipe Q1Source electrode.
3. SiC MOSFET current foldback circuit according to claim 2, which is characterized in that the grid voltage clamper electricity Road includes third switching tubeM 3, zener diodeD 1And discharge capacityC 1;The third switching tubeM 3By D in logic control circuit The output signal of trigger controls, and source electrode is connected to control groundV GND, drain electrode connection discharge capacityC 1;The discharge capacityC 1And Join zener diodeD 1, the grid of other end connecting detection switching tube.
4. SiC MOSFET current foldback circuit according to claim 3, which is characterized in that the soft breaking circuit includes Second switchM 2, buffering capacitorC 2And buffer resistanceR 4, soft switching resistanceR 3, pull-up resistorR 1, first switch tubeM 1, the 4th open Guan GuanM 4, the 5th switching tubeM 5Drive resistanceR 2And with door, NOT gate;Wherein, the driving resistanceR 2Drive when for normal switch Dynamic resistance, drives resistanceR 2Grid, the soft switching resistance of one end connecting detection switching tubeR 3One end, other end connection the 4th opens Guan GuanM 4, the 5th switching tubeM 5Drain electrode;The soft switching resistanceR 3 The other end connect second switchM 2Drain electrode;It is described Second switchM 2Source electrode control groundV GND, grid connection buffer resistanceR 4One end and buffering capacitorC 2One end;It is described Buffer resistanceR 4The other end connection logic control circuit output end, the buffering capacitorC 2The other end connection third switch PipeM 3Source electrode and first switch tubeM 1Source electrode and control groundV GND;The first switch tubeM 1Drain electrode connection NAND gate, With the input terminal and pull-up resistor of doorR 1One end;V ccWithV eePositive pressure and negative pressure are respectively driven, the 4th switch is separately connected PipeM 4, the 5th switching tubeM 5Source electrode;4th switching tubeM 4, the 5th switching tubeM 5Grid be respectively connected to the output of NAND gate End, the output end with door;V INFor PWM input signal, it is connected to NOT gate, normally opens and closes with the input terminal control switch pipe of door It is disconnected.
CN201610343220.3A 2016-05-23 2016-05-23 Based on parasitic inductance electric current detecting method and its application Active CN106027011B (en)

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