CN105874601A - 通过Ge凝结进行的硅锗FinFET形成 - Google Patents

通过Ge凝结进行的硅锗FinFET形成 Download PDF

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Publication number
CN105874601A
CN105874601A CN201480071666.4A CN201480071666A CN105874601A CN 105874601 A CN105874601 A CN 105874601A CN 201480071666 A CN201480071666 A CN 201480071666A CN 105874601 A CN105874601 A CN 105874601A
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CN
China
Prior art keywords
semiconductor fin
amorphous
substrate
semiconductor
germanium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201480071666.4A
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English (en)
Chinese (zh)
Inventor
J·J·徐
V·马赫卡奥特桑
K·利姆
S·S·宋
C·F·耶普
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Priority to CN202010618057.3A priority Critical patent/CN111725069A/zh
Publication of CN105874601A publication Critical patent/CN105874601A/zh
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • H10D30/6211Fin field-effect transistors [FinFET] having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/796Arrangements for exerting mechanical stress on the crystal lattice of the channel regions having memorised stress for introducing strain in the channel regions, e.g. recrystallised polysilicon gates

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
CN201480071666.4A 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成 Pending CN105874601A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010618057.3A CN111725069A (zh) 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461923489P 2014-01-03 2014-01-03
US61/923,489 2014-01-03
US14/269,981 US9257556B2 (en) 2014-01-03 2014-05-05 Silicon germanium FinFET formation by Ge condensation
US14/269,981 2014-05-05
PCT/US2014/070579 WO2015102884A1 (en) 2014-01-03 2014-12-16 Silicon germanium finfet formation by ge condensation

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN202010618057.3A Division CN111725069A (zh) 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成

Publications (1)

Publication Number Publication Date
CN105874601A true CN105874601A (zh) 2016-08-17

Family

ID=52273600

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201480071666.4A Pending CN105874601A (zh) 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成
CN202010618057.3A Pending CN111725069A (zh) 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN202010618057.3A Pending CN111725069A (zh) 2014-01-03 2014-12-16 通过Ge凝结进行的硅锗FinFET形成

Country Status (5)

Country Link
US (1) US9257556B2 (enExample)
EP (1) EP3090448A1 (enExample)
JP (1) JP2017501586A (enExample)
CN (2) CN105874601A (enExample)
WO (1) WO2015102884A1 (enExample)

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CN111508844A (zh) * 2020-04-28 2020-08-07 上海华力集成电路制造有限公司 Fdsoi上锗硅鳍体的制作方法

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US9530776B2 (en) * 2014-01-17 2016-12-27 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET semiconductor device with germanium diffusion over silicon fins
US9245980B2 (en) * 2014-04-01 2016-01-26 Globalfoundries Inc. Methods of forming substantially defect-free, fully-strained silicon-germanium fins for a FinFET semiconductor device
US9379218B2 (en) * 2014-04-25 2016-06-28 International Business Machines Corporation Fin formation in fin field effect transistors
US9564326B2 (en) * 2014-07-17 2017-02-07 International Business Machines Corporation Lithography using interface reaction
US9293588B1 (en) 2014-08-28 2016-03-22 International Business Machines Corporation FinFET with a silicon germanium alloy channel and method of fabrication thereof
US9406803B2 (en) * 2014-12-29 2016-08-02 Globalfoundries Inc. FinFET device including a uniform silicon alloy fin
US9543441B2 (en) * 2015-03-11 2017-01-10 Globalfoundries Inc. Methods, apparatus and system for fabricating high performance finFET device
US9754941B2 (en) * 2015-06-03 2017-09-05 Globalfoundries Inc. Method and structure to form tensile strained SiGe fins and compressive strained SiGe fins on a same substrate
US9761667B2 (en) * 2015-07-30 2017-09-12 International Business Machines Corporation Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure
TWI655774B (zh) * 2015-08-12 2019-04-01 聯華電子股份有限公司 半導體元件及其製作方法
US10529717B2 (en) * 2015-09-25 2020-01-07 International Business Machines Corporation Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction
CN106558496B (zh) * 2015-09-29 2019-09-24 中国科学院微电子研究所 半导体器件制造方法
US11018254B2 (en) 2016-03-31 2021-05-25 International Business Machines Corporation Fabrication of vertical fin transistor with multiple threshold voltages
US9953883B2 (en) 2016-04-11 2018-04-24 Samsung Electronics Co., Ltd. Semiconductor device including a field effect transistor and method for manufacturing the same
US10079233B2 (en) 2016-09-28 2018-09-18 International Business Machines Corporation Semiconductor device and method of forming the semiconductor device
US10164103B2 (en) 2016-10-17 2018-12-25 International Business Machines Corporation Forming strained channel with germanium condensation
US9818875B1 (en) 2016-10-17 2017-11-14 International Business Machines Corporation Approach to minimization of strain loss in strained fin field effect transistors
US10141189B2 (en) 2016-12-29 2018-11-27 Asm Ip Holding B.V. Methods for forming semiconductors by diffusion
US10707208B2 (en) 2017-02-27 2020-07-07 International Business Machines Corporation Fabrication of fin field effect transistors utilizing different fin channel materials while maintaining consistent fin widths
US10147651B1 (en) 2017-05-12 2018-12-04 International Business Machines Corporation Fabrication of fin field effect transistor complementary metal-oxide-semiconductor devices with uniform hybrid channels
US10229856B2 (en) 2017-05-16 2019-03-12 International Business Machines Corporation Dual channel CMOS having common gate stacks
US10236346B1 (en) 2017-10-25 2019-03-19 International Business Machines Corporation Transistor having a high germanium percentage fin channel and a gradient source/drain junction doping profile
US10699967B2 (en) 2018-06-28 2020-06-30 International Business Machines Corporation Co-integration of high carrier mobility PFET and NFET devices on the same substrate using low temperature condensation
US11373870B2 (en) * 2019-06-27 2022-06-28 Taiwan Semiconductor Manufacturing Co., Ltd. Method for manufacturing semiconductor device including performing thermal treatment on germanium layer

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US20090085027A1 (en) * 2007-09-29 2009-04-02 Intel Corporation Three dimensional strained quantum wells and three dimensional strained surface channels by ge confinement method
US20100264468A1 (en) * 2009-04-17 2010-10-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method Of Fabrication Of A FinFET Element
US20110193178A1 (en) * 2010-02-09 2011-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Bottom-Notched SiGe FinFET Formation Using Condensation

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US20080237575A1 (en) * 2007-03-29 2008-10-02 Been-Yih Jin Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications
US20090085027A1 (en) * 2007-09-29 2009-04-02 Intel Corporation Three dimensional strained quantum wells and three dimensional strained surface channels by ge confinement method
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US20110193178A1 (en) * 2010-02-09 2011-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Bottom-Notched SiGe FinFET Formation Using Condensation

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CN111508844A (zh) * 2020-04-28 2020-08-07 上海华力集成电路制造有限公司 Fdsoi上锗硅鳍体的制作方法

Also Published As

Publication number Publication date
US9257556B2 (en) 2016-02-09
CN111725069A (zh) 2020-09-29
JP2017501586A (ja) 2017-01-12
EP3090448A1 (en) 2016-11-09
WO2015102884A1 (en) 2015-07-09
US20150194525A1 (en) 2015-07-09

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Application publication date: 20160817

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