CN105874588B - 具有氮化钛栅极的高k/金属栅极cmos晶体管 - Google Patents
具有氮化钛栅极的高k/金属栅极cmos晶体管 Download PDFInfo
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- CN105874588B CN105874588B CN201480071998.2A CN201480071998A CN105874588B CN 105874588 B CN105874588 B CN 105874588B CN 201480071998 A CN201480071998 A CN 201480071998A CN 105874588 B CN105874588 B CN 105874588B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32131—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/477—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
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- H—ELECTRICITY
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0179—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0181—Manufacturing their gate insulating layers
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361922498P | 2013-12-31 | 2013-12-31 | |
| US61/922,498 | 2013-12-31 | ||
| US14/567,507 | 2014-12-11 | ||
| US14/567,507 US9070785B1 (en) | 2013-12-31 | 2014-12-11 | High-k / metal gate CMOS transistors with TiN gates |
| PCT/US2014/073032 WO2015103412A1 (en) | 2013-12-31 | 2014-12-31 | High-k/metal gate cmos transistors with tin gates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105874588A CN105874588A (zh) | 2016-08-17 |
| CN105874588B true CN105874588B (zh) | 2019-05-14 |
Family
ID=53441843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480071998.2A Active CN105874588B (zh) | 2013-12-31 | 2014-12-31 | 具有氮化钛栅极的高k/金属栅极cmos晶体管 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US9070785B1 (enExample) |
| EP (1) | EP3090445A4 (enExample) |
| JP (1) | JP6709732B2 (enExample) |
| CN (1) | CN105874588B (enExample) |
| WO (1) | WO2015103412A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9070785B1 (en) * | 2013-12-31 | 2015-06-30 | Texas Instruments Incorporated | High-k / metal gate CMOS transistors with TiN gates |
| US9466492B2 (en) * | 2014-05-02 | 2016-10-11 | International Business Machines Corporation | Method of lateral oxidation of NFET and PFET high-K gate stacks |
| US9859392B2 (en) | 2015-09-21 | 2018-01-02 | Samsung Electronics Co., Ltd. | Integrated circuit device and method of manufacturing the same |
| US9941377B2 (en) | 2015-12-29 | 2018-04-10 | Qualcomm Incorporated | Semiconductor devices with wider field gates for reduced gate resistance |
| US9859129B2 (en) * | 2016-02-26 | 2018-01-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method of the same |
| CN107887335B (zh) * | 2017-11-14 | 2020-08-21 | 上海华力微电子有限公司 | 一种金属栅极制作方法 |
| KR102403723B1 (ko) | 2017-12-15 | 2022-05-31 | 삼성전자주식회사 | 반도체 장치 및 그의 제조 방법 |
| KR102418061B1 (ko) * | 2018-01-09 | 2022-07-06 | 삼성전자주식회사 | 반도체 장치 |
| KR20210132026A (ko) * | 2020-04-22 | 2021-11-03 | 양쯔 메모리 테크놀로지스 씨오., 엘티디. | 가변 커패시터 |
| US12362183B2 (en) * | 2022-01-27 | 2025-07-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method for fabricating the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101925987A (zh) * | 2008-01-21 | 2010-12-22 | 德克萨斯仪器股份有限公司 | 用于形成应变沟道pmos器件的方法以及由该方法形成的集成电路 |
| CN102282655A (zh) * | 2009-01-05 | 2011-12-14 | 国际商业机器公司 | 形成栅极叠层及其结构的方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100476926B1 (ko) * | 2002-07-02 | 2005-03-17 | 삼성전자주식회사 | 반도체 소자의 듀얼 게이트 형성방법 |
| JP4854245B2 (ja) * | 2005-09-22 | 2012-01-18 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| US7790592B2 (en) * | 2007-10-30 | 2010-09-07 | International Business Machines Corporation | Method to fabricate metal gate high-k devices |
| JP2009267180A (ja) * | 2008-04-28 | 2009-11-12 | Renesas Technology Corp | 半導体装置 |
| JP4602440B2 (ja) * | 2008-06-12 | 2010-12-22 | パナソニック株式会社 | 半導体装置及びその製造方法 |
| JP2010021200A (ja) * | 2008-07-08 | 2010-01-28 | Renesas Technology Corp | 半導体装置の製造方法 |
| US9024299B2 (en) * | 2008-10-14 | 2015-05-05 | Imec | Method for fabricating a dual work function semiconductor device and the device made thereof |
| US8643113B2 (en) * | 2008-11-21 | 2014-02-04 | Texas Instruments Incorporated | Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer |
| WO2011068016A1 (en) * | 2009-12-04 | 2011-06-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP2012099517A (ja) * | 2010-10-29 | 2012-05-24 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
| US9384962B2 (en) * | 2011-04-07 | 2016-07-05 | United Microelectronics Corp. | Oxygen treatment of replacement work-function metals in CMOS transistor gates |
| CN102915917B (zh) * | 2011-08-03 | 2015-02-11 | 中国科学院微电子研究所 | 一种互补型金属氧化物半导体场效应晶体管的制备方法 |
| US20130082332A1 (en) * | 2011-09-30 | 2013-04-04 | Globalfoundries Singapore Pte. Ltd. | Method for forming n-type and p-type metal-oxide-semiconductor gates separately |
| US20130302974A1 (en) * | 2012-05-08 | 2013-11-14 | Globalfoundries Inc. | Replacement gate electrode fill at reduced temperatures |
| US8921178B2 (en) * | 2012-05-16 | 2014-12-30 | Renesas Electronics Corporation | Semiconductor devices with self-aligned source drain contacts and methods for making the same |
| US9070785B1 (en) * | 2013-12-31 | 2015-06-30 | Texas Instruments Incorporated | High-k / metal gate CMOS transistors with TiN gates |
-
2014
- 2014-12-11 US US14/567,507 patent/US9070785B1/en active Active
- 2014-12-31 CN CN201480071998.2A patent/CN105874588B/zh active Active
- 2014-12-31 WO PCT/US2014/073032 patent/WO2015103412A1/en not_active Ceased
- 2014-12-31 EP EP14876620.7A patent/EP3090445A4/en active Pending
- 2014-12-31 JP JP2016544064A patent/JP6709732B2/ja active Active
-
2015
- 2015-05-28 US US14/724,185 patent/US9721847B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101925987A (zh) * | 2008-01-21 | 2010-12-22 | 德克萨斯仪器股份有限公司 | 用于形成应变沟道pmos器件的方法以及由该方法形成的集成电路 |
| CN102282655A (zh) * | 2009-01-05 | 2011-12-14 | 国际商业机器公司 | 形成栅极叠层及其结构的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3090445A1 (en) | 2016-11-09 |
| CN105874588A (zh) | 2016-08-17 |
| WO2015103412A1 (en) | 2015-07-09 |
| US9721847B2 (en) | 2017-08-01 |
| US9070785B1 (en) | 2015-06-30 |
| JP6709732B2 (ja) | 2020-06-17 |
| JP2017504205A (ja) | 2017-02-02 |
| EP3090445A4 (en) | 2017-08-23 |
| US20150287643A1 (en) | 2015-10-08 |
| US20150187653A1 (en) | 2015-07-02 |
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