CN105789234A - Wafer-level Light Emitting Diode Package And Method Of Fabricating The Same - Google Patents

Wafer-level Light Emitting Diode Package And Method Of Fabricating The Same Download PDF

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Publication number
CN105789234A
CN105789234A CN201610131814.8A CN201610131814A CN105789234A CN 105789234 A CN105789234 A CN 105789234A CN 201610131814 A CN201610131814 A CN 201610131814A CN 105789234 A CN105789234 A CN 105789234A
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China
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semiconductor layer
conductive
type semiconductor
electrode pad
insulating barrier
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CN201610131814.8A
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CN105789234B (en
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徐源哲
葛大成
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Seoul Semiconductor Co Ltd
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Seoul Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0756Stacked arrangements of devices
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
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    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
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    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
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    • H01L33/0093Wafer bonding; Removal of the growth substrate
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    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements
    • H01L33/505Wavelength conversion elements characterised by the shape, e.g. plate or foil

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.

Description

Wafer LED packaging part and manufacture method thereof
The application is the applying date submitted to China national Department of Intellectual Property is in JIUYUE, 2011 the title is " wafer LED packaging part and manufacture method thereof " No. 201180046150.0 divisional application applied for of 5 days.
Technical field
The present invention relates to a kind of light emission diode package member and manufacture method thereof, more particularly, relate to a kind of wafer LED packaging part and manufacture method thereof.
Background technology
Light emitting diode (LED) is to include N-type semiconductor and P-type semiconductor the semiconductor device by hole and the recombination luminescence of electronics.Such LED has been used in the scope of application widely of such as display device, traffic lights and back light unit.Furthermore, it is contemplated that the potential advantage in the power consumption lower than current bulb or fluorescent lamp and longer life-span, the scope of application of LED expands general lighting to already by the current electric filament lamp of replacement and fluorescent lamp.
LED is usable in LED module.LED module is by manufacturing the technique of LED chip of wafer scale, packaging technology and the manufacture of modularity (modulation) technique.Specifically, semiconductor growth layer, in the substrate of such as sapphire substrates, manufactures the LED chip with electrode pad through wafer scale Patternized technique, is then divided into one single chip (chip manufacturing process).Then, after one single chip being arranged on lead frame or printed circuit board (PCB), by bonding wire, electrode pad is electrically connected to lead terminal, shaped component covers LED chip, thus providing LED encapsulation piece (packaging technology).Then, LED encapsulation piece is arranged on the circuit board of such as metallic core printed circuit board (PCB) (MC-PCB), thus providing the LED module (modular process) of such as light source module.
In packaging technology, shell and/or shaped component can arrange LED chip to protect LED chip to exempt to be affected by.It addition, the light that phosphor is launched by LED chip with conversion can be comprised in shaped component so that LED encapsulation piece can launch white light, thus providing White LED packaging part.Can such White LED packaging part be arranged on the circuit board of such as MC-PCB, it is possible to secondary lens is arranged LED encapsulation piece to regulate the directional characteristic of the light launched from LED encapsulation piece, thus providing desired White LED module.
However, it is possible to the miniaturization being difficult to realize including the conventional LED packages of lead frame or printed circuit board (PCB) and gratifying heat radiation.Additionally, due to the absorption to light by lead frame or printed circuit board (PCB), the resistance heat etc. because of lead terminal, it is possible to make the luminous efficiency of LED worsen.
Furthermore it is possible to separately performed chip manufacturing process, packaging technology and modular process, which increase the time for manufacturing LED module and cost.
Meanwhile, alternating current (AC) LED has produced and has put goods on the market.ACLED includes the LED being directly connected to AC power supplies to allow continuous luminous.Can by being directly connected to an example of the ACLED that high voltage AC power supply uses disclosed in No. 7,417,259 United States Patent (USP) delivered such as Sakai.
According to the 7th, 417, No. 259 United States Patent (USP), LED element is arranged in dielectric base (such as, sapphire substrates) with two-dimensional pattern, and is connected in series to form LED array.LED array is serially connected, thus providing the light-emitting device that can run under high voltages.It addition, such LED array can reversely with each other in sapphire substrates be connected in parallel, AC power supplies can be utilized to run with single chip light emitting device luminous continuously thus providing.
Owing to AC-LED includes in growth substrate luminescence unit (such as, in sapphire substrates), so AC-LED limits the structure of luminescence unit and is likely to the improvement of restriction light extraction efficiency.Therefore, light emitting diode (such as, based on substrate separating technology the AC-LED including the luminescence unit being serially connected) has been investigated.
Summary of the invention
Technical problem
The exemplary embodiment of the present invention provides a kind of wafer scale LED encapsulation piece that can be formed directly in the module of circuit board when not using traditional lead frame or printed circuit board (PCB) and manufacture method thereof.
The exemplary embodiment of the present invention additionally provides a kind of wafer scale LED encapsulation piece of heat radiation and manufacture method thereof having high efficiency and showing improvement.
The exemplary embodiment of the present invention additionally provides the manufacture method of the LED encapsulation piece of a kind of manufacturing time reducing LED module and manufacturing cost.
The exemplary embodiment of the present invention additionally provides a kind of LED module of heat radiation and manufacture method thereof having high efficiency and showing improvement.
The exemplary embodiment of the present invention additionally provides and a kind of includes multiple luminescence unit the wafer LED packaging part that can be formed directly into when not using traditional lead frame or printed circuit board (PCB) in the module of circuit board and manufacture method thereof.
Other aspects of the present invention will be set forth in part in the following description, and partly will be apparent from according to description, or can be understood by the enforcement of the present invention.
Technical scheme
The exemplary embodiment of the present invention discloses a kind of light emission diode package member, and described light emission diode package member includes: semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And protection insulating barrier, cover the first conductive-type semiconductor layer and the sidewall of the second conductive-type semiconductor layer, wherein, protection insulating barrier includes the insulating barrier with refractive index different from each other.
The exemplary embodiment of the present invention discloses a kind of light-emitting diode (LED) module, and described light-emitting diode (LED) module includes: circuit board;Be arranged in the light emission diode package member of circuit board with not having bonding wire, wherein, light emission diode package member includes: semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And protection insulating barrier, cover the first conductive-type semiconductor layer and the sidewall of the second conductive-type semiconductor layer, wherein, protection insulating barrier includes the insulating barrier with refractive index different from each other;Lens, regulate the deflection of the light launched from light emission diode package member.
The exemplary embodiment of the present invention discloses a kind of light-emitting diode (LED) module, and described light-emitting diode (LED) module includes: circuit board;Light emission diode package member, it does not have bonding wire ground engages on a printed circuit;Wherein, light emission diode package member includes: semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And protection insulating barrier, cover the sidewall of the first conductive-type semiconductor layer.
The exemplary embodiment of the present invention discloses a kind of LED encapsulation piece, and described LED encapsulation piece includes: semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, contact holes exposing the first conductive-type semiconductor layer;First projection, is arranged on the first side of semiconductor stack overlapping piece, and the first projection is electrically connected to the first conductive-type semiconductor layer by multiple contact holes;Second projection, is arranged on the first side of semiconductor stack overlapping piece, and the second projection is electrically connected to the second conductive-type semiconductor layer;And protection insulating barrier, cover the sidewall of semiconductor stack overlapping piece.
The exemplary embodiment of the present invention also discloses a kind of light-emitting diode (LED) module, and described light-emitting diode (LED) module includes the LED encapsulation piece according to above-mentioned exemplary embodiment.Described LED module may include that circuit board;LED encapsulation piece, installs on circuit boards;And lens, regulate the deflection of the light launched from LED encapsulation piece.
The exemplary embodiment of the present invention also discloses a kind of method manufacturing LED encapsulation piece.Described method includes: form the semiconductor stack overlapping piece including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer in the first substrate;Semiconductor stack overlapping piece is made to pattern to form chip separation region;Make the second conductive-type semiconductor layer and active layer patterning to form the multiple contact holes exposing the first conductive-type semiconductor layer;Form the protection insulating barrier of the sidewall in chip separation region covering semiconductor stack overlapping piece;And on semiconductor stack overlapping piece, form the first projection and the second projection.First projection is electrically connected to the first conductive-type semiconductor layer by multiple contact holes, and the second projection is electrically connected to the second conductive-type semiconductor layer.
The exemplary embodiment of the present invention also discloses a kind of light emission diode package member.LED encapsulation piece includes: multiple luminescence units, and each luminescence unit includes the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;Multiple contact holes, are arranged in the second conductive-type semiconductor layer and the active layer of each luminescence unit, the first conductive-type semiconductor layer of each luminescence unit of contact holes exposing;Protection insulating barrier, covers the sidewall of each luminescence unit;Connector, is positioned on the first side being arranged in luminescence unit, and makes the luminescence unit of two vicinities be electrically connected to each other;First projection, is arranged on the first side of luminescence unit, and is electrically connected to the first conductive-type semiconductor layer by multiple contact holes of the first luminescence unit of luminescence unit;And second projection, it is arranged on the first side of luminescence unit, and is electrically connected to the second conductive-type semiconductor layer of the second luminescence unit of luminescence unit.
The exemplary embodiment of the present invention also discloses a kind of light-emitting diode (LED) module, and described light-emitting diode (LED) module includes LED encapsulation piece described above.Described module includes: circuit board;LED encapsulation piece, arranges on circuit boards;And lens, regulate the deflection of the light launched from LED encapsulation piece.
The exemplary embodiment of the present invention also discloses a kind of method that manufacture includes the LED encapsulation piece of multiple luminescence unit.Described method includes: form the semiconductor stack overlapping piece including the first conductive-type semiconductor layer, active layer, the second conductive-type semiconductor layer in the first substrate;Semiconductor stack overlapping piece is made to pattern to form chip separation region and luminescence unit separated region;Making the second conductive-type semiconductor layer and active layer pattern to form multiple luminescence unit, each luminescence unit has the multiple contact holes exposing the first conductive-type semiconductor layer;Form the protection insulating barrier of the sidewall in chip separation region and luminescence unit separated region covering semiconductor stack overlapping piece;Form the connector being serially connected by contiguous luminescence unit;And on multiple luminescence units, form the first projection and the second projection.Here, the first projection is electrically connected to the first conductive-type semiconductor layer by multiple contact holes of the first luminescence unit of luminescence unit, and the second projection is electrically connected to the second conductive-type semiconductor layer of the second luminescence unit of luminescence unit.
It will be appreciated that total volume description above and detailed description below are all illustrative of with illustrative, and be intended to provide further explanation to the present invention protected.
Accompanying drawing explanation
Accompanying drawing illustrates the exemplary embodiment of the present invention, and is used for together with the description explaining principles of the invention, wherein, including accompanying drawing to provide a further understanding of the present invention, makes accompanying drawing be incorporated to this specification and constitute the part of this specification.
Fig. 1 is the schematic cross sectional views of the light emission diode package member of the first exemplary embodiment according to the present invention.
Fig. 2 is the schematic cross sectional views of the light emission diode package member of the second exemplary embodiment according to the present invention.
Fig. 3 is the sectional view of the light-emitting diode (LED) module including the light emission diode package member according to the first exemplary embodiment.
Fig. 4 to Figure 12 illustrates the method manufacturing the light emission diode package member according to the first exemplary embodiment, and wherein (a) is plane graph, and (b) is the sectional view that the line A-A in Fig. 5 to Figure 10 intercepts.
Figure 13 is the sectional view of the method illustrating the light emission diode package member manufacturing the second exemplary embodiment according to the present invention.
Figure 14 is the schematic cross sectional views of the light emission diode package member of the 3rd exemplary embodiment according to the present invention.
Figure 15 is the schematic cross sectional views of the light emission diode package member of the 4th exemplary embodiment according to the present invention.
Figure 16 is the sectional view of the light-emitting diode (LED) module including the light emission diode package member according to the 3rd exemplary embodiment.
Figure 17 to Figure 26 illustrates the method manufacturing the light emission diode package member according to the 3rd exemplary embodiment, and wherein (a) is plane graph, and (b) is the sectional view that the line A-A in Figure 18 to Figure 23 intercepts.
Figure 27 is the sectional view of the method illustrating the light emission diode package member manufacturing the 4th exemplary embodiment according to the present invention.
Detailed description of the invention
The present invention, the exemplary embodiment of the present invention shown in the drawings have been described more fully it hereinafter with reference to accompanying drawing.But, the present invention can be embodied in many different forms and should not be construed as being limited to exemplary embodiments set forth herein.On the contrary, it is provided that these exemplary embodiments make the disclosure completely and will pass on the scope of the present invention fully to those skilled in the art.In the accompanying drawings, for clarity, the size in layer and region and relative size can be exaggerated.Like number represents same element in the accompanying drawings.
It will be appreciated that when the element of such as layer, film, region or substrate be referred to as " " another element " on " time, it can directly on another element or can also there is intermediary element.On the contrary, when element be referred to as " directly existing " another element " on " time, then there is no intermediary element.
Fig. 1 is the schematic cross sectional views of the LED encapsulation piece 100 of the first exemplary embodiment according to the present invention.
With reference to Fig. 1, LED encapsulation piece 100 can include semiconductor stack overlapping piece the 30, first contact layer the 35, second contact layer the 31, first insulating barrier the 33, second insulating barrier the 37, first electrode pad 39a, the second electrode pad 39b, the first projection 45a and the second projection 45b.LED encapsulation piece 100 can also include insulating barrier 43, mute projection 45c and wavelength shifter 51.
Semiconductor stack overlapping piece 30 includes the first conductivity type upper semiconductor layer 25, active layer 27 and the second conductivity type lower semiconductor layer 29.Active layer 27 is arranged between upper semiconductor layer 25 and lower semiconductor layer 29.
Active layer 27, upper semiconductor layer 25 and lower semiconductor layer 29 can be made up of the III-N based compound semiconductor of such as (Al, Ga, In) N quasiconductor.Each in upper semiconductor layer 25 and lower semiconductor layer 29 can be single or multiple lift.Such as, except contact layer and coating, upper semiconductor layer 25 and/or lower semiconductor layer 29 can include superlattice layer.Active layer 27 can have single quantum or multi-quantum pit structure.First conductivity type can be n-type, and the second conductivity type can be p-type.Selectable, the first conductivity type can be p-type, and the second conductivity type can be n-type.Owing to upper semiconductor layer 25 can be formed by the n-type semiconductor layer with relatively low ratio resistance, so upper semiconductor layer 25 can have the thickness of relative thick.Therefore, it can form coarse surface R on the upper surface of upper semiconductor layer 25, wherein coarse surface R increases the extraction efficiency of the light produced in active layer 27.
Semiconductor stack overlapping piece 30 has through the second conductivity type lower semiconductor layer 29 and active layer 27 to expose multiple contact hole 30a ((b) referring in Fig. 5) of the first conductivity type upper semiconductor layer, and the first contact layer 35 contact is exposed to the first conductivity type upper semiconductor layer 25 in multiple contact hole.
Second contact layer 31 contacts the second conductivity type lower semiconductor layer 29.Second contact layer 31 includes the light that reflective metal layer produces to be reflected in active layer 27.It addition, the second contact layer 31 can be formed and the Ohmic contact of the second conductivity type lower semiconductor layer 29.
First insulating barrier 33 covers the second contact layer 31.It addition, the first insulating barrier 33 covers the sidewall being exposed in multiple contact hole 30a of semiconductor stack overlapping piece 30.Additionally, the first insulating barrier 33 can cover the side surface of semiconductor stack overlapping piece 30.First insulating barrier 33 makes the first contact layer 35 and the second contact layer 31 insulate, and makes the second conductivity type lower semiconductor layer 29 being exposed in multiple contact hole 30a and active layer 27 and the first contact layer 35 insulate simultaneously.First insulating barrier 33 can be made up of single or multiple lift (such as, silicon oxide film or silicon nitride film).Selectively, the first insulating barrier 33 can by by being alternately stacked the such as SiO with different refractivity2/TiO2Or SiO2/Nb2O5Insulating barrier formed distributed Bragg reflector composition.
First contact layer 35 is arranged in below the first insulating barrier 33 and contacts the first conductivity type upper semiconductor layer 25 at multiple contact hole 30a through the first insulating barrier 33.First contact layer 35 includes the contact portion 35a contacting the first conductivity type upper semiconductor layer 25 and coupling part 35b being connected to each other by contact portion 35a.Therefore, by coupling part 35b, contact portion 35a is electrically connected to each other.First contact layer 35 is formed below some regions of the first insulating barrier 33 and can be made up of reflective metal layer.
Second insulating barrier 37 covers the first contact layer 35 below the first contact layer 35.Additionally, the second insulating barrier 37 covers the side surface of semiconductor stack overlapping piece 30 while covering the first insulating barrier 33.Second insulating barrier 37 can be made up of single or multiple lift.It addition, the second insulating barrier 37 can be distributed Bragg reflector.
First electrode pad 39a and the second electrode pad 39b is positioned at below the second insulating barrier 37.First electrode pad 39a may pass through the second insulating barrier 37 and is connected to the first contact layer 35.Additionally, the second electrode pad 39b may pass through the second insulating barrier 37 and the first insulating barrier 33 is connected to the second contact layer 31.
First projection 45a and the second projection 45b is positioned at below the first electrode pad 39a and the second electrode pad 39b to be connected respectively to the first electrode pad 39a and the second electrode pad 39b.First projection 45a and the second projection 45b can pass through to be coated with to be formed.First projection 45a and the second projection 45b is electrically connected to the terminal of the circuit board of such as MC-PCB and has coplanar end.Additionally, the first electrode pad 39a can be formed at the horizontal plane place identical with the horizontal plane of the second electrode pad 39b, thus the first projection 45a and the second projection 45b also may be formed on same plane.Therefore, the first projection 45a and the second projection 45b can have identical height.
Meanwhile, mute projection 45c may be located between the first projection 45a and the second projection 45b.Mute projection 45c can collectively form to provide the passage of heat for discharging the heat from semiconductor stack part 30 with the first projection 45a and the second projection 45b.
Insulating barrier 43 can cover the first projection 45a and the side surface of the second projection 45b.Insulating barrier 43 can also cover the side surface of mute projection 45c.Additionally, insulating barrier 43 fills the space between the first projection 45a, the second projection 45b and mute projection 45c to prevent dampness to be externally entering semiconductor stack overlapping piece 30.Insulating barrier 43 also covers the side surface of the first electrode pad 39a and the second electrode pad 39b to avoid the first electrode pad 39a and the second electrode pad 39b from the impact of the external environmental factor of such as dampness.Although insulating barrier 43 is configurable to cover whole side surfaces of the first projection 45a and the second projection 45b, but the present invention is not restricted to this.Selectively, insulating barrier 43 can cover the side surface of the first projection 45a except some regions of the side surface close to the first projection and the end of the second projection and the second projection 45b.
In the present example embodiment, insulating barrier 43 is shown as covering the side surface of the first electrode pad 39a and the second electrode pad 39b, but the invention is not restricted to this.Selectively, another insulating barrier can be used for covering the first electrode pad 39a and the second electrode pad 39b, and insulating barrier 43 may be formed at below another insulating barrier described.In this case, the first projection 45a and the second projection 45b can pass another insulating barrier described and be connected to the first electrode pad 39a and the second electrode pad 39b.
Wavelength shifter 51 may be located at the top contrary with remaining semiconductor stack overlapping piece 30 of the first conductivity type upper semiconductor layer 25.Wavelength shifter 51 can contact the upper surface of the first conductivity type upper semiconductor layer 25.Wavelength shifter 51 can be the phosphor sheet with homogeneous thickness without limitation.Selectively, wavelength shifter 51 can be the substrate doped with the impurity for wavelength convert, for instance, sapphire substrates or silicon base.
In the present example embodiment, the side surface of semiconductor stack overlapping piece 30 is by protecting insulating barrier to cover.Protection insulating barrier can include such as, the first insulating barrier 33 and/or the second insulating barrier 37.Additionally, the first contact layer 35 can be covered to be protected against the impact of external environment condition by the second insulating barrier 37, the second contact layer 31 can be covered to be protected against the impact of external environment condition by the first insulating barrier 33 and the second insulating barrier 37.First electrode pad 39a and the second electrode pad 39b is also protected by such as insulating barrier 43.Therefore, it is possible to prevent owing to dampness makes semiconductor stack overlapping piece 30 worsen.
Wavelength shifter 51 may be affixed to the first conductivity type upper semiconductor layer 25 of wafer scale, is then separated together with protection insulating barrier in chip separation process process.Therefore, the side surface of wavelength shifter 51 can with protection insulating barrier on one wire.I.e., it is possible to make the side surface of wavelength shifter 51 flush along straight line with the side surface of protection insulating barrier.It addition, the side surface of wavelength shifter 51 can with the side surface of insulating barrier 43 on one wire.Therefore, it can make the side surface of wavelength shifter 51, the side surface of protection insulating barrier and the side surface of insulating barrier 43 flush all along straight line.
Fig. 2 is the schematic cross sectional views of the light emission diode package member 200 of the second exemplary embodiment according to the present invention.
With reference to Fig. 2, LED encapsulation piece 200 is similar to the LED encapsulation piece 100 according to exemplary embodiment above.But, in the present example embodiment, the first projection 65a and the second projection 65b is formed in substrate 61.
Specifically, substrate 61 includes the through hole having the first projection 65a and the second projection 65b formed therein that respectively.Substrate 61 is dielectric base, for instance, sapphire substrates or silicon base, but it is not limited to this.The substrate 61 with the first projection 65a and the second projection 65b can be attached to the first electrode pad 39a and the second electrode pad 39b.In this case, in order to prevent the first electrode pad 39a and the second electrode pad 39b to be exposed to outside, insulating barrier 49 can cover side surface and the basal surface of the first electrode pad 39a and the second electrode pad 39b.It addition, insulating barrier 49 can have the opening exposing the first electrode pad 39a and the second electrode pad 39b, then other metal level 67a, 67b is formed in the opening.Other metal level 67a, 67b can be made up of jointing metal.
Fig. 3 is the sectional view of the light-emitting diode (LED) module including the LED encapsulation piece 100 according to the first exemplary embodiment.
With reference to Fig. 3, LED module includes circuit board 71 (such as, MC-PCB), LED encapsulation piece 100 and lens 81.Circuit board 71 (such as, MC-PCB) has for by connection pad 73a, 73b mounted thereto for LED encapsulation piece 100.The first projection 45a and the second projection 45b (referring to Fig. 1) of LED encapsulation piece 100 is connected respectively to connection pad 73a, 73b.
Multiple LED encapsulation piece 100 may be mounted on circuit board 71, and lens 81 can be arranged in LED encapsulation piece 100 to regulate the deflection of the light launched from LED encapsulation piece 100.
According to the second exemplary embodiment, light emission diode package member 200 can substitute for LED encapsulation piece 100 and installs on circuit boards.
Fig. 4 to Figure 12 illustrates the method manufacturing the LED encapsulation piece 100 according to the first exemplary embodiment.In Fig. 5 to Figure 10, (a) is plane graph, and (b) is the sectional view intercepted along the line A-A of (a).
With reference to Fig. 4, growth substrate 21 forms the semiconductor stack overlapping piece 30 including the first conductive-type semiconductor layer 25, active layer 27 and the second conductive-type semiconductor layer 29.Growth substrate 21 can be sapphire substrates, but is not limited to this.Selectively, growth substrate 21 can be other kinds of hetero-substrates (heterogeneoussubstrate), for instance, silicon base.Each in first conductive-type semiconductor layer 25 and the second conductive-type semiconductor layer 29 can be made up of single or multiple lift.It addition, active layer 27 can have single quantum or multi-quantum pit structure.
Compound semiconductor layer can be formed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) in growth substrate 21 by III-N based compound semiconductor.
Cushion (not shown) can be previously formed being formed compound semiconductor layer.Forming cushion to alleviate the lattice mismatch between growth substrate 21 and compound semiconductor layer, cushion can be formed by the GaN base material layer of such as gallium nitride or aluminium nitride.
With reference to (a) and (b) of Fig. 5, semiconductor stack overlapping piece 30 is patterned to form chip (stack) separated region 30b makes the second conductive-type semiconductor layer 29 and active layer 27 pattern to form the multiple contact hole 30a exposing the first conductive-type semiconductor layer 25 simultaneously.Semiconductor stack overlapping piece 30 can be made to pattern by photoetching process and etch process.
Chip separation region 30b is the region for LED encapsulation structure is divided into single led packaging part, and the side surface of the first conductive-type semiconductor layer 25, the side surface of active layer 27 and the side surface of the second conductive-type semiconductor layer 29 expose on the 30b of chip separation region.Advantageously, chip separation region 30b is configurable to expose substrate 21, without being restricted to this.
Multiple contact hole 30a can be circular, but is not limited to this.Contact hole 30a can have various shape.Second conductive-type semiconductor layer 29 and active layer 27 are exposed to the sidewall of multiple contact hole 30a.As indicated, contact hole 30a can have the sidewall of inclination.
With reference to (a) and (b) of Fig. 6, the second contact layer 31 is formed on the second conductive-type semiconductor layer 29.Second contact layer 31 is formed on the semiconductor stack overlapping piece 30 except the region corresponding to multiple contact hole 30a.
Second contact layer 31 can include transparent conductive oxide film (such as, tin indium oxide (ITO)) or reflective metal layer (such as, silver (Ag) or aluminum (Al)).Second contact layer 31 can be made up of single or multiple lift.Second contact layer 31 may be configured as being formed and the second conductive-type semiconductor layer 29 Ohmic contact.
The second contact layer 31 can be formed before or after forming multiple contact hole 30a.
With reference to (a) and (b) of Fig. 7, form the first insulating barrier 33 to cover the second contact layer 31.First insulating barrier 33 can cover the side surface being exposed to chip separation region 30b of semiconductor stack overlapping piece 30, covers the sidewall of multiple contact hole 30a simultaneously.Here, the first insulating barrier 33 can have the opening 33a exposing the first conductive-type semiconductor layer 25 in multiple contact hole 30a.
First insulating barrier 33 can be made up of single or multiple lift (such as, silicon oxide film or silicon nitride film).Selectively, the first insulating barrier 33 can be made up of the distributed Bragg reflector formed by being alternately stacked the insulating barrier with different refractivity.Such as, the first insulating barrier 33 can pass through to be alternately stacked SiO2/TiO2Or SiO2/Nb2O5Formed.It addition, the first insulating barrier 33 can be formed to provide the distributed Bragg reflector that by the thickness regulating each insulating barrier, the wide wave-length coverage of blue light, green glow and HONGGUANG is had highly reflective.
With reference to (a) and (b) of Fig. 8, the first insulating barrier 33 forms the first contact layer 35.First contact layer 35 includes the contact portion 35a contacting the first conductivity type upper semiconductor layer 25 being exposed in contact hole 30a and the coupling part 35b being connected to each other by contact portion 35a.First contact layer 35 can be made up of reflective metal layer, but is not limited to this.
First contact layer 35 is formed on some regions of semiconductor stack overlapping piece 30 so that the first insulating barrier 33 is exposed on other regions being formed without the first contact layer 35 of semiconductor stack overlapping piece 30.
With reference to (a) and (b) of Fig. 9, the first contact layer 35 forms the second insulating barrier 37.Second insulating barrier 37 can be made up of single or multiple lift (silicon oxide film or silicon nitride film).It addition, the second insulating barrier 37 can be made up of the distributed Bragg reflector formed by being alternately stacked the insulating barrier with different refractivity.
Second insulating barrier 37 can cover the first contact layer 35 and cover the first insulating barrier 33 simultaneously.Second insulating barrier 37 also can cover the side surface in the 30b of chip separation region of semiconductor stack overlapping piece 30.
Second insulating barrier 37 has the opening 37a exposing the first contact layer 35.It addition, the second insulating barrier 37 and the first insulating barrier 33 are formed with the opening 37b exposing the second contact layer 31.
With reference to (a) and (b) of Figure 10, the second insulating barrier 37 forms the first electrode pad 39a and the second electrode pad 39b.First electrode pad 39a is connected to the first contact layer 35 through opening 37a, and the second electrode pad 39b is connected to the second contact layer 31 through opening 37b.
First electrode pad 39a separates with the second electrode pad 39b, and in terms of top perspective, each the first electrode pad 39a and the second electrode pad 39b has relatively large area, for instance, no less than LED encapsulation piece area 1/3 area.
With reference to Figure 11, the first electrode pad 39a and the second electrode pad 39b form insulating barrier 43.Insulating barrier 43 covers the first electrode pad 39a and the second electrode pad 39b, and has the groove of the upper surface exposing electrode pad 39a and 39b.It addition, insulating barrier 43 can have the groove of the second insulating barrier 37 being exposed between the first electrode pad 39a and the second electrode pad 39b.
Then, the groove of insulating barrier 43 forms the first projection 45a and the second projection 45b, mute projection 45c can be formed between the first projection and the second projection.
Can pass through to use metal material plating (such as, plating) to form projection.If it is necessary to the Seed Layer for plating also can be formed.
After forming the first projection 45a and the second projection 45b, insulating barrier 43 can be removed.Such as, insulating barrier 43 can be formed by the polymer of such as photoresist, and can be removed after forming projection.Selectively, insulating barrier 43 can be stayed to protect the first projection 45a and the side surface of the second projection 45b.
In the present example embodiment, insulating barrier 43 is shown as being formed directly on the first pad electrode 39a and the second pad electrode 39b.In a further exemplary embodiment, another insulating barrier can be formed to cover the first electrode pad 39a and the second electrode pad 39b.Another insulating barrier is configurable to have the opening exposing the first electrode pad 39a and the second electrode pad 39b.Then, the technique that can perform to form insulating barrier 43 and projection.
With reference to Figure 12, remove growth substrate 21, wavelength shifter 51 is attached to the first conductive-type semiconductor layer 25.Optical technology (such as, laser lift-off (LLO)), machine glazed finish or chemical etching can be passed through and remove growth substrate 21.
Then, the surface of the exposure of the first conductive-type semiconductor layer 25 is carried out anisotropic etching (such as, Optical Electro-Chemistry (PEC) etching) to form coarse surface on the first conductive-type semiconductor layer 25 exposed.
Meanwhile, the wavelength shifter such as comprising the phosphor sheet of phosphor can be attached to the first conductive-type semiconductor layer 25.
Selectively, growth substrate 21 can comprise the impurity of the wavelength for changing the light produced in active layer 27.In this case, growth substrate 21 can be used as wavelength shifter 51.
Then, along chip separation region 30b, LED encapsulation structure is divided into single packaging part, thus the LED encapsulation piece 100 provided.Now, the second insulating barrier 37 is cut together with wavelength shifter 51 so that can be formed on one wire by the cutting planes of the second insulating barrier 37 and wavelength shifter 51.
Figure 13 is the sectional view illustrating the method manufacturing the LED encapsulation piece 200 according to the second exemplary embodiment of the present invention.
With reference to Figure 13, manufacturing according in the method for the LED encapsulation piece 200 of this exemplary embodiment, technique is identical with the technique of the method for above-mentioned manufacture LED encapsulation piece 100, until forming the first electrode pad 39a and the second electrode pad 39b ((a) and (b) of Figure 10).
After forming the first electrode pad 39a and the second electrode pad 39b, form insulating barrier 49 to cover the first electrode pad 39a and the second electrode pad 39b.Insulating barrier 49 can cover the side surface of the first electrode pad 39a and the second electrode pad 39b to protect the first electrode pad 39a and the second electrode pad 39b.Insulating barrier 49 has the opening exposing the first electrode pad 39a and the second electrode pad 39b.Then other metal levels 67a, 67b are formed in the opening.Other metal levels 67a, 67b can be made up of jointing metal.
Substrate 61 is joined to the first electrode pad 39a and the second electrode pad 39b.Substrate 61 can have the through hole that could be formed with the first projection 65a and the second projection 65b.It addition, the first projection and the second projection can be formed as having pad 69a, 69b at its end.The substrate 61 with the first projection 65a, the second projection 65b, pad 69a and pad 69b can individually be prepared, and is joined to the wafer with the first electrode pad 39a and the second electrode pad 39b.
Then, as described in reference to Figure 12, remove growth substrate 21 and wavelength shifter 51 can be attached to the first conductive-type semiconductor layer 25, subsequently LED encapsulation structure is divided into single LED encapsulation piece.Therefore it provides the as shown in Figure 2 LED encapsulation piece 200 completed.
Figure 14 is the sectional view of the LED encapsulation piece 300 according to the third exemplary embodiment of the present invention.
With reference to Figure 14, LED encapsulation piece 300 can include being divided into semiconductor stack overlapping piece the 130, first contact layer the 135, second contact layer the 131, first insulating barrier the 133, second insulating barrier 137, first electrode pad 139a of multiple luminescence unit (illustrate only two luminescence units S1, S2 here), the second electrode pad 139b, the connector 139c, the first projection 145a and the second projection 145b that are serially connected by contiguous luminescence unit.It addition, LED encapsulation piece 300 can include the 3rd insulating barrier 141, insulating barrier 143, mute projection 145c, wavelength shifter 151 and other metal levels 140a, 140b.
Semiconductor stack overlapping piece 130 includes the first conductivity type upper semiconductor layer 125, active layer 127 and the second conductivity type lower semiconductor layer 129.The semiconductor stack overlapping piece 130 of this exemplary embodiment is similar to the semiconductor stack overlapping piece 30 described in FIG, thereof will be omitted detailed description thereof.
Each in luminescence unit S1, S2 has the multiple contact hole 130a ((b) referring to Figure 18) extending through the second conductivity type lower semiconductor layer 129 and active layer 127 to expose the first conductivity type upper semiconductor layer, and the first contact layer 135 contact is exposed to the first conductivity type upper semiconductor layer 125 in multiple contact hole.Luminescence unit S1, S2 are separated from one another by unit separated region 130b ((b) referring to Figure 18).
Second contact layer 131 contacts the second conductivity type lower semiconductor layer 129 of each luminescence unit S1, S2.Second contact layer 131 includes the light that reflective metal layer produces to be reflected in active layer 127.It addition, the second contact layer 131 can be formed and the Ohmic contact of the second conductivity type lower semiconductor layer 129.
First insulating barrier 133 covers the second contact layer 131.It addition, the first insulating barrier 133 covers the sidewall being exposed in multiple contact hole 130a of semiconductor stack overlapping piece 130.Additionally, the first insulating barrier 133 can cover the side surface of each luminescence unit S1, S2.First insulating barrier 133 makes the first contact layer 135 and the second contact layer 131 insulate, and makes the second conductivity type lower semiconductor layer 129 being exposed in multiple contact hole 130a and active layer 127 and the first contact layer 135 insulate simultaneously.First insulating barrier 133 can be made up of single or multiple lift (such as, silicon oxide film or silicon nitride film).Additionally, the first insulating barrier 133 can by by being alternately stacked insulating barrier (such as, the SiO with different refractivity2/TiO2Or SiO2/Nb2O5) formed distributed Bragg reflector composition.
First contact layer 135 is positioned at below the first insulating barrier 133, and contacts the first conductivity type upper semiconductor layer 125 through the first insulating barrier 133 in the multiple contact hole 130a in each luminescence unit S1, S2.First contact layer 135 includes the contact portion 135a contacting the first conductivity type upper semiconductor layer 125 and coupling part 135b being connected to each other by contact portion 135a.Therefore, coupling part 135b contact portion 135a is electrically connected to each other.It is positioned at the first contact layer 135 below each luminescence unit S1, S2 separated from one another and formed in the lower section in some regions of the first insulating barrier 133.First contact layer 135 can be made up of reflective metal layer.
Second insulating barrier 137 covers the first contact layer 135 below the first contact layer 135.Additionally, the second insulating barrier 137 can cover the first insulating barrier 133 covers the side surface of each luminescence unit S1, S2 simultaneously.Second insulating barrier 137 can be made up of single or multiple lift.Selectively, the second insulating barrier 137 can be made up of distributed Bragg reflector.
First electrode pad 139a and the second electrode pad 139b is positioned at below the second insulating barrier 137.First electrode pad 139a may pass through the second insulating barrier 137 and is connected to first contact layer 135 of the first luminescence unit S1.It addition, the second electrode pad 139b may pass through the second insulating barrier 137 and the first insulating barrier 133 is connected to second contact layer 131 of the second luminescence unit S2.
Connector 139c is positioned at below the second insulating barrier 137 and makes luminescence unit S1, S2 of two vicinities be electrically connected to each other through the second insulating barrier 137.Connector 139c can make second contact layer 131 of a luminescence unit S1 be connected to first contact layer 135 of another luminescence unit S2 adjacent thereto so that two luminescence units S1, S2 are serially connected.
In the present example embodiment, it is shown that two luminescence units S1, S2.It should be understood, however, that two or more luminescence units can be serially connected by multiple connector 139c.Here, first electrode pad 139a, 139b can be connected in series to the end opposite being positioned at such serial array.
Meanwhile, the 3rd insulating barrier 141 can cover the first electrode pad 139a, the second electrode pad 139b and connector 139c below the first electrode pad 139a, the second electrode pad 139b and connector 139c.3rd insulating barrier 141 can have the opening exposing the first electrode pad 139a and the second electrode pad 139b.3rd insulating barrier 141 can be formed by silicon oxide film or silicon nitride film.
First projection 145a and the second projection 145b lays respectively at below the first electrode pad 139a and the second electrode pad 139b.First projection 145a and the second projection 145b can be formed by plating.First projection 145a and the second projection 145b is electrically connected to the terminal of circuit board (such as, MC-PCB), and has end coplanar with each other.It addition, the first electrode pad 139a can be formed on the horizontal plane identical with the horizontal plane of the second electrode pad 139b so that the first projection 145a and the second projection 145b is additionally formed on same plane.Therefore, the first projection 145a and the second projection 145b can have identical height.
Other metal levels 140a, 140b can be arranged between the first projection 145a and the first electrode pad 139a and between the second projection 145b and the second electrode pad 139b.Here, other metal levels 140a, 140b is set so that the first electrode pad 139a and the second electrode pad 139b is formed as higher than connector 139c, and other metal levels 140a, 140b may be located at the open interior of the 3rd insulating barrier 141.First electrode pad 139a, the second electrode pad 139b and other metal levels 140a, 140b can form final electrode pad.
Meanwhile, mute projection 145c can be located between the first projection 145a and the second projection 145b.Mute projection 145c can collectively form to provide the passage of heat for ejecting selfluminous cell S1, S2 with the first projection 145a and the second projection 145b.Mute projection 145c is separated with connector 139c by the 3rd insulating barrier 141.
Insulating barrier 143 can cover the first projection 145a and the side surface of the second projection 145b.Insulating barrier 143 also can cover the side surface of mute projection 145c.It addition, insulating barrier 143 fills the space between the first projection 145a, the second projection 145b and the three projection 145c to prevent dampness to be externally entering semiconductor package part 130.Although insulating barrier 143 is configurable to cover the whole side surface of the first projection 145a and the second projection 145b, but the invention is not restricted to this.Selectively, insulating barrier 143 can cover the first projection 145a and the side surface except some regions of the side surface close to the first projection and the end of the second projection of the second projection 145b.
Wavelength shifter 151 can be located on luminescence unit S1, S2.Wavelength shifter 151 can contact the upper surface of the first conductivity type upper semiconductor layer 125.Wavelength shifter 151 goes back capping unit separated region 130b and chip separation region.Wavelength shifter 151 can be the phosphor sheet with homogeneous thickness, and is not restricted to this.Selectively, wavelength shifter 151 can be the substrate doped with the impurity for wavelength convert, for instance, sapphire substrates or silicon base.
In the present embodiment, the side surface of luminescence unit S1, S2 can be covered by protection insulating barrier.Protection insulating barrier can include such as, the first insulating barrier 133 and/or the second insulating barrier 137.It addition, the first contact layer 135 can be covered to be protected against the impact of external environment condition by the second insulating barrier 137, the second contact layer 131 can be covered to be protected against the impact of external environment condition by the first insulating barrier 133 and the second insulating barrier 137.It addition, the first electrode pad 139a and the second electrode pad 139b is also protected by such as the 3rd insulating barrier 141.Accordingly it is possible to prevent make luminescence unit S1, S2 worsen due to dampness.
Wavelength shifter 151 may be affixed to the first conductivity type upper semiconductor layer 125 of wafer scale, is then separated together with protection insulating barrier in chip separation process (or packaging part separating technology) process.Therefore, the side surface of wavelength shifter 151 can with protection insulating barrier on one wire.It addition, the side surface of wavelength shifter 151 can with the side surface of insulating barrier 143 on one wire.
Figure 15 is the schematic cross sectional views of the light emission diode package member 400 according to the fourth exemplary embodiment of the present invention.
With reference to Figure 15, LED encapsulation piece 400 is similar to the LED encapsulation piece 300 according to exemplary embodiment above.But in the present example embodiment, the first projection 165a and the second projection 165b is formed in substrate 161.
Specifically, substrate 161 includes being respectively provided with the through hole forming the first projection 165a and the second projection 165b within it.Substrate 161 is dielectric base, for instance, sapphire substrates or silicon base, but it is not restricted to this.
The substrate 161 with the first projection 165a and the second projection 165b can be attached to the 3rd insulating barrier 141, and the first projection 165a and the second projection 165b can be connected respectively to the first electrode pad 139a and the second electrode pad 139b.Here, the first projection 165a and the second projection 165b can be joined respectively to other metal levels 140a, 140b.
Figure 16 is the sectional view of the light-emitting diode (LED) module including the LED encapsulation piece 300 according to the 3rd exemplary embodiment on circuit boards.
With reference to Figure 16, LED module includes such as, the circuit board 171 of MC-PCB, LED encapsulation piece 300 and lens 181.Circuit board 171 (such as, MC-PCB) has for by connection pad 173a, 173b mounted thereto for LED encapsulation piece 300.The first projection 145a and the second projection 145b (referring to Figure 14) of LED encapsulation piece 300 is connected respectively to connection pad 173a, 173b.
Multiple LED encapsulation piece 300 may be installed on circuit board 171, and lens 181 may be provided in LED encapsulation piece 300 to regulate the deflection of the light launched from LED encapsulation piece 300.
In other exemplary embodiments of the invention, light emission diode package member 400 can replace LED encapsulation piece 300 to install on circuit boards.
Figure 17 to Figure 25 illustrates the method manufacturing the LED encapsulation piece 300 according to the 3rd exemplary embodiment.In Figure 18 to Figure 23, (a) is plane graph, and (b) is the sectional view intercepted along the line A-A of (a).
With reference to Figure 17, growth substrate 121 forms the semiconductor stack overlapping piece 130 including the first conductive-type semiconductor layer 125, active layer 127 and the second conductive-type semiconductor layer 129.Growth substrate 121 is similar to reference to Fig. 4 substrate 21 described and semiconductor stack overlapping piece 30 with semiconductor stack overlapping piece 130, therefore thereof will be omitted detailed description thereof.
(a) and (b) with reference to Figure 18, semiconductor stack overlapping piece 130 is made to pattern to form chip (packaging part) separated region 130c and unit separated region 130b, making the second conductive-type semiconductor layer 129 and active layer 127 pattern to be formed luminescence unit S1, S2, each luminescence unit S1, S2 have the multiple contact hole 130a exposing the first conductive-type semiconductor layer 125 simultaneously.Semiconductor stack overlapping piece 130 can be made to pattern by photoetching process and etch process.
Chip separation region 130c is the region for LED encapsulation structure is divided into single LED encapsulation piece, and the side surface of the first conductive-type semiconductor layer 125, the side surface of active layer 127 and the side surface of the second conductive type layer semiconductor layer 129 are exposed to 130c place, chip separation region.Advantageously, chip separation region 130c and unit separated region 130b is configurable to expose substrate 121, and is not limited to this.
Multiple contact hole 130a can have circle, but is not restricted to this.Contact hole 130 can have variously-shaped.Second conductive-type semiconductor layer 129 and active layer 127 are exposed to the sidewall of multiple contact hole 130a.Contact hole 130a can have the sidewall of inclination.
With reference to (a) and (b) of Figure 19, the second conductive-type semiconductor layer 129 forms the second contact layer 131.At each luminescence unit S1, S2 except corresponding to the semiconductor stack overlapping piece 130 except the region of multiple contact hole 130a is formed the second contact layer 131.
Second contact layer 131 can include the transparent conductive oxide film of such as tin indium oxide (ITO) or the reflective metal layer of such as silver (Ag) or aluminum (Al).Second contact layer 131 can be made up of single or multiple lift.Second contact layer 131 is also configured to form Ohmic contact with the second conductive-type semiconductor layer 129.
The second contact layer 131 can be formed before or after forming multiple contact hole 130a.
With reference to (a) and (b) of Figure 20, form the first insulating barrier 133 to cover the second contact layer 131.First insulating barrier 133 can cover the side surface of each luminescence unit S1, S2 and cover the sidewall of multiple contact hole 130a simultaneously.Here, the first insulating barrier 133 can have the opening 133a exposing the first conductive-type semiconductor layer 125 in multiple contact hole 130a.
The first insulating barrier 133 can be formed by the single or multiple lift of such as silicon oxide film or silicon nitride film.Additionally, the first insulating barrier 133 can be formed by the distributed Bragg reflector formed by being alternately stacked the insulating barrier with different refractivity.Such as, can pass through to be alternately stacked SiO2/TiO2Or SiO2/Nb2O5Form the first insulating barrier 133.It addition, the first insulating barrier 133 can be formed to provide the distributed Bragg reflector that by the thickness regulating each insulating barrier, the wide wave-length coverage of blue light, green glow and HONGGUANG is had highly reflective.
With reference to (a) and (b) of Figure 21, the first insulating barrier 133 forms the first contact layer 135.Each luminescence unit S1, S2 form the first contact layer 135, contact portion 135a that the first contact layer 135 includes being exposed to contact the first conductivity type upper semiconductor layer 125 in contact hole 130a and the coupling part 135b being connected to each other by contact portion 135a.First contact layer 135 can be made up of reflective metal layer, but is not limited to this.
Some regions of each transmitter unit S1, S2 form the first contact layer 135 so that expose the first insulating barrier 133 at other region places being formed without the first contact layer 135 of semiconductor stack overlapping piece 130.
With reference to (a) and (b) of Figure 22, the first contact layer 135 forms the second insulating barrier 137.The second insulating barrier 137 can be formed by the single or multiple lift of such as silicon oxide film or silicon nitride film.Selectively, the second insulating barrier 137 can be formed by the distributed Bragg reflector formed by being alternately stacked the insulating barrier with different refractivity.
Second insulating barrier 137 can cover the first contact layer 135 and cover the first insulating barrier 133 simultaneously.Second insulating barrier 137 also can cover the side surface of each luminescence unit S1, S2.It addition, the second insulating barrier 137 can be filled in chip separation region 130c and unit separated region 130b.
Second insulating barrier 137 has the opening 137a of the first contact layer 135 exposing each luminescence unit S1, S2.It addition, the second insulating barrier 137 and the first insulating barrier 133 are formed with the opening 137b exposing the second contact layer 131.
With reference to (a) and (b) of Figure 23, the second insulating barrier 137 forms connector 139c, the first electrode pad 139a and the second electrode pad 139b.First electrode pad 139a is connected to by opening 137a first contact layer 135 of the first luminescence unit S1, the second electrode pad 139b is connected to by opening 137b second contact layer 131 of the second luminescence unit S2.It addition, adapter 139c passes through opening 137a, 137b, the first contact layer 135 and second contact layer 131 of contiguous luminescence unit S1, S2 are serially connected.
With reference to Figure 24, the first electrode pad 139a, the second electrode pad 139b and connector 139c form the 3rd insulating barrier 141.3rd insulating barrier 141 covers the first electrode pad 139a, the second electrode pad 139b and connector 139c, and has the groove of the upper surface exposing electrode pad 139a, 139b.Meanwhile, the 3rd insulating barrier 141 can have other metal levels 140a, the 140b formed in its groove.Other metal levels 140a, 140b make the height of electrode pad 139a, 139b increase so that final electrode pad can have the height higher than connector 139c.Other metal levels 140a, 140b can be formed before forming the 3rd insulating barrier 141.The upper surface of other metal levels 140a, 140b can be substantially coplanar with the upper surface of the 3rd insulating barrier 141.
With reference to Figure 25, the 3rd insulating barrier 141 forms the insulating barrier 143 of patterning.Patterning insulating barrier 143 have expose the first electrode pad 139a and the second electrode pad 139b upside such as, the groove of other metal levels 140a, 140b.It addition, the insulating barrier 143 of patterning can have the groove of the insulating barrier 141 exposed between the first electrode pad 139a and the second electrode pad 139b.
Then, the groove of insulating barrier 143 forms the first projection 145a and the second projection 145b, mute projection 145c can be formed between the first projection and the second projection.
The plating that can pass through such as to electroplate forms projection.As required, the Seed Layer for plating can also be formed.
After forming the first projection 145a and the second projection 145b, it is possible to remove insulating barrier 143.Such as, insulating barrier 143 can be formed by the polymer of such as photoresist, and can be removed after forming projection.Selectively, insulating barrier 143 can be retained to protect the first projection 145a and the side surface of the second projection 145b.
With reference to Figure 26, remove growth substrate 121, then wavelength shifter 151 is attached to luminescence unit S1, S2.Growth substrate 121 can be removed by the optical technology of such as laser lift-off (LLO), machine glazed finish or chemical etching.
Then, make the surface of the exposure of the first conductive-type semiconductor layer 125 stand the anisotropic etching of such as PEC etching, to form rough surface on the first conductive-type semiconductor layer 125 exposed.
Meanwhile, the wavelength shifter 151 such as comprising the phosphor sheet of phosphor can be attached to the first conductive-type semiconductor layer 125.
Selectively, growth substrate 121 can comprise the impurity of the wavelength for changing the light produced in active layer 127.In this case, growth substrate 121 can be used as wavelength shifter 151.
Then, along chip separation region 130c, LED encapsulation structure is divided into single packaging part, thus the LED encapsulation piece 300 provided.Now, the second insulating barrier 137 is cut together with wavelength shifter 151 so that the cutting planes of the second insulating barrier 137 and wavelength shifter 151 may be formed on straight line.
Figure 27 is the sectional view explaining the method manufacturing the LED encapsulation piece 400 according to the fourth exemplary embodiment of the present invention.
With reference to Figure 27, manufacturing according in the method for the LED encapsulation piece 400 of the present embodiment, technique is identical with the technique of the method that above-mentioned (Figure 24) manufactures LED encapsulation piece 300, until forming the 3rd insulating barrier 141 and other metal levels 140a, 140b.
In the present example embodiment, substrate 161 is joined to the 3rd insulating barrier 141.Substrate 161 can have the through hole that can form the first projection 165a and the second projection 165b wherein.It addition, the first projection 165a and the second projection 165b can be formed with pad (not shown) in its end.Substrate 161 formed on the lower surface thereof and the groove filled by metal material 165c additionally, can have part.Metal material 165c improves substrate heat radiation.
Selectively, can individually prepare the substrate 161 with the first projection 165a and the second projection 165b, and the substrate 161 with the first projection 165a and the second projection 165b is joined to the wafer with the first electrode pad 139a and the second electrode pad 139b.Respectively the first projection 165a and the second projection 165b can be electrically connected to the first electrode pad 139a and the second electrode pad 139b.
Then, as described in reference to Figure 26, remove growth substrate 121, and wavelength shifter 151 can be attached to luminescence unit S1, S2, subsequently LED encapsulation structure is divided into single LED encapsulation piece.Therefore it provides the LED encapsulation piece 400 completed described in fig .15.
Similarly, the exemplary embodiment of the present invention provides the wafer scale LED encapsulation piece that can be formed directly on the circuit board of module when not using traditional lead frame or printed circuit board (PCB).Therefore, LED encapsulation piece can have high efficiency and can show improved heat radiation, reduces time and cost for manufacturing described LED encapsulation piece simultaneously.Additionally, the LED module with LED encapsulation piece mounted thereto can have high efficiency and can show improved heat radiation.
It addition, LED encapsulation piece can include multiple luminescence units of being serially connected and the array being connected in parallel reversely with each other.It addition, multiple luminescence units can connect into bridge rectifier, and can be used for forming bridge rectifier.Therefore, can operate when there is no independent AC/DC transducer including the LED module of LED encapsulation piece.
Although describe the present invention already in connection with accompanying drawing with reference to some exemplary embodiments, but for those skilled in the art it will be apparent that the present invention can be made various amendment and change without departing from the spirit and scope of the present invention.Also, it should be understood that some features of certain embodiment are also applied to other embodiments without departing from the spirit and scope of the present invention.It is therefore to be understood that only embodiment is supplied to those skilled in the art by diagram, provides embodiment so that the full disclosure of the present invention is supplied to those skilled in the art, and thorough understanding of the present invention is supplied to those skilled in the art.Thus, it is intended that the present invention covers described modifications and variations, as long as described modifications and variations fall in the scope of claim and equivalent thereof.

Claims (10)

1. a light emission diode package member, described light emission diode package member includes:
Semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;
Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;
First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;
Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And
Protection insulating barrier, covers the first conductive-type semiconductor layer and the sidewall of the second conductive-type semiconductor layer,
Wherein, insulating barrier is protected to include the insulating barrier with refractive index different from each other.
2. light emission diode package member as claimed in claim 1, described light emission diode package member also includes: wavelength shifter, is arranged in above the second side of semiconductor stack overlapping piece, and the second side is relative with the first side of semiconductor stack overlapping piece,
Wherein, wavelength shifter includes phosphor sheet or the material doped with impurity.
3. light emission diode package member as claimed in claim 1, described light emission diode package member also includes being positioned at the transparent conductive oxide film contact layer above the second conductive-type semiconductor layer or reflective metal layer,
A part for transparent conductive oxide film contact layer or reflective metal layer is formed between the second conductive-type semiconductor layer and protection insulating barrier.
4. light emission diode package member as claimed in claim 3, wherein, transparent conductive oxide film contact layer includes tin indium oxide.
5. light emission diode package member as claimed in claim 4, wherein, at least one contact hole in the plurality of contact hole has round-shaped, and
Wherein, the plurality of contact hole is arranged along at least one side surface of light emission diode package member.
6. a light-emitting diode (LED) module, described light-emitting diode (LED) module includes:
Circuit board;Be arranged in the light emission diode package member of circuit board with not having bonding wire, wherein, light emission diode package member includes:
Semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;
Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;
First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;
Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And
Protection insulating barrier, covers the first conductive-type semiconductor layer and the sidewall of the second conductive-type semiconductor layer,
Wherein, insulating barrier is protected to include the insulating barrier with refractive index different from each other;
Lens, regulate the deflection of the light launched from light emission diode package member.
7. light-emitting diode (LED) module as claimed in claim 6, wherein, circuit board includes metallic core printed circuit board (PCB), and light emission diode package member is arranged in above metallic core printed circuit board (PCB).
8. a light-emitting diode (LED) module, described light-emitting diode (LED) module includes:
Circuit board;
Light emission diode package member, it does not have bonding wire ground engages on a printed circuit;
Wherein, light emission diode package member includes:
Semiconductor stack overlapping piece, including the first conductive-type semiconductor layer, active layer and the second conductive-type semiconductor layer;
Multiple contact holes, are arranged in the second conductive-type semiconductor layer and active layer, the plurality of contact holes exposing the first conductive-type semiconductor layer;
First electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the first electrode pad is electrically connected to the first conductive-type semiconductor layer by some contact holes in the plurality of contact hole;
Second electrode pad, is arranged in above the first side of semiconductor stack overlapping piece, and the second electrode pad is electrically connected to the second conductive-type semiconductor layer;And
Protection insulating barrier, covers the sidewall of the first conductive-type semiconductor layer.
9. light-emitting diode (LED) module as claimed in claim 8, described light-emitting diode (LED) module is additionally included in the wavelength shifter above the side relative with the first electrode pad and the second electrode pad of light emission diode package member,
Wherein, wavelength shifter includes phosphor sheet or the material doped with impurity.
10. light-emitting diode (LED) module as claimed in claim 9, wherein, the first electrode pad and each in the second electrode pad have the area of be not less than light emission diode package member 1/3.
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