CN105611743A - Manufacturing method for fine circuit - Google Patents
Manufacturing method for fine circuit Download PDFInfo
- Publication number
- CN105611743A CN105611743A CN201610111948.3A CN201610111948A CN105611743A CN 105611743 A CN105611743 A CN 105611743A CN 201610111948 A CN201610111948 A CN 201610111948A CN 105611743 A CN105611743 A CN 105611743A
- Authority
- CN
- China
- Prior art keywords
- etching
- layer
- circuit
- hole
- fine
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0221—Perforating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0793—Aqueous alkaline solution, e.g. for cleaning or etching
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention relates to the technical field of circuit board production, and specifically to a manufacturing method for a fine circuit. An overflow hole is drilled in a molding edge of a multi-layered board; residual etching liquid medicine in the middle of the board can flow out of the overflow hole in an etching process so as to accelerate etching liquid medicine exchange, weaken a pool effect and improve the etching capability in order to reduce the lateral-etching quantity and deckle edges, improve the etching uniformity and improve the manufacturing precision of the circuit. By controlling the size and the hole edge distance of the overflow hole, the etching liquid medicine exchanging speed is improved while the increasing risk of board-breaking in the machining process of the multi-layered board due to the existence of the overflow hole is avoided as well; and by controlling alkali etching parameters, the etching effect can be further improved, and the precision of the circuit can be further improved as well.
Description
Technical field
The present invention relates to board production technical field, relate in particular to a kind of preparation method of fine-line.
Background technology
PCB (PrintedCircuitBoard), Chinese is printed circuit board, claims again printed substrate.The technological process of production of PCB is generally as follows: sawing sheet → inner figure → internal layer etching → internal layer AOI → palm fibreChange → pressing → boring → heavy copper → electric plating of whole board → outer graphics → graphic plating → outer etching → outerLayer AOI → silk-screen welding resistance, character → surface treatment → moulding → electrical testing → FQC → packaging. Wherein,In order to raise the efficiency, convenient production, composition can be stitched together multiple unit figures (unit) when sawing sheetA set of module figure (set); And then many set of modules figure is stitched together, between module figure, leaveFor the moulding limit of later stage moulding, add the technique edges of periphery simultaneously, form a production unit(panel), base material cuts according to the size of production unit, corresponding in the multi-layer sheet forming after pressingComprise multiple module region, module region comprises multiple for being made into the cell board region of cell board,Multi-layer sheet 10,11st as shown in Figure 1, technique edges, the 12nd, moulding limit, the 13rd, cell board region, 14It is module region.
In the outer etching work procedure of making outer-layer circuit, when carrying out to depth direction along with etching,The side of circuit also can be subject to corrosion to a certain extent, thereby causes circuit less than normal, and this phenomenon is called sideErosion. When multi-layer sheet carries out outer etching, constantly to multi-layer sheet spray etching liquid medicine, at multi-layer sheet middle partResidual liquid medicine forms pool effect, now the etching medicine in the middle of multi-layer sheet on surface than the many of surroundingThe poor fluidity of water, the exchange of etching solution is slower, and fresh etching solution can not supplement immediately, causesLiquid medicine etch capabilities declines, and etching period also needs corresponding prolongation, thereby can increase side etching quantity, and impact is outerThe precision of circuit, and cause etch uniformity deficiency, even in outer-layer circuit, there is short circuit, burr mistakeThe quality problem such as large.
Summary of the invention
The present invention is directed in the manufacturing process of existing PCB, when outer etching, pool effect is larger, makesSide etching quantity increases, thereby affects the problem of circuit precision, improves line thereby provide one can reduce side etching quantityThe preparation method of the fine-line of road precision.
For achieving the above object, the present invention by the following technical solutions.
A preparation method for fine-line, comprises the following steps:
S1 boring: bore circuit hole on multi-layer sheet, and bore spout hole on multiple-plate moulding limit, instituteThe aperture of stating spout hole is less than the width on moulding limit, described multi-layer sheet by prepreg by core material withOuter copper foil pressing is integrated formation.
Preferably, on same moulding limit, the hole back gauge of adjacent two spout holes is 45-55mm. MorePreferably, on same moulding limit, the hole back gauge of adjacent two spout holes is 50mm.
Preferably, the width on described moulding limit is 1.2-5.0mm.
Preferably, the aperture of described spout hole is 1.0mm.
The heavy copper of S2 and electric plating of whole board: multi-layer sheet is sunk to copper and electric plating of whole board processing, make on multi-layer sheetCircuit hole metallization.
S3 outer-layer circuit: by positive blade technolgy, the figure on the outer film is transferred on multi-layer sheet to shapeBecome outer-layer circuit figure; And then multi-layer sheet is carried out to graphic plating processing, on outer-layer circuit figure, comply withInferior electro-coppering and electrotinning; Then take off the film on multi-layer sheet, then by alkali etching by outer-layer circuit withOuter copper is removed; Then take off again tin layer, outer-layer circuit is displayed.
Preferably, in alkali etching, etching solution is that proportion is the ammoniacal liquor of 1.175-1.185, etching solutionTemperature is 50 ± 2 DEG C, and upper spray pressure is 2.5-3.0Kg/cm2, lower spray pressure is 1.5-2.0Kg/cm2。
Operation after S4: carry out successively solder mask making, surface treatment according to prior art on multi-layer sheetAnd forming processes, make PCB finished product.
Compared with prior art, the invention has the beneficial effects as follows: the present invention passes through on multiple-plate moulding limitUpper brill spout hole, the etching solution that remains in plate middle part when etching can flow out by spout hole, accelerates with thisThe exchange of etching solution, reduces pool effect, improves etch capabilities, thereby reduces side etching quantity and burr,Improve etch uniformity, improve the making precision of circuit. By size and the hole back gauge in controlling water kick hole,Can in improving etching solution exchange velocity, avoid adding because the existence of spout hole increases multi-layer sheetIn work process, there is the risk of disconnected plate. By controlling the parameter of alkali etching, can further improve etching effectReally, thus further improve the precision of circuit.
Brief description of the drawings
Fig. 1 is existing multiple-plate structural representation;
Fig. 2 is multiple-plate structural representation in embodiment.
Detailed description of the invention
In order to understand more fully technology contents of the present invention, below in conjunction with specific embodiment to of the present inventionTechnical scheme is described further and illustrates.
Embodiment
The present embodiment provides a kind of preparation method of fine-line, and this preparation method can reduce outer etchingTime pool effect, improve etch capabilities.
Concrete making step is as follows:
(1) multi-layer sheet
According to prior art, process sawing sheet → negative film technique making internal layer circuit (formation central layer) successively →Pressing, is made into the not multi-layer sheet of boring by base material, by core material, prepreg and outer copper foilThe plate that pressing is formed as one; The multi-layer sheet making comprises multiple module region, and module region comprises manyIndividual for making the region of forming unit plate, this region is called cell board region. Between each module region(the moulding limit in other embodiments,, moulding limit that to leave for the width of later stage moulding be 3.0mmWidth can determine according to typesetting design, if width is in the scope of 1.2-5.0mm), multiple-platePeriphery is technique edges.
(2) boring
Utilize borehole data on multi-layer sheet, to bore circuit hole, and bore spout hole on multiple-plate moulding limit,The aperture of spout hole is 1.0mm, and on same moulding limit, the hole back gauge of adjacent two spout holes is50mm. Multi-layer sheet 20,21st as shown in Figure 2, technique edges, the 22nd, moulding limit, the 23rd, unitPlate region, the 24th, module region, the 25th, spout hole.
In other embodiments, the hole back gauge of adjacent two spout holes can also be 45-55mm'sIn scope, do not increase the risk of the disconnected plate of multi-layer sheet; The optional 1.0mm in aperture, the 2.0mm of spout holeOr 3.0mm, but also need to ensure that the aperture of spout hole is less than the width on moulding limit.
(3) heavy copper and electric plating of whole board
Multi-layer sheet is sunk to copper and electric plating of whole board processing, make circuit hole and edges of boards groove metal on multi-layer sheetChange.
(4) outer-layer circuit
By positive blade technolgy, the figure on the outer film is transferred on multi-layer sheet, formed outer-layer circuit figureShape. And then multi-layer sheet is carried out to graphic plating processing, electro-coppering and electricity successively on outer-layer circuit figureZinc-plated. Then take off the film on multi-layer sheet, then by alkali etching, the copper beyond outer-layer circuit is removed.Then take off again tin layer, outer-layer circuit is displayed.
In alkali etching, taking ammoniacal liquor as etching solution, and the proportion of controlling etching solution is at 1.175-1.185Scope in, the temperature of etching solution is in the scope of 50 ± 2 DEG C, upper spray pressure is at 2.5-3.0Kg/cm2'sIn scope, lower spray pressure is at 1.5-2.0Kg/cm2Scope in.
The spray time of alkali etching is determined according to multiple-plate outer copper is thick, the spray of the thick correspondence of different CuAsynchronism(-nization), specific as follows: outer copper is thick while being 0.33OZ, and spray time is 33s; It is outer that copper is thick isWhen HOZ, spray time is 45s; Outer copper is thick while being 1-2OZ, and spray time is 84s; Outer copperThick while being greater than 2OZ, spray time is 150s.
(5) operation after
On multi-layer sheet, carry out successively solder mask making, surface treatment and forming processes according to prior art,Make PCB finished product.
The above only further illustrates technology contents of the present invention with embodiment, so that reader more holdsEasily understand, but do not represent that embodiments of the present invention only limit to this, any technology of doing according to the present invention is prolongedStretch or recreate, being all subject to protection of the present invention.
Claims (6)
1. a preparation method for fine-line, is characterized in that, comprises the following steps:
S1 boring: bore circuit hole on multi-layer sheet, and bore spout hole on multiple-plate moulding limit, instituteThe aperture of stating spout hole is less than the width on moulding limit, described multi-layer sheet by prepreg by core material withOuter copper foil pressing is integrated formation;
The heavy copper of S2 and electric plating of whole board: multi-layer sheet is sunk to copper and electric plating of whole board processing, make on multi-layer sheetCircuit hole metallization;
S3 outer-layer circuit: by positive blade technolgy, the figure on the outer film is transferred on multi-layer sheet to shapeBecome outer-layer circuit figure; And then multi-layer sheet is carried out to graphic plating processing, on outer-layer circuit figure, comply withInferior electro-coppering and electrotinning; Then take off the film on multi-layer sheet, then by alkali etching by outer-layer circuit withOuter copper is removed; Then take off again tin layer, outer-layer circuit is displayed;
Operation after S4: carry out successively solder mask making, surface treatment according to prior art on multi-layer sheetAnd forming processes, make PCB finished product.
2. a kind of preparation method of fine-line according to claim 1, is characterized in that, sameOn moulding limit, the hole back gauge of adjacent two spout holes is 45-55mm.
3. a kind of preparation method of fine-line according to claim 2, is characterized in that, sameOn moulding limit, the hole back gauge of adjacent two spout holes is 50mm.
4. a kind of preparation method of fine-line according to claim 1, is characterized in that, described inThe width on moulding limit is 1.2-5.0mm.
5. a kind of preparation method of fine-line according to claim 4, is characterized in that, described inThe aperture of spout hole is 1.0mm.
6. a kind of preparation method of fine-line according to claim 1, is characterized in that stepIn S3, in described alkali etching, etching solution is that proportion is the ammoniacal liquor of 1.175-1.185, the temperature of etching solutionDegree is 50 ± 2 DEG C, and upper spray pressure is 2.5-3.0Kg/cm2, lower spray pressure is 1.5-2.0Kg/cm2。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610111948.3A CN105611743A (en) | 2016-02-29 | 2016-02-29 | Manufacturing method for fine circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610111948.3A CN105611743A (en) | 2016-02-29 | 2016-02-29 | Manufacturing method for fine circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105611743A true CN105611743A (en) | 2016-05-25 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610111948.3A Pending CN105611743A (en) | 2016-02-29 | 2016-02-29 | Manufacturing method for fine circuit |
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| Country | Link |
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| CN (1) | CN105611743A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107333397A (en) * | 2017-08-07 | 2017-11-07 | 胜宏科技（惠州）股份有限公司 | A kind of wiring board control deeply etching method |
| CN111668141A (en) * | 2020-07-24 | 2020-09-15 | 山东新恒汇电子科技有限公司 | Etching process of lead frame |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102196672A (en) * | 2010-03-12 | 2011-09-21 | 富葵精密组件(深圳)有限公司 | Circuit board manufacturing method |
| CN101754583B (en) * | 2008-12-18 | 2012-03-21 | 北大方正集团有限公司 | Method and device for eliminating pool effect |
| CN203934102U (en) * | 2014-07-01 | 2014-11-05 | 定颖电子（昆山）有限公司 | Can improve the pcb board of etching line pool effect |
| CN104185377A (en) * | 2014-08-21 | 2014-12-03 | 深圳崇达多层线路板有限公司 | Fine-line PCB manufacturing method |
-
2016
- 2016-02-29 CN CN201610111948.3A patent/CN105611743A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101754583B (en) * | 2008-12-18 | 2012-03-21 | 北大方正集团有限公司 | Method and device for eliminating pool effect |
| CN102196672A (en) * | 2010-03-12 | 2011-09-21 | 富葵精密组件(深圳)有限公司 | Circuit board manufacturing method |
| CN203934102U (en) * | 2014-07-01 | 2014-11-05 | 定颖电子（昆山）有限公司 | Can improve the pcb board of etching line pool effect |
| CN104185377A (en) * | 2014-08-21 | 2014-12-03 | 深圳崇达多层线路板有限公司 | Fine-line PCB manufacturing method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107333397A (en) * | 2017-08-07 | 2017-11-07 | 胜宏科技（惠州）股份有限公司 | A kind of wiring board control deeply etching method |
| CN111668141A (en) * | 2020-07-24 | 2020-09-15 | 山东新恒汇电子科技有限公司 | Etching process of lead frame |
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| C06 | Publication | ||
| PB01 | Publication | ||
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| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160525 |